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README
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# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2000 - 2013
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
Summary:
========
This directory contains the source code for U-Boot, a boot loader for
Embedded boards based on PowerPC, ARM, MIPS and several other
processors, which can be installed in a boot ROM and used to
initialize and test the hardware or to download and run application
code.
The development of U-Boot is closely related to Linux: some parts of
the source code originate in the Linux source tree, we have some
header files in common, and special provision has been made to
support booting of Linux images.
Some attention has been paid to make this software easily
configurable and extendable. For instance, all monitor commands are
implemented with the same call interface, so that it's very easy to
add new commands. Also, instead of permanently adding rarely used
code (for instance hardware test utilities) to the monitor, you can
load and run it dynamically.
Status:
=======
In general, all boards for which a configuration option exists in the
Makefile have been tested to some extent and can be considered
"working". In fact, many of them are used in production systems.
In case of problems see the CHANGELOG file to find out who contributed
the specific port. In addition, there are various MAINTAINERS files
scattered throughout the U-Boot source identifying the people or
companies responsible for various boards and subsystems.
Note: As of August, 2010, there is no longer a CHANGELOG file in the
actual U-Boot source tree; however, it can be created dynamically
from the Git log using:
make CHANGELOG
Where to get help:
==================
In case you have questions about, problems with or contributions for
U-Boot, you should send a message to the U-Boot mailing list at
<u-boot@lists.denx.de>. There is also an archive of previous traffic
on the mailing list - please search the archive before asking FAQ's.
Please see https://lists.denx.de/pipermail/u-boot and
https://marc.info/?l=u-boot
Where to get source code:
=========================
The U-Boot source code is maintained in the Git repository at
https://source.denx.de/u-boot/u-boot.git ; you can browse it online at
https://source.denx.de/u-boot/u-boot
The "Tags" links on this page allow you to download tarballs of
any version you might be interested in. Official releases are also
available from the DENX file server through HTTPS or FTP.
https://ftp.denx.de/pub/u-boot/
ftp://ftp.denx.de/pub/u-boot/
Where we come from:
===================
- start from 8xxrom sources
- create PPCBoot project (https://sourceforge.net/projects/ppcboot)
- clean up code
- make it easier to add custom boards
- make it possible to add other [PowerPC] CPUs
- extend functions, especially:
* Provide extended interface to Linux boot loader
* S-Record download
* network boot
* ATA disk / SCSI ... boot
- create ARMBoot project (https://sourceforge.net/projects/armboot)
- add other CPU families (starting with ARM)
- create U-Boot project (https://sourceforge.net/projects/u-boot)
- current project page: see https://www.denx.de/wiki/U-Boot
Names and Spelling:
===================
The "official" name of this project is "Das U-Boot". The spelling
"U-Boot" shall be used in all written text (documentation, comments
in source files etc.). Example:
This is the README file for the U-Boot project.
File names etc. shall be based on the string "u-boot". Examples:
include/asm-ppc/u-boot.h
#include <asm/u-boot.h>
Variable names, preprocessor constants etc. shall be either based on
the string "u_boot" or on "U_BOOT". Example:
U_BOOT_VERSION u_boot_logo
IH_OS_U_BOOT u_boot_hush_start
Versioning:
===========
Starting with the release in October 2008, the names of the releases
were changed from numerical release numbers without deeper meaning
into a time stamp based numbering. Regular releases are identified by
names consisting of the calendar year and month of the release date.
Additional fields (if present) indicate release candidates or bug fix
releases in "stable" maintenance trees.
Examples:
U-Boot v2009.11 - Release November 2009
U-Boot v2009.11.1 - Release 1 in version November 2009 stable tree
U-Boot v2010.09-rc1 - Release candidate 1 for September 2010 release
Directory Hierarchy:
====================
/arch Architecture specific files
/arc Files generic to ARC architecture
/arm Files generic to ARM architecture
/m68k Files generic to m68k architecture
/microblaze Files generic to microblaze architecture
/mips Files generic to MIPS architecture
/nds32 Files generic to NDS32 architecture
/nios2 Files generic to Altera NIOS2 architecture
/powerpc Files generic to PowerPC architecture
/riscv Files generic to RISC-V architecture
/sandbox Files generic to HW-independent "sandbox"
/sh Files generic to SH architecture
/x86 Files generic to x86 architecture
/xtensa Files generic to Xtensa architecture
/api Machine/arch independent API for external apps
/board Board dependent files
/cmd U-Boot commands functions
/common Misc architecture independent functions
/configs Board default configuration files
/disk Code for disk drive partition handling
/doc Documentation (don't expect too much)
/drivers Commonly used device drivers
/dts Contains Makefile for building internal U-Boot fdt.
/env Environment files
/examples Example code for standalone applications, etc.
/fs Filesystem code (cramfs, ext2, jffs2, etc.)
/include Header Files
/lib Library routines generic to all architectures
/Licenses Various license files
/net Networking code
/post Power On Self Test
/scripts Various build scripts and Makefiles
/test Various unit test files
/tools Tools to build S-Record or U-Boot images, etc.
Software Configuration:
=======================
Configuration is usually done using C preprocessor defines; the
rationale behind that is to avoid dead code whenever possible.
There are two classes of configuration variables:
* Configuration _OPTIONS_:
These are selectable by the user and have names beginning with
"CONFIG_".
* Configuration _SETTINGS_:
These depend on the hardware etc. and should not be meddled with if
you don't know what you're doing; they have names beginning with
"CONFIG_SYS_".
Previously, all configuration was done by hand, which involved creating
symbolic links and editing configuration files manually. More recently,
U-Boot has added the Kbuild infrastructure used by the Linux kernel,
allowing you to use the "make menuconfig" command to configure your
build.
Selection of Processor Architecture and Board Type:
---------------------------------------------------
For all supported boards there are ready-to-use default
configurations available; just type "make <board_name>_defconfig".
Example: For a TQM823L module type:
cd u-boot
make TQM823L_defconfig
Note: If you're looking for the default configuration file for a board
you're sure used to be there but is now missing, check the file
doc/README.scrapyard for a list of no longer supported boards.
Sandbox Environment:
--------------------
U-Boot can be built natively to run on a Linux host using the 'sandbox'
board. This allows feature development which is not board- or architecture-
specific to be undertaken on a native platform. The sandbox is also used to
run some of U-Boot's tests.
See doc/arch/sandbox.rst for more details.
Board Initialisation Flow:
--------------------------
This is the intended start-up flow for boards. This should apply for both
SPL and U-Boot proper (i.e. they both follow the same rules).
Note: "SPL" stands for "Secondary Program Loader," which is explained in
more detail later in this file.
At present, SPL mostly uses a separate code path, but the function names
and roles of each function are the same. Some boards or architectures
may not conform to this. At least most ARM boards which use
CONFIG_SPL_FRAMEWORK conform to this.
Execution typically starts with an architecture-specific (and possibly
CPU-specific) start.S file, such as:
- arch/arm/cpu/armv7/start.S
- arch/powerpc/cpu/mpc83xx/start.S
- arch/mips/cpu/start.S
and so on. From there, three functions are called; the purpose and
limitations of each of these functions are described below.
lowlevel_init():
- purpose: essential init to permit execution to reach board_init_f()
- no global_data or BSS
- there is no stack (ARMv7 may have one but it will soon be removed)
- must not set up SDRAM or use console
- must only do the bare minimum to allow execution to continue to
board_init_f()
- this is almost never needed
- return normally from this function
board_init_f():
- purpose: set up the machine ready for running board_init_r():
i.e. SDRAM and serial UART
- global_data is available
- stack is in SRAM
- BSS is not available, so you cannot use global/static variables,
only stack variables and global_data
Non-SPL-specific notes:
- dram_init() is called to set up DRAM. If already done in SPL this
can do nothing
SPL-specific notes:
- you can override the entire board_init_f() function with your own
version as needed.
- preloader_console_init() can be called here in extremis
- should set up SDRAM, and anything needed to make the UART work
- there is no need to clear BSS, it will be done by crt0.S
- for specific scenarios on certain architectures an early BSS *can*
be made available (via CONFIG_SPL_EARLY_BSS by moving the clearing
of BSS prior to entering board_init_f()) but doing so is discouraged.
Instead it is strongly recommended to architect any code changes
or additions such to not depend on the availability of BSS during
board_init_f() as indicated in other sections of this README to
maintain compatibility and consistency across the entire code base.
- must return normally from this function (don't call board_init_r()
directly)
Here the BSS is cleared. For SPL, if CONFIG_SPL_STACK_R is defined, then at
this point the stack and global_data are relocated to below
CONFIG_SPL_STACK_R_ADDR. For non-SPL, U-Boot is relocated to run at the top of
memory.
board_init_r():
- purpose: main execution, common code
- global_data is available
- SDRAM is available
- BSS is available, all static/global variables can be used
- execution eventually continues to main_loop()
Non-SPL-specific notes:
- U-Boot is relocated to the top of memory and is now running from
there.
SPL-specific notes:
- stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined and
CONFIG_SPL_STACK_R_ADDR points into SDRAM
- preloader_console_init() can be called here - typically this is
done by selecting CONFIG_SPL_BOARD_INIT and then supplying a
spl_board_init() function containing this call
- loads U-Boot or (in falcon mode) Linux
Configuration Options:
----------------------
Configuration depends on the combination of board and CPU type; all
such information is kept in a configuration file
"include/configs/<board_name>.h".
Example: For a TQM823L module, all configuration settings are in
"include/configs/TQM823L.h".
Many of the options are named exactly as the corresponding Linux
kernel configuration options. The intention is to make it easier to
build a config tool - later.
- ARM Platform Bus Type(CCI):
CoreLink Cache Coherent Interconnect (CCI) is ARM BUS which
provides full cache coherency between two clusters of multi-core
CPUs and I/O coherency for devices and I/O masters
CONFIG_SYS_FSL_HAS_CCI400
Defined For SoC that has cache coherent interconnect
CCN-400
CONFIG_SYS_FSL_HAS_CCN504
Defined for SoC that has cache coherent interconnect CCN-504
The following options need to be configured:
- CPU Type: Define exactly one, e.g. CONFIG_MPC85XX.
- Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS.
- 85xx CPU Options:
CONFIG_SYS_PPC64
Specifies that the core is a 64-bit PowerPC implementation (implements
the "64" category of the Power ISA). This is necessary for ePAPR
compliance, among other possible reasons.
CONFIG_SYS_FSL_TBCLK_DIV
Defines the core time base clock divider ratio compared to the
system clock. On most PQ3 devices this is 8, on newer QorIQ
devices it can be 16 or 32. The ratio varies from SoC to Soc.
CONFIG_SYS_FSL_PCIE_COMPAT
Defines the string to utilize when trying to match PCIe device
tree nodes for the given platform.
CONFIG_SYS_FSL_ERRATUM_A004510
Enables a workaround for erratum A004510. If set,
then CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV and
CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY must be set.
CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 (optional)
Defines one or two SoC revisions (low 8 bits of SVR)
for which the A004510 workaround should be applied.
The rest of SVR is either not relevant to the decision
of whether the erratum is present (e.g. p2040 versus
p2041) or is implied by the build target, which controls
whether CONFIG_SYS_FSL_ERRATUM_A004510 is set.
See Freescale App Note 4493 for more information about
this erratum.
CONFIG_A003399_NOR_WORKAROUND
Enables a workaround for IFC erratum A003399. It is only
required during NOR boot.
CONFIG_A008044_WORKAROUND
Enables a workaround for T1040/T1042 erratum A008044. It is only
required during NAND boot and valid for Rev 1.0 SoC revision
CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
This is the value to write into CCSR offset 0x18600
according to the A004510 workaround.
CONFIG_SYS_FSL_DSP_DDR_ADDR
This value denotes start offset of DDR memory which is
connected exclusively to the DSP cores.
CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
This value denotes start offset of M2 memory
which is directly connected to the DSP core.
CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
This value denotes start offset of M3 memory which is directly
connected to the DSP core.
CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
This value denotes start offset of DSP CCSR space.
CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
Single Source Clock is clocking mode present in some of FSL SoC's.
In this mode, a single differential clock is used to supply
clocks to the sysclock, ddrclock and usbclock.
CONFIG_SYS_CPC_REINIT_F
This CONFIG is defined when the CPC is configured as SRAM at the
time of U-Boot entry and is required to be re-initialized.
CONFIG_DEEP_SLEEP
Indicates this SoC supports deep sleep feature. If deep sleep is
supported, core will start to execute uboot when wakes up.
- Generic CPU options:
CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
Defines the endianess of the CPU. Implementation of those
values is arch specific.
CONFIG_SYS_FSL_DDR
Freescale DDR driver in use. This type of DDR controller is
found in mpc83xx, mpc85xx, mpc86xx as well as some ARM core
SoCs.
CONFIG_SYS_FSL_DDR_ADDR
Freescale DDR memory-mapped register base.
CONFIG_SYS_FSL_DDR_EMU
Specify emulator support for DDR. Some DDR features such as
deskew training are not available.
CONFIG_SYS_FSL_DDRC_GEN1
Freescale DDR1 controller.
CONFIG_SYS_FSL_DDRC_GEN2
Freescale DDR2 controller.
CONFIG_SYS_FSL_DDRC_GEN3
Freescale DDR3 controller.
CONFIG_SYS_FSL_DDRC_GEN4
Freescale DDR4 controller.
CONFIG_SYS_FSL_DDRC_ARM_GEN3
Freescale DDR3 controller for ARM-based SoCs.
CONFIG_SYS_FSL_DDR1
Board config to use DDR1. It can be enabled for SoCs with
Freescale DDR1 or DDR2 controllers, depending on the board
implemetation.
CONFIG_SYS_FSL_DDR2
Board config to use DDR2. It can be enabled for SoCs with
Freescale DDR2 or DDR3 controllers, depending on the board
implementation.
CONFIG_SYS_FSL_DDR3
Board config to use DDR3. It can be enabled for SoCs with
Freescale DDR3 or DDR3L controllers.
CONFIG_SYS_FSL_DDR3L
Board config to use DDR3L. It can be enabled for SoCs with
DDR3L controllers.
CONFIG_SYS_FSL_DDR4
Board config to use DDR4. It can be enabled for SoCs with
DDR4 controllers.
CONFIG_SYS_FSL_IFC_BE
Defines the IFC controller register space as Big Endian
CONFIG_SYS_FSL_IFC_LE
Defines the IFC controller register space as Little Endian
CONFIG_SYS_FSL_IFC_CLK_DIV
Defines divider of platform clock(clock input to IFC controller).
CONFIG_SYS_FSL_LBC_CLK_DIV
Defines divider of platform clock(clock input to eLBC controller).
CONFIG_SYS_FSL_PBL_PBI
It enables addition of RCW (Power on reset configuration) in built image.
Please refer doc/README.pblimage for more details
CONFIG_SYS_FSL_PBL_RCW
It adds PBI(pre-boot instructions) commands in u-boot build image.
PBI commands can be used to configure SoC before it starts the execution.
Please refer doc/README.pblimage for more details
CONFIG_SYS_FSL_DDR_BE
Defines the DDR controller register space as Big Endian
CONFIG_SYS_FSL_DDR_LE
Defines the DDR controller register space as Little Endian
CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY
Physical address from the view of DDR controllers. It is the
same as CONFIG_SYS_DDR_SDRAM_BASE for all Power SoCs. But
it could be different for ARM SoCs.
CONFIG_SYS_FSL_DDR_INTLV_256B
DDR controller interleaving on 256-byte. This is a special
interleaving mode, handled by Dickens for Freescale layerscape
SoCs with ARM core.
CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
Number of controllers used as main memory.
CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
Number of controllers used for other than main memory.
CONFIG_SYS_FSL_HAS_DP_DDR
Defines the SoC has DP-DDR used for DPAA.
CONFIG_SYS_FSL_SEC_BE
Defines the SEC controller register space as Big Endian
CONFIG_SYS_FSL_SEC_LE
Defines the SEC controller register space as Little Endian
- MIPS CPU options:
CONFIG_SYS_INIT_SP_OFFSET
Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack
pointer. This is needed for the temporary stack before
relocation.
CONFIG_XWAY_SWAP_BYTES
Enable compilation of tools/xway-swap-bytes needed for Lantiq
XWAY SoCs for booting from NOR flash. The U-Boot image needs to
be swapped if a flash programmer is used.
- ARM options:
CONFIG_SYS_EXCEPTION_VECTORS_HIGH
Select high exception vectors of the ARM core, e.g., do not
clear the V bit of the c1 register of CP15.
COUNTER_FREQUENCY
Generic timer clock source frequency.
COUNTER_FREQUENCY_REAL
Generic timer clock source frequency if the real clock is
different from COUNTER_FREQUENCY, and can only be determined
at run time.
- Tegra SoC options:
CONFIG_TEGRA_SUPPORT_NON_SECURE
Support executing U-Boot in non-secure (NS) mode. Certain
impossible actions will be skipped if the CPU is in NS mode,
such as ARM architectural timer initialization.
- Linux Kernel Interface:
CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only]
When transferring memsize parameter to Linux, some versions
expect it to be in bytes, others in MB.
Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
CONFIG_OF_LIBFDT
New kernel versions are expecting firmware settings to be
passed using flattened device trees (based on open firmware
concepts).
CONFIG_OF_LIBFDT
* New libfdt-based support
* Adds the "fdt" command
* The bootm command automatically updates the fdt
OF_TBCLK - The timebase frequency.
boards with QUICC Engines require OF_QE to set UCC MAC
addresses
CONFIG_OF_BOARD_SETUP
Board code has addition modification that it wants to make
to the flat device tree before handing it off to the kernel
CONFIG_OF_SYSTEM_SETUP
Other code has addition modification that it wants to make
to the flat device tree before handing it off to the kernel.
This causes ft_system_setup() to be called before booting
the kernel.
CONFIG_OF_IDE_FIXUP
U-Boot can detect if an IDE device is present or not.
If not, and this new config option is activated, U-Boot
removes the ATA node from the DTS before booting Linux,
so the Linux IDE driver does not probe the device and
crash. This is needed for buggy hardware (uc101) where
no pull down resistor is connected to the signal IDE5V_DD7.
CONFIG_MACH_TYPE [relevant for ARM only][mandatory]
This setting is mandatory for all boards that have only one
machine type and must be used to specify the machine type
number as it appears in the ARM machine registry
(see https://www.arm.linux.org.uk/developer/machines/).
Only boards that have multiple machine types supported
in a single configuration file and the machine type is
runtime discoverable, do not have to use this setting.
- vxWorks boot parameters:
bootvx constructs a valid bootline using the following
environments variables: bootdev, bootfile, ipaddr, netmask,
serverip, gatewayip, hostname, othbootargs.
It loads the vxWorks image pointed bootfile.
Note: If a "bootargs" environment is defined, it will override
the defaults discussed just above.
- Cache Configuration:
CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot
- Cache Configuration for ARM:
CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache
controller
CONFIG_SYS_PL310_BASE - Physical base address of PL310
controller register space
- Serial Ports:
CONFIG_PL010_SERIAL
Define this if you want support for Amba PrimeCell PL010 UARTs.
CONFIG_PL011_SERIAL
Define this if you want support for Amba PrimeCell PL011 UARTs.
CONFIG_PL011_CLOCK
If you have Amba PrimeCell PL011 UARTs, set this variable to
the clock speed of the UARTs.
CONFIG_PL01x_PORTS
If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
define this to a list of base addresses for each (supported)
port. See e.g. include/configs/versatile.h
CONFIG_SERIAL_HW_FLOW_CONTROL
Define this variable to enable hw flow control in serial driver.
Current user of this option is drivers/serial/nsl16550.c driver
- Autoboot Command:
CONFIG_BOOTCOMMAND
Only needed when CONFIG_BOOTDELAY is enabled;
define a command string that is automatically executed
when no character is read on the console interface
within "Boot Delay" after reset.
CONFIG_RAMBOOT and CONFIG_NFSBOOT
The value of these goes into the environment as
"ramboot" and "nfsboot" respectively, and can be used
as a convenience, when switching between booting from
RAM and NFS.
- Serial Download Echo Mode:
CONFIG_LOADS_ECHO
If defined to 1, all characters received during a
serial download (using the "loads" command) are
echoed back. This might be needed by some terminal
emulations (like "cu"), but may as well just take
time on others. This setting #define's the initial
value of the "loads_echo" environment variable.
- Kgdb Serial Baudrate: (if CONFIG_CMD_KGDB is defined)
CONFIG_KGDB_BAUDRATE
Select one of the baudrates listed in
CONFIG_SYS_BAUDRATE_TABLE, see below.
- Removal of commands
If no commands are needed to boot, you can disable
CONFIG_CMDLINE to remove them. In this case, the command line
will not be available, and when U-Boot wants to execute the
boot command (on start-up) it will call board_run_command()
instead. This can reduce image size significantly for very
simple boot procedures.
- Regular expression support:
CONFIG_REGEX
If this variable is defined, U-Boot is linked against
the SLRE (Super Light Regular Expression) library,
which adds regex support to some commands, as for
example "env grep" and "setexpr".
- Device tree:
CONFIG_OF_CONTROL
If this variable is defined, U-Boot will use a device tree
to configure its devices, instead of relying on statically
compiled #defines in the board file. This option is
experimental and only available on a few boards. The device
tree is available in the global data as gd->fdt_blob.
U-Boot needs to get its device tree from somewhere. This can
be done using one of the three options below:
CONFIG_OF_EMBED
If this variable is defined, U-Boot will embed a device tree
binary in its image. This device tree file should be in the
board directory and called <soc>-<board>.dts. The binary file
is then picked up in board_init_f() and made available through
the global data structure as gd->fdt_blob.
CONFIG_OF_SEPARATE
If this variable is defined, U-Boot will build a device tree
binary. It will be called u-boot.dtb. Architecture-specific
code will locate it at run-time. Generally this works by:
cat u-boot.bin u-boot.dtb >image.bin
and in fact, U-Boot does this for you, creating a file called
u-boot-dtb.bin which is useful in the common case. You can
still use the individual files if you need something more
exotic.
CONFIG_OF_BOARD
If this variable is defined, U-Boot will use the device tree
provided by the board at runtime instead of embedding one with
the image. Only boards defining board_fdt_blob_setup() support
this option (see include/fdtdec.h file).
- Watchdog:
CONFIG_WATCHDOG
If this variable is defined, it enables watchdog
support for the SoC. There must be support in the SoC
specific code for a watchdog. For the 8xx
CPUs, the SIU Watchdog feature is enabled in the SYPCR
register. When supported for a specific SoC is
available, then no further board specific code should
be needed to use it.
CONFIG_HW_WATCHDOG
When using a watchdog circuitry external to the used
SoC, then define this variable and provide board
specific code for the "hw_watchdog_reset" function.
CONFIG_SYS_WATCHDOG_FREQ
Some platforms automatically call WATCHDOG_RESET()
from the timer interrupt handler every
CONFIG_SYS_WATCHDOG_FREQ interrupts. If not set by the
board configuration file, a default of CONFIG_SYS_HZ/2
(i.e. 500) is used. Setting CONFIG_SYS_WATCHDOG_FREQ
to 0 disables calling WATCHDOG_RESET() from the timer
interrupt.
- Real-Time Clock:
When CONFIG_CMD_DATE is selected, the type of the RTC
has to be selected, too. Define exactly one of the
following options:
CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC
CONFIG_RTC_MC13XXX - use MC13783 or MC13892 RTC
CONFIG_RTC_MC146818 - use MC146818 RTC
CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC
CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC
CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC
CONFIG_RTC_DS1339 - use Maxim, Inc. DS1339 RTC
CONFIG_RTC_DS164x - use Dallas DS164x RTC
CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC
CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC
CONFIG_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337
CONFIG_SYS_RV3029_TCR - enable trickle charger on
RV3029 RTC.
Note that if the RTC uses I2C, then the I2C interface
must also be configured. See I2C Support, below.
- GPIO Support:
CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO
The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of
chip-ngpio pairs that tell the PCA953X driver the number of
pins supported by a particular chip.
Note that if the GPIO device uses I2C, then the I2C interface
must also be configured. See I2C Support, below.
- I/O tracing:
When CONFIG_IO_TRACE is selected, U-Boot intercepts all I/O
accesses and can checksum them or write a list of them out
to memory. See the 'iotrace' command for details. This is
useful for testing device drivers since it can confirm that
the driver behaves the same way before and after a code
change. Currently this is supported on sandbox and arm. To
add support for your architecture, add '#include <iotrace.h>'
to the bottom of arch/<arch>/include/asm/io.h and test.
Example output from the 'iotrace stats' command is below.
Note that if the trace buffer is exhausted, the checksum will
still continue to operate.
iotrace is enabled
Start: 10000000 (buffer start address)
Size: 00010000 (buffer size)
Offset: 00000120 (current buffer offset)
Output: 10000120 (start + offset)
Count: 00000018 (number of trace records)
CRC32: 9526fb66 (CRC32 of all trace records)
- Timestamp Support:
When CONFIG_TIMESTAMP is selected, the timestamp
(date and time) of an image is printed by image
commands like bootm or iminfo. This option is
automatically enabled when you select CONFIG_CMD_DATE .
- Partition Labels (disklabels) Supported:
Zero or more of the following:
CONFIG_MAC_PARTITION Apple's MacOS partition table.
CONFIG_ISO_PARTITION ISO partition table, used on CDROM etc.
CONFIG_EFI_PARTITION GPT partition table, common when EFI is the
bootloader. Note 2TB partition limit; see
disk/part_efi.c
CONFIG_SCSI) you must configure support for at
least one non-MTD partition type as well.
- IDE Reset method:
CONFIG_IDE_RESET_ROUTINE - this is defined in several
board configurations files but used nowhere!
CONFIG_IDE_RESET - is this is defined, IDE Reset will
be performed by calling the function
ide_set_reset(int reset)
which has to be defined in a board specific file
- ATAPI Support:
CONFIG_ATAPI
Set this to enable ATAPI support.
- LBA48 Support
CONFIG_LBA48
Set this to enable support for disks larger than 137GB
Also look at CONFIG_SYS_64BIT_LBA.
Whithout these , LBA48 support uses 32bit variables and will 'only'
support disks up to 2.1TB.
CONFIG_SYS_64BIT_LBA:
When enabled, makes the IDE subsystem use 64bit sector addresses.
Default is 32bit.
- SCSI Support:
CONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and
CONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID *
CONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the
maximum numbers of LUNs, SCSI ID's and target
devices.
The environment variable 'scsidevs' is set to the number of
SCSI devices found during the last scan.
- NETWORK Support (PCI):
CONFIG_E1000
Support for Intel 8254x/8257x gigabit chips.
CONFIG_E1000_SPI
Utility code for direct access to the SPI bus on Intel 8257x.
This does not do anything useful unless you set at least one
of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.
CONFIG_E1000_SPI_GENERIC
Allow generic access to the SPI bus on the Intel 8257x, for
example with the "sspi" command.
CONFIG_NATSEMI
Support for National dp83815 chips.
CONFIG_NS8382X
Support for National dp8382[01] gigabit chips.
- NETWORK Support (other):
CONFIG_DRIVER_AT91EMAC
Support for AT91RM9200 EMAC.
CONFIG_RMII
Define this to use reduced MII inteface
CONFIG_DRIVER_AT91EMAC_QUIET
If this defined, the driver is quiet.
The driver doen't show link status messages.
CONFIG_CALXEDA_XGMAC
Support for the Calxeda XGMAC device
CONFIG_LAN91C96
Support for SMSC's LAN91C96 chips.
CONFIG_LAN91C96_USE_32_BIT
Define this to enable 32 bit addressing
CONFIG_SMC91111
Support for SMSC's LAN91C111 chip
CONFIG_SMC91111_BASE
Define this to hold the physical address
of the device (I/O space)
CONFIG_SMC_USE_32_BIT
Define this if data bus is 32 bits
CONFIG_SMC_USE_IOFUNCS
Define this to use i/o functions instead of macros
(some hardware wont work with macros)
CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
Define this if you have more then 3 PHYs.
CONFIG_FTGMAC100
Support for Faraday's FTGMAC100 Gigabit SoC Ethernet
CONFIG_FTGMAC100_EGIGA
Define this to use GE link update with gigabit PHY.
Define this if FTGMAC100 is connected to gigabit PHY.
If your system has 10/100 PHY only, it might not occur
wrong behavior. Because PHY usually return timeout or
useless data when polling gigabit status and gigabit
control registers. This behavior won't affect the
correctnessof 10/100 link speed update.
CONFIG_SH_ETHER
Support for Renesas on-chip Ethernet controller
CONFIG_SH_ETHER_USE_PORT
Define the number of ports to be used
CONFIG_SH_ETHER_PHY_ADDR
Define the ETH PHY's address
CONFIG_SH_ETHER_CACHE_WRITEBACK
If this option is set, the driver enables cache flush.
- TPM Support:
CONFIG_TPM
Support TPM devices.
CONFIG_TPM_TIS_INFINEON
Support for Infineon i2c bus TPM devices. Only one device
per system is supported at this time.
CONFIG_TPM_TIS_I2C_BURST_LIMITATION
Define the burst count bytes upper limit
CONFIG_TPM_ST33ZP24
Support for STMicroelectronics TPM devices. Requires DM_TPM support.
CONFIG_TPM_ST33ZP24_I2C
Support for STMicroelectronics ST33ZP24 I2C devices.
Requires TPM_ST33ZP24 and I2C.
CONFIG_TPM_ST33ZP24_SPI
Support for STMicroelectronics ST33ZP24 SPI devices.
Requires TPM_ST33ZP24 and SPI.
CONFIG_TPM_ATMEL_TWI
Support for Atmel TWI TPM device. Requires I2C support.
CONFIG_TPM_TIS_LPC
Support for generic parallel port TPM devices. Only one device
per system is supported at this time.
CONFIG_TPM_TIS_BASE_ADDRESS
Base address where the generic TPM device is mapped
to. Contemporary x86 systems usually map it at
0xfed40000.
CONFIG_TPM
Define this to enable the TPM support library which provides
functional interfaces to some TPM commands.
Requires support for a TPM device.
CONFIG_TPM_AUTH_SESSIONS
Define this to enable authorized functions in the TPM library.
Requires CONFIG_TPM and CONFIG_SHA1.
- USB Support:
At the moment only the UHCI host controller is
supported (PIP405, MIP405); define
CONFIG_USB_UHCI to enable it.
define CONFIG_USB_KEYBOARD to enable the USB Keyboard
and define CONFIG_USB_STORAGE to enable the USB
storage devices.
Note:
Supported are USB Keyboards and USB Floppy drives
(TEAC FD-05PUB).