VhdlLyxEntityGeneratorWrapper.py

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## 
## Register map generation tool
##
## Copyright (C) 2018 Ondrej Ille <ondrej.ille@gmail.com>
##
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###############################################################################

###############################################################################
##   
##   Class for generation of Lyx tables from VHDL entity interfaces!
##   
##	Revision history:
##      17.3.2019  First implementation
##
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import argparse
import sys
import time
import importlib.util
import os
import inspect
import math

from .gen_lib import *
from .doc_gen.vhdl_lyx_interface_gen import VhdlLyxEntityGenerator


class VhdlLyxEntityGeneratorWrapper():

	# Output where to write the VHDL package.
	config = None

	# Lyx template path
	lyxTemplate = ""

	# Lyx generator
	gen = None

	def set_config(self, config):
		self.config = config


	def do_update(self):
		"""
		"""

		if (not "source_list" in self.config):
			print("Source list for conversion is not defined")
			return

		if (not "template" in self.config):
			print("Lyx template for conversion is not defined")
			return            

		self.lyxTemplate = self.config["template"]

		for (name, cfg) in self.config["source_list"].items():

			print("*" * 80)
			print("Processing {} entity".format(name))
			print("*" * 80)

			self.gen = VhdlLyxEntityGenerator()

			out_f = open(cfg["lyx_output"], 'w') 
			self.gen.set_of(out_f)

			self.gen.lyxGen.load_lyx_template(self.lyxTemplate)

			in_f = open(cfg["vhdl_file"], 'r')
			self.gen.set_vhdlFile(in_f)

			self.gen.generate_lyx_table_from_vhdl_entity()

			self.gen.lyxGen.commit_append_lines_all()
			self.gen.commit_to_file()

			out_f.close()
			in_f.close()

	if __name__ == '__main__':
		self.do_update()