You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
The CSub instruction is currently functionally identical to the RISC-V's sub instruction. The only reason to keep it is to separate pointer operations from integer ones, which could become important in future ISA versions. For example:
capability addresses might be reduced to less than XLEN width, freeing up capability encoding bits for other uses. In this case CSub may or may not be the same as sub.
if capability registers were separate from integer ones (split register files).
At the very least we should add some discussion of this to the page in ISA reference.
The text was updated successfully, but these errors were encountered:
The
CSub
instruction is currently functionally identical to the RISC-V'ssub
instruction. The only reason to keep it is to separate pointer operations from integer ones, which could become important in future ISA versions. For example:CSub
may or may not be the same assub
.At the very least we should add some discussion of this to the page in ISA reference.
The text was updated successfully, but these errors were encountered: