From fbc5d0446f90de13569fe2e50bb57a5e28de6f6c Mon Sep 17 00:00:00 2001 From: Eric Norberg Date: Thu, 12 Dec 2024 11:52:39 +0100 Subject: [PATCH] =?UTF-8?q?Fix=20typos=20'instrution'=20=E2=86=92=20'instr?= =?UTF-8?q?uction'=20around=20whole=20repo=20(#31)?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- formal/uniqueness.tex | 2 +- hub/columns/scenarios/call.tex | 2 +- hub/generalities/stamps/kec.tex | 2 +- hub/instruction_handling/call/intro.tex | 2 +- hub/instruction_handling/call/triggers/mxp.tex | 2 +- hub/instruction_handling/create/triggers/oob.tex | 2 +- mmu/columns/macro.tex | 2 +- mmu/columns/shared.tex | 4 ++-- .../exoToRamTransplants/micro_instruction_writing.tex | 2 +- mmu/instructions/invalidCodePrefix/_inputs.tex | 2 +- mmu/instructions/mload/_inputs.tex | 2 +- mmu/instructions/modexpData/intro.tex | 2 +- mmu/instructions/modexpData/micro_instruction_writing.tex | 4 ++-- mmu/instructions/mstore/_inputs.tex | 2 +- mmu/instructions/mstore8/_inputs.tex | 2 +- .../ramToExoWithPadding/micro_instruction_writing.tex | 2 +- .../rightPaddedWordExtraction/micro_instruction_writing.tex | 2 +- shf/instructions.tex | 4 ++-- stp/columns.tex | 2 +- 19 files changed, 22 insertions(+), 22 deletions(-) diff --git a/formal/uniqueness.tex b/formal/uniqueness.tex index 429d9bf..1431df0 100644 --- a/formal/uniqueness.tex +++ b/formal/uniqueness.tex @@ -10,7 +10,7 @@ \item type constraints for \godGiven{} inputs; \item $\zkEvmModuleRel_{\moduleName}(\fullTrace_\moduleName) = \mTrue$ \end{enumerate} -Let us assumed that we have established \textbf{uniqueness of scaffolding}. Then we can focus on the computations that fit inside the scaffolding. You can have the following notion of \textbf{essential uniqueness}: the cells that actively participate in the computation are determined by inputs alone. Here we superimpose on the computation which is hopefully captured by the constraint system the idea that some cells represent ``\textbf{inputs}'' while others represent ``\textbf{outputs}''. This is of course a natural point of view but breaks down when you consider the detail of how modules function. Modules typically get their instrutions served with inputs \emph{and} predicted outputs. And in that sense they aren't producing outputs, rather verifying that predicted outputs fit into a constraint system. +Let us assumed that we have established \textbf{uniqueness of scaffolding}. Then we can focus on the computations that fit inside the scaffolding. You can have the following notion of \textbf{essential uniqueness}: the cells that actively participate in the computation are determined by inputs alone. Here we superimpose on the computation which is hopefully captured by the constraint system the idea that some cells represent ``\textbf{inputs}'' while others represent ``\textbf{outputs}''. This is of course a natural point of view but breaks down when you consider the detail of how modules function. Modules typically get their instructions served with inputs \emph{and} predicted outputs. And in that sense they aren't producing outputs, rather verifying that predicted outputs fit into a constraint system. Here is a slightly more precise notion. For a given computation performed by a given module one can, given scaffolding guarantees, identify individual cells as carrying ``inputs'' and others as carrying ``outputs''. Constraints apply globally throughout the trace but may be ``prescriptive'' only in certain circumstances e.g. \begin{Verbatim}[commandchars=\\\{\}] diff --git a/hub/columns/scenarios/call.tex b/hub/columns/scenarios/call.tex index e602fab..86be15f 100644 --- a/hub/columns/scenarios/call.tex +++ b/hub/columns/scenarios/call.tex @@ -9,7 +9,7 @@ \item \scenCallAbortWontRevert: turns on for unexceptional \inst{CALL}-type instructions that abort and which won't be rolled back; \end{enumerate} -The columns below pertain to unexceptional, unaborted \inst{CALL}-type instrutions i.e. \inst{CALL}'s that are entered. +The columns below pertain to unexceptional, unaborted \inst{CALL}-type instructions i.e. \inst{CALL}'s that are entered. For the sake of clarity we provide our working definition of \textbf{precompiles}, \textbf{externally owned accounts} and \textbf{smart contracts}. A \textbf{precompile} is an account whose address is in the range $\{\texttt{0x01},\texttt{0x02},\dots, \texttt{0x09}\}$. A \textbf{smart contract} is any account with nonempty bytecode. diff --git a/hub/generalities/stamps/kec.tex b/hub/generalities/stamps/kec.tex index b457d0f..64adeaa 100644 --- a/hub/generalities/stamps/kec.tex +++ b/hub/generalities/stamps/kec.tex @@ -42,7 +42,7 @@ for the justification concerning the interpretation of ``$\stackDecCreateFlag \cdot \decFlag{2}$'' and ``$\stackDecHaltFlag \cdot \decFlag{1}$''. \saNote{} -Other than the underlying instrution being unexceptional, the arithmetization only triggers the \stackHashInfoFlag{} when the relevant \texttt{size} parameter is nonzero. +Other than the underlying instruction being unexceptional, the arithmetization only triggers the \stackHashInfoFlag{} when the relevant \texttt{size} parameter is nonzero. When the size parameter is zero the \hashInfoMod{} module does not get called upon, rather we manually insert $\emptyKeccak{}$\footnote{Or, more accurately $\emptyKeccakHi$ and $\emptyKeccakLo$} in the relevant cells of the trace. \saNote{} diff --git a/hub/instruction_handling/call/intro.tex b/hub/instruction_handling/call/intro.tex index 4112fcb..d8489bd 100644 --- a/hub/instruction_handling/call/intro.tex +++ b/hub/instruction_handling/call/intro.tex @@ -3,7 +3,7 @@ These are among the most complex instructions in the \evm{} and certainly in the present arithmetization. Their complexity stems from the following main reasons: (\emph{a}) the manifold ways in which \inst{CALL}-type instructions may raise an exception -(\emph{b}) the possibility for unexceptional instrutions to be aborted yet +(\emph{b}) the possibility for unexceptional instructions to be aborted yet (\emph{c}) the possibility for unexceptional, unaborted \inst{CALL}-type instructions to be reverted later. Furthermore (\emph{d}) instruction-processing must differentiate the case where the target is an \textbf{externally owned account} (which leads to no code execution), a \textbf{smart contract} or a \textbf{precompile}. diff --git a/hub/instruction_handling/call/triggers/mxp.tex b/hub/instruction_handling/call/triggers/mxp.tex index 1a01010..ec04806 100644 --- a/hub/instruction_handling/call/triggers/mxp.tex +++ b/hub/instruction_handling/call/triggers/mxp.tex @@ -7,4 +7,4 @@ + & \scenCallUnexceptional _{i} \\ \end{array} \right] \] -In other words the \mxpMod{} will be triggered in all cases \emph{except for} that of a \staticxSH{} (and of \suxSH{}'s, which are caught ahead of instrution processing.) +In other words the \mxpMod{} will be triggered in all cases \emph{except for} that of a \staticxSH{} (and of \suxSH{}'s, which are caught ahead of instruction processing.) diff --git a/hub/instruction_handling/create/triggers/oob.tex b/hub/instruction_handling/create/triggers/oob.tex index e1b4695..99070f6 100644 --- a/hub/instruction_handling/create/triggers/oob.tex +++ b/hub/instruction_handling/create/triggers/oob.tex @@ -2,4 +2,4 @@ \[ \locTriggerOob \define \scenCreateUnexceptional _{i} \] -\saNote{} Recall that the the \oobMod{} module detects aborting conditions and failure conditions for \inst{CREATE}-type instrutions. +\saNote{} Recall that the the \oobMod{} module detects aborting conditions and failure conditions for \inst{CREATE}-type instructions. diff --git a/mmu/columns/macro.tex b/mmu/columns/macro.tex index 3a8c464..25b8aa9 100644 --- a/mmu/columns/macro.tex +++ b/mmu/columns/macro.tex @@ -1,4 +1,4 @@ -The following columns belong to the ``macro-instrution'' perspective, i.e. their contents behave as expected only on +The following columns belong to the ``macro-instruction'' perspective, i.e. their contents behave as expected only on \textbf{macro-instruction-rows}. \begin{enumerate} \item \macroInst{}: diff --git a/mmu/columns/shared.tex b/mmu/columns/shared.tex index bb8b493..7a6c39d 100644 --- a/mmu/columns/shared.tex +++ b/mmu/columns/shared.tex @@ -1,6 +1,6 @@ \begin{enumerate} \item $\mmuStamp$: - macro-instruction stamp column; increases by one with every (macro) instrution processed by the \mmuMod{} module; + macro-instruction stamp column; increases by one with every (macro) instruction processed by the \mmuMod{} module; \item $\microStamp$: micro-instruction stamp column; a single macro-instruction may give rise to several micro-instructions dealt with in the \mmioMod{} module; \end{enumerate} @@ -66,7 +66,7 @@ \item \mmuInstFlagModexpData{}: \item \mmuInstFlagBlake{}: \end{enumerate} -We introduce binary columns that will help us orient ourselves within the micro-instrution-writing-rows. +We introduce binary columns that will help us orient ourselves within the micro-instruction-writing-rows. \begin{enumerate}[resume] \item $\isLeftZero$: binary column that lights up for ``left zero rows''; diff --git a/mmu/instructions/exoToRamTransplants/micro_instruction_writing.tex b/mmu/instructions/exoToRamTransplants/micro_instruction_writing.tex index 3b5443e..618e01a 100644 --- a/mmu/instructions/exoToRamTransplants/micro_instruction_writing.tex +++ b/mmu/instructions/exoToRamTransplants/micro_instruction_writing.tex @@ -3,7 +3,7 @@ \end{center} The micro-instruction-writing phase is very simple: the same instruction gets repeated over and over again (with incrementing source and target limb offsets, that is.) \begin{description} - \item[\underline{Progression:}] \label{mmu: instructions: modexpdata: micro instrution writing: tlo progression} + \item[\underline{Progression:}] \label{mmu: instructions: modexpdata: micro instruction writing: tlo progression} we impose generally \If $\isMicro_{i} = 1$ \Then \begin{enumerate} \item $\stdProgression_{i}\Big[\isMicro, \microSlo \Big]$ diff --git a/mmu/instructions/invalidCodePrefix/_inputs.tex b/mmu/instructions/invalidCodePrefix/_inputs.tex index 82bc54f..d50d51b 100644 --- a/mmu/instructions/invalidCodePrefix/_inputs.tex +++ b/mmu/instructions/invalidCodePrefix/_inputs.tex @@ -1 +1 @@ -\subsubsection{Pre-processing and micro-instruction-writing} \label{mmu: instrutions: invalid code prefix: preprocessing and micro instruction writing} \input{instructions/invalidCodePrefix/preprocessing} +\subsubsection{Pre-processing and micro-instruction-writing} \label{mmu: instructions: invalid code prefix: preprocessing and micro instruction writing} \input{instructions/invalidCodePrefix/preprocessing} diff --git a/mmu/instructions/mload/_inputs.tex b/mmu/instructions/mload/_inputs.tex index 24d671c..923f28c 100644 --- a/mmu/instructions/mload/_inputs.tex +++ b/mmu/instructions/mload/_inputs.tex @@ -1 +1 @@ -\subsubsection{Pre-processing and micro-instruction-writing} \label{mmu: instrutions: mload: preprocessing and micro instruction writing} \input{instructions/mload/preprocessing} +\subsubsection{Pre-processing and micro-instruction-writing} \label{mmu: instructions: mload: preprocessing and micro instruction writing} \input{instructions/mload/preprocessing} diff --git a/mmu/instructions/modexpData/intro.tex b/mmu/instructions/modexpData/intro.tex index 8e6c1a4..6f3fb8c 100644 --- a/mmu/instructions/modexpData/intro.tex +++ b/mmu/instructions/modexpData/intro.tex @@ -34,7 +34,7 @@ \end{array} \right. \] \end{description} -Using shorthands introduced in section~(\ref{mmu: instrutions: modexpdata: shorthands}) we will furthermore be guaranteed that +Using shorthands introduced in section~(\ref{mmu: instructions: modexpdata: shorthands}) we will furthermore be guaranteed that \[ \left\{ \begin{array}{l} 0 < \locModexpParamByteSize \leq 512 \\ diff --git a/mmu/instructions/modexpData/micro_instruction_writing.tex b/mmu/instructions/modexpData/micro_instruction_writing.tex index 2a4f459..74e2aee 100644 --- a/mmu/instructions/modexpData/micro_instruction_writing.tex +++ b/mmu/instructions/modexpData/micro_instruction_writing.tex @@ -2,7 +2,7 @@ \end{center} We impose the following: \begin{description} - \item[\underline{Progression:}] \label{mmu: instructions: modexpdata: micro instrution writing: tlo progression} + \item[\underline{Progression:}] \label{mmu: instructions: modexpdata: micro instruction writing: tlo progression} we impose generally \If $\isMicro_{i} = 1$ \Then $\stdProgression_{i}\Big[\isMicro, \microTlo \Big]$ \end{description} \saNote{} \label{mmu: modexData: microTLO explanation} Recall that in the present case (\mmuInstFlagModexpData{} instruction) the we have @@ -194,4 +194,4 @@ \saNote{} Let us say a few words on the ``\textbf{multiple nontrivial rows case}'' and in particular let us address the matter of the \microSlo, \microSbo, \microTlo{} and \microTbo{} supposedly being already set (except for on the first nontrivial row.) This results from the fact that the first nontrivial row and all middle rows \textbf{pay forward} in terms of \microSlo, \microSbo, and \microTbo{}. -When it comes to \microTlo{} the behavior of this column was already settled at the start, see here~(\ref{mmu: instructions: modexpdata: micro instrution writing: tlo progression}). +When it comes to \microTlo{} the behavior of this column was already settled at the start, see here~(\ref{mmu: instructions: modexpdata: micro instruction writing: tlo progression}). diff --git a/mmu/instructions/mstore/_inputs.tex b/mmu/instructions/mstore/_inputs.tex index 849f2f4..853b6c5 100644 --- a/mmu/instructions/mstore/_inputs.tex +++ b/mmu/instructions/mstore/_inputs.tex @@ -1 +1 @@ -\subsubsection{Pre-processing and micro-instruction-writing} \label{mmu: instrutions: mstore: preprocessing and micro instruction writing} \input{instructions/mstore/preprocessing} +\subsubsection{Pre-processing and micro-instruction-writing} \label{mmu: instructions: mstore: preprocessing and micro instruction writing} \input{instructions/mstore/preprocessing} diff --git a/mmu/instructions/mstore8/_inputs.tex b/mmu/instructions/mstore8/_inputs.tex index be6d5c4..d44cec1 100644 --- a/mmu/instructions/mstore8/_inputs.tex +++ b/mmu/instructions/mstore8/_inputs.tex @@ -1 +1 @@ -\subsubsection{Pre-processing and micro-instruction-writing} \label{mmu: instrutions: mstore8: preprocessing and micro instruction writing} \input{instructions/mstore8/preprocessing} +\subsubsection{Pre-processing and micro-instruction-writing} \label{mmu: instructions: mstore8: preprocessing and micro instruction writing} \input{instructions/mstore8/preprocessing} diff --git a/mmu/instructions/ramToExoWithPadding/micro_instruction_writing.tex b/mmu/instructions/ramToExoWithPadding/micro_instruction_writing.tex index 0ad675f..204098f 100644 --- a/mmu/instructions/ramToExoWithPadding/micro_instruction_writing.tex +++ b/mmu/instructions/ramToExoWithPadding/micro_instruction_writing.tex @@ -2,7 +2,7 @@ We impose the following: \begin{description} - \item[\underline{Progression:}] \label{mmu: instructions: modexpdata: micro instrution writing: tlo progression} + \item[\underline{Progression:}] \label{mmu: instructions: modexpdata: micro instruction writing: tlo progression} we impose generally \If $\isMicro_{i} = 1$ \Then: \begin{enumerate} \item $\stdProgression_{i}\Big[\isMicro, \microTlo \Big]$ diff --git a/mmu/instructions/rightPaddedWordExtraction/micro_instruction_writing.tex b/mmu/instructions/rightPaddedWordExtraction/micro_instruction_writing.tex index 945a65e..7afec53 100644 --- a/mmu/instructions/rightPaddedWordExtraction/micro_instruction_writing.tex +++ b/mmu/instructions/rightPaddedWordExtraction/micro_instruction_writing.tex @@ -95,7 +95,7 @@ \item \If $\locSecondLimbSingleSource = 0$ \Then $\locSecondMicroInst \define \mmioInstRamToLimbTwoSource$ \end{enumerate} \end{enumerate} - \saNote{} The \mmioMod{} is going to carry out a second micro-instrution even if the second limb to be extracted is empty i.e. in case $\locSecondLimbVoid \equiv 1$. + \saNote{} The \mmioMod{} is going to carry out a second micro-instruction even if the second limb to be extracted is empty i.e. in case $\locSecondLimbVoid \equiv 1$. We have chosen for that instruction to be \mmioInstLimbVanishes{}. In order for this instruction to not affect exogenous data modules we impose that no exogneous data be loaded. This follows from $\microExoSum \equiv 0$. diff --git a/shf/instructions.tex b/shf/instructions.tex index 8155449..9284853 100644 --- a/shf/instructions.tex +++ b/shf/instructions.tex @@ -1,4 +1,4 @@ -The \textbf{shifting module} deals with the following instrutions: +The \textbf{shifting module} deals with the following instructions: \begin{multicols}{3} \begin{enumerate} \item \inst{SHR} @@ -6,4 +6,4 @@ \item \inst{SAR} \end{enumerate} \end{multicols} -\noindent In previous iterations of our \zkEvm{} these instructions were dealt with in the binary module. \ No newline at end of file +\noindent In previous iterations of our \zkEvm{} these instructions were dealt with in the binary module. diff --git a/stp/columns.tex b/stp/columns.tex index cd46176..30e8f56 100644 --- a/stp/columns.tex +++ b/stp/columns.tex @@ -51,7 +51,7 @@ The \gasUpfront{} excludes (\emph{a}) gas paid out of pocket by the caller to the callee (resp. creator to the createe); (\emph{b}) leftover gas that gets paid back after the \inst{CALL}/\inst{CREATE}-type instruction terminates execution and the current context resumes. -Thus \gasUpfront{} is the part of the instruction's gas cost that determines whether one of these instrutions raises an \oogxSH{}. +Thus \gasUpfront{} is the part of the instruction's gas cost that determines whether one of these instructions raises an \oogxSH{}. We further introduce columns that allow us to duplicate values from the current module and make them available in a straightforward manner to the \wcpMod{} and \modMod{} modules for certain computations. \begin{enumerate}[resume]