diff --git a/src/hotspot/cpu/riscv/globals_riscv.hpp b/src/hotspot/cpu/riscv/globals_riscv.hpp
index 6772fae50ca14..806cca16269ea 100644
--- a/src/hotspot/cpu/riscv/globals_riscv.hpp
+++ b/src/hotspot/cpu/riscv/globals_riscv.hpp
@@ -115,6 +115,7 @@ define_pd_global(intx, InlineSmallCode, 1000);
"Use Zihintpause instructions") \
product(bool, UseZtso, false, EXPERIMENTAL, "Assume Ztso memory model") \
product(bool, UseZvbb, false, EXPERIMENTAL, "Use Zvbb instructions") \
+ product(bool, UseZvbc, false, EXPERIMENTAL, "Use Zvbc instructions") \
product(bool, UseZvfh, false, DIAGNOSTIC, "Use Zvfh instructions") \
product(bool, UseZvkn, false, EXPERIMENTAL, \
"Use Zvkn group extension, Zvkned, Zvknhb, Zvkb, Zvkt") \
diff --git a/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp b/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp
index 07c5a940a5091..17289891ccdf9 100644
--- a/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp
+++ b/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp
@@ -1712,6 +1712,359 @@ void MacroAssembler::vector_update_crc32(Register crc, Register buf, Register le
addi(buf, buf, N*4);
}
}
+
+void MacroAssembler::crc32_vclmul_fold_16_bytes_vectorsize_16(VectorRegister vx, VectorRegister vt,
+ VectorRegister vtmp1, VectorRegister vtmp2, VectorRegister vtmp3, VectorRegister vtmp4,
+ Register buf, Register tmp, const int STEP) {
+ assert_different_registers(vx, vt, vtmp1, vtmp2, vtmp3, vtmp4);
+ vclmul_vv(vtmp1, vx, vt);
+ vclmulh_vv(vtmp2, vx, vt);
+ vle64_v(vtmp4, buf); addi(buf, buf, STEP);
+ // low parts
+ vredxor_vs(vtmp3, vtmp1, vtmp4);
+ // high parts
+ vslidedown_vi(vx, vtmp4, 1);
+ vredxor_vs(vtmp1, vtmp2, vx);
+ // merge low and high back
+ vslideup_vi(vx, vtmp1, 1);
+ vmv_x_s(tmp, vtmp3);
+ vmv_s_x(vx, tmp);
+}
+
+void MacroAssembler::crc32_vclmul_fold_16_bytes_vectorsize_16_2(VectorRegister vx, VectorRegister vy, VectorRegister vt,
+ VectorRegister vtmp1, VectorRegister vtmp2, VectorRegister vtmp3, VectorRegister vtmp4,
+ Register tmp) {
+ assert_different_registers(vx, vy, vt, vtmp1, vtmp2, vtmp3, vtmp4);
+ vclmul_vv(vtmp1, vx, vt);
+ vclmulh_vv(vtmp2, vx, vt);
+ // low parts
+ vredxor_vs(vtmp3, vtmp1, vy);
+ // high parts
+ vslidedown_vi(vtmp4, vy, 1);
+ vredxor_vs(vtmp1, vtmp2, vtmp4);
+ // merge low and high back
+ vslideup_vi(vx, vtmp1, 1);
+ vmv_x_s(tmp, vtmp3);
+ vmv_s_x(vx, tmp);
+}
+
+void MacroAssembler::crc32_vclmul_fold_16_bytes_vectorsize_16_3(VectorRegister vx, VectorRegister vy, VectorRegister vt,
+ VectorRegister vtmp1, VectorRegister vtmp2, VectorRegister vtmp3, VectorRegister vtmp4,
+ Register tmp) {
+ assert_different_registers(vx, vy, vt, vtmp1, vtmp2, vtmp3, vtmp4);
+ vclmul_vv(vtmp1, vx, vt);
+ vclmulh_vv(vtmp2, vx, vt);
+ // low parts
+ vredxor_vs(vtmp3, vtmp1, vy);
+ // high parts
+ vslidedown_vi(vtmp4, vy, 1);
+ vredxor_vs(vtmp1, vtmp2, vtmp4);
+ // merge low and high back
+ vslideup_vi(vy, vtmp1, 1);
+ vmv_x_s(tmp, vtmp3);
+ vmv_s_x(vy, tmp);
+}
+
+void MacroAssembler::kernel_crc32_vclmul_fold_vectorsize_16(Register crc, Register buf, Register len,
+ Register vclmul_table, Register tmp1, Register tmp2) {
+ assert_different_registers(crc, buf, len, vclmul_table, tmp1, tmp2, t1);
+ assert(MaxVectorSize == 16, "sanity");
+
+ const int TABLE_STEP = 16;
+ const int STEP = 16;
+ const int LOOP_STEP = 128;
+ const int N = 2;
+
+ Register loop_step = t1;
+
+ // ======== preparation ========
+
+ mv(loop_step, LOOP_STEP);
+ sub(len, len, loop_step);
+
+ vsetivli(zr, N, Assembler::e64, Assembler::m1, Assembler::mu, Assembler::tu);
+ vle64_v(v0, buf); addi(buf, buf, STEP);
+ vle64_v(v1, buf); addi(buf, buf, STEP);
+ vle64_v(v2, buf); addi(buf, buf, STEP);
+ vle64_v(v3, buf); addi(buf, buf, STEP);
+ vle64_v(v4, buf); addi(buf, buf, STEP);
+ vle64_v(v5, buf); addi(buf, buf, STEP);
+ vle64_v(v6, buf); addi(buf, buf, STEP);
+ vle64_v(v7, buf); addi(buf, buf, STEP);
+
+ vmv_v_x(v31, zr);
+ vsetivli(zr, 1, Assembler::e32, Assembler::m1, Assembler::mu, Assembler::tu);
+ vmv_s_x(v31, crc);
+ vsetivli(zr, N, Assembler::e64, Assembler::m1, Assembler::mu, Assembler::tu);
+ vxor_vv(v0, v0, v31);
+
+ // load table
+ vle64_v(v31, vclmul_table);
+
+ Label L_16_bytes_loop;
+ j(L_16_bytes_loop);
+
+
+ // ======== folding 128 bytes in data buffer per round ========
+
+ align(OptoLoopAlignment);
+ bind(L_16_bytes_loop);
+ {
+ crc32_vclmul_fold_16_bytes_vectorsize_16(v0, v31, v8, v9, v10, v11, buf, tmp2, STEP);
+ crc32_vclmul_fold_16_bytes_vectorsize_16(v1, v31, v12, v13, v14, v15, buf, tmp2, STEP);
+ crc32_vclmul_fold_16_bytes_vectorsize_16(v2, v31, v16, v17, v18, v19, buf, tmp2, STEP);
+ crc32_vclmul_fold_16_bytes_vectorsize_16(v3, v31, v20, v21, v22, v23, buf, tmp2, STEP);
+ crc32_vclmul_fold_16_bytes_vectorsize_16(v4, v31, v24, v25, v26, v27, buf, tmp2, STEP);
+ crc32_vclmul_fold_16_bytes_vectorsize_16(v5, v31, v8, v9, v10, v11, buf, tmp2, STEP);
+ crc32_vclmul_fold_16_bytes_vectorsize_16(v6, v31, v12, v13, v14, v15, buf, tmp2, STEP);
+ crc32_vclmul_fold_16_bytes_vectorsize_16(v7, v31, v16, v17, v18, v19, buf, tmp2, STEP);
+ }
+ sub(len, len, loop_step);
+ bge(len, loop_step, L_16_bytes_loop);
+
+
+ // ======== folding into 64 bytes from 128 bytes in register ========
+
+ // load table
+ addi(vclmul_table, vclmul_table, TABLE_STEP);
+ vle64_v(v31, vclmul_table);
+
+ crc32_vclmul_fold_16_bytes_vectorsize_16_2(v0, v4, v31, v8, v9, v10, v11, tmp2);
+ crc32_vclmul_fold_16_bytes_vectorsize_16_2(v1, v5, v31, v12, v13, v14, v15, tmp2);
+ crc32_vclmul_fold_16_bytes_vectorsize_16_2(v2, v6, v31, v16, v17, v18, v19, tmp2);
+ crc32_vclmul_fold_16_bytes_vectorsize_16_2(v3, v7, v31, v20, v21, v22, v23, tmp2);
+
+
+ // ======== folding into 16 bytes from 64 bytes in register ========
+
+ addi(vclmul_table, vclmul_table, TABLE_STEP);
+ vle64_v(v31, vclmul_table);
+ crc32_vclmul_fold_16_bytes_vectorsize_16_3(v0, v3, v31, v8, v9, v10, v11, tmp2);
+
+ addi(vclmul_table, vclmul_table, TABLE_STEP);
+ vle64_v(v31, vclmul_table);
+ crc32_vclmul_fold_16_bytes_vectorsize_16_3(v1, v3, v31, v12, v13, v14, v15, tmp2);
+
+ addi(vclmul_table, vclmul_table, TABLE_STEP);
+ vle64_v(v31, vclmul_table);
+ crc32_vclmul_fold_16_bytes_vectorsize_16_3(v2, v3, v31, v16, v17, v18, v19, tmp2);
+
+ #undef FOLD_2_VCLMUL_3
+
+
+ // ======== final: move result to scalar regsiters ========
+
+ vmv_x_s(tmp1, v3);
+ vslidedown_vi(v1, v3, 1);
+ vmv_x_s(tmp2, v1);
+}
+
+void MacroAssembler::crc32_vclmul_fold_to_16_bytes_vectorsize_32(VectorRegister vx, VectorRegister vy, VectorRegister vt,
+ VectorRegister vtmp1, VectorRegister vtmp2, VectorRegister vtmp3, VectorRegister vtmp4) {
+ assert_different_registers(vx, vy, vt, vtmp1, vtmp2, vtmp3, vtmp4);
+ vclmul_vv(vtmp1, vx, vt);
+ vclmulh_vv(vtmp2, vx, vt);
+ // low parts
+ vredxor_vs(vtmp3, vtmp1, vy);
+ // high parts
+ vslidedown_vi(vtmp4, vy, 1);
+ vredxor_vs(vtmp1, vtmp2, vtmp4);
+ // merge low and high back
+ vslideup_vi(vy, vtmp1, 1);
+ vmv_x_s(t1, vtmp3);
+ vmv_s_x(vy, t1);
+}
+
+void MacroAssembler::kernel_crc32_vclmul_fold_vectorsize_32(Register crc, Register buf, Register len,
+ Register vclmul_table, Register tmp1, Register tmp2) {
+ assert_different_registers(crc, buf, len, vclmul_table, tmp1, tmp2, t1);
+ assert(MaxVectorSize >= 32, "sanity");
+
+ // utility: load table
+ #define CRC32_VCLMUL_LOAD_TABLE(vt, rt, vtmp, rtmp) \
+ vid_v(vtmp); \
+ mv(rtmp, 2); \
+ vremu_vx(vtmp, vtmp, rtmp); \
+ vsll_vi(vtmp, vtmp, 3); \
+ vluxei64_v(vt, rt, vtmp);
+
+ const int TABLE_STEP = 16;
+ const int STEP = 128; // 128 bytes per round
+ const int N = 2 * 8; // 2: 128-bits/64-bits, 8: 8 pairs of double 64-bits
+
+ Register step = tmp2;
+
+
+ // ======== preparation ========
+
+ mv(step, STEP);
+ sub(len, len, step); // 2 rounds of folding with carry-less multiplication
+
+ vsetivli(zr, N, Assembler::e64, Assembler::m4, Assembler::mu, Assembler::tu);
+ // load data
+ vle64_v(v4, buf);
+ add(buf, buf, step);
+
+ // load table
+ CRC32_VCLMUL_LOAD_TABLE(v8, vclmul_table, v28, t1);
+ // load mask,
+ // v28 should already contains: 0, 8, 0, 8, ...
+ vmseq_vi(v2, v28, 0);
+ // now, v2 should contains: 101010...
+ vmnand_mm(v1, v2, v2);
+ // now, v1 should contains: 010101...
+
+ // initial crc
+ vmv_v_x(v24, zr);
+ vsetivli(zr, 1, Assembler::e32, Assembler::m4, Assembler::mu, Assembler::tu);
+ vmv_s_x(v24, crc);
+ vsetivli(zr, N, Assembler::e64, Assembler::m4, Assembler::mu, Assembler::tu);
+ vxor_vv(v4, v4, v24);
+
+ Label L_128_bytes_loop;
+ j(L_128_bytes_loop);
+
+
+ // ======== folding 128 bytes in data buffer per round ========
+
+ align(OptoLoopAlignment);
+ bind(L_128_bytes_loop);
+ {
+ // v4: data
+ // v4: buf, reused
+ // v8: table
+ // v12: lows
+ // v16: highs
+ // v20: low_slides
+ // v24: high_slides
+ vclmul_vv(v12, v4, v8);
+ vclmulh_vv(v16, v4, v8);
+ vle64_v(v4, buf);
+ add(buf, buf, step);
+ // lows
+ vslidedown_vi(v20, v12, 1);
+ vmand_mm(v0, v2, v2);
+ vxor_vv(v12, v12, v20, v0_t);
+ // with buf data
+ vxor_vv(v4, v4, v12, v0_t);
+
+ // highs
+ vslideup_vi(v24, v16, 1);
+ vmand_mm(v0, v1, v1);
+ vxor_vv(v16, v16, v24, v0_t);
+ // with buf data
+ vxor_vv(v4, v4, v16, v0_t);
+ }
+ sub(len, len, step);
+ bge(len, step, L_128_bytes_loop);
+
+
+ // ======== folding into 64 bytes from 128 bytes in register ========
+
+ // load table
+ addi(vclmul_table, vclmul_table, TABLE_STEP);
+ CRC32_VCLMUL_LOAD_TABLE(v8, vclmul_table, v28, t1);
+
+ // v4: data, first (low) part, N/2 of 64-bits
+ // v20: data, second (high) part, N/2 of 64-bits
+ // v8: table
+ // v10: lows
+ // v12: highs
+ // v14: low_slides
+ // v16: high_slides
+
+ // high part
+ vslidedown_vi(v20, v4, N/2);
+
+ vsetivli(zr, N/2, Assembler::e64, Assembler::m2, Assembler::mu, Assembler::tu);
+
+ vclmul_vv(v10, v4, v8);
+ vclmulh_vv(v12, v4, v8);
+
+ // lows
+ vslidedown_vi(v14, v10, 1);
+ vmand_mm(v0, v2, v2);
+ vxor_vv(v10, v10, v14, v0_t);
+ // with data part 2
+ vxor_vv(v4, v20, v10, v0_t);
+
+ // highs
+ vslideup_vi(v16, v12, 1);
+ vmand_mm(v0, v1, v1);
+ vxor_vv(v12, v12, v16, v0_t);
+ // with data part 2
+ vxor_vv(v4, v20, v12, v0_t);
+
+
+ // ======== folding into 16 bytes from 64 bytes in register ========
+
+ // v4: data, first part, 2 of 64-bits
+ // v16: data, second part, 2 of 64-bits
+ // v18: data, third part, 2 of 64-bits
+ // v20: data, second part, 2 of 64-bits
+ // v8: table
+
+ vslidedown_vi(v16, v4, 2);
+ vslidedown_vi(v18, v4, 4);
+ vslidedown_vi(v20, v4, 6);
+
+ vsetivli(zr, 2, Assembler::e64, Assembler::m1, Assembler::mu, Assembler::tu);
+
+ addi(vclmul_table, vclmul_table, TABLE_STEP);
+ vle64_v(v8, vclmul_table);
+ crc32_vclmul_fold_to_16_bytes_vectorsize_32(v4, v20, v8, v28, v29, v30, v31);
+
+ addi(vclmul_table, vclmul_table, TABLE_STEP);
+ vle64_v(v8, vclmul_table);
+ crc32_vclmul_fold_to_16_bytes_vectorsize_32(v16, v20, v8, v28, v29, v30, v31);
+
+ addi(vclmul_table, vclmul_table, TABLE_STEP);
+ vle64_v(v8, vclmul_table);
+ crc32_vclmul_fold_to_16_bytes_vectorsize_32(v18, v20, v8, v28, v29, v30, v31);
+
+
+ // ======== final: move result to scalar regsiters ========
+
+ vmv_x_s(tmp1, v20);
+ vslidedown_vi(v4, v20, 1);
+ vmv_x_s(tmp2, v4);
+
+ #undef CRC32_VCLMUL_LOAD_TABLE
+}
+
+// For more details of the algorithm, please check the paper:
+// "Fast CRC Computation for Generic Polynomials Using PCLMULQDQ Instruction - Intel"
+//
+// Please also refer to the corresponding code in aarch64 or x86 ones.
+//
+// As the riscv carry-less multiplication is a bit different from the other platforms,
+// so the implementation itself is also a bit different from others.
+
+void MacroAssembler::kernel_crc32_vclmul_fold(Register crc, Register buf, Register len,
+ Register table0, Register table1, Register table2, Register table3,
+ Register tmp1, Register tmp2, Register tmp3, Register tmp4, Register tmp5) {
+ const int64_t single_table_size = 256;
+ const int64_t table_num = 8; // 4 for scalar, 4 for plain vector
+ const ExternalAddress table_addr = StubRoutines::crc_table_addr();
+ Register vclmul_table = tmp3;
+
+ la(vclmul_table, table_addr);
+ add(vclmul_table, vclmul_table, table_num*single_table_size*sizeof(juint), tmp1);
+ la(table0, table_addr);
+
+ if (MaxVectorSize == 16) {
+ kernel_crc32_vclmul_fold_vectorsize_16(crc, buf, len, vclmul_table, tmp1, tmp2);
+ } else {
+ kernel_crc32_vclmul_fold_vectorsize_32(crc, buf, len, vclmul_table, tmp1, tmp2);
+ }
+
+ mv(crc, zr);
+ update_word_crc32(crc, tmp1, tmp3, tmp4, tmp5, table0, table1, table2, table3, false);
+ update_word_crc32(crc, tmp1, tmp3, tmp4, tmp5, table0, table1, table2, table3, true);
+ update_word_crc32(crc, tmp2, tmp3, tmp4, tmp5, table0, table1, table2, table3, false);
+ update_word_crc32(crc, tmp2, tmp3, tmp4, tmp5, table0, table1, table2, table3, true);
+}
+
#endif // COMPILER2
/**
@@ -1765,7 +2118,9 @@ void MacroAssembler::kernel_crc32(Register crc, Register buf, Register len,
#ifdef COMPILER2
if (UseRVV) {
- const int64_t tmp_limit = MaxVectorSize >= 32 ? unroll_words*3 : unroll_words*5;
+ const int64_t tmp_limit =
+ UseZvbc ? 128 * 3 // 3 rounds of folding with carry-less multiplication
+ : MaxVectorSize >= 32 ? unroll_words*3 : unroll_words*5;
mv(tmp1, tmp_limit);
bge(len, tmp1, L_vector_entry);
}
@@ -1827,7 +2182,13 @@ void MacroAssembler::kernel_crc32(Register crc, Register buf, Register len,
j(L_exit);
bind(L_vector_entry);
- vector_update_crc32(crc, buf, len, tmp1, tmp2, tmp3, tmp4, tmp6, table0, table3);
+ if (UseZvbc) { // carry-less multiplication
+ kernel_crc32_vclmul_fold(crc, buf, len,
+ table0, table1, table2, table3,
+ tmp1, tmp2, tmp3, tmp4, tmp6);
+ } else { // plain vector instructions
+ vector_update_crc32(crc, buf, len, tmp1, tmp2, tmp3, tmp4, tmp6, table0, table3);
+ }
bgtz(len, L_by4_loop_entry);
}
diff --git a/src/hotspot/cpu/riscv/macroAssembler_riscv.hpp b/src/hotspot/cpu/riscv/macroAssembler_riscv.hpp
index 0d28eaaf1f00f..b7fba1d76d375 100644
--- a/src/hotspot/cpu/riscv/macroAssembler_riscv.hpp
+++ b/src/hotspot/cpu/riscv/macroAssembler_riscv.hpp
@@ -1309,6 +1309,24 @@ class MacroAssembler: public Assembler {
void vector_update_crc32(Register crc, Register buf, Register len,
Register tmp1, Register tmp2, Register tmp3, Register tmp4, Register tmp5,
Register table0, Register table3);
+ void kernel_crc32_vclmul_fold(Register crc, Register buf, Register len,
+ Register table0, Register table1, Register table2, Register table3,
+ Register tmp1, Register tmp2, Register tmp3, Register tmp4, Register tmp5);
+ void crc32_vclmul_fold_to_16_bytes_vectorsize_32(VectorRegister vx, VectorRegister vy, VectorRegister vt,
+ VectorRegister vtmp1, VectorRegister vtmp2, VectorRegister vtmp3, VectorRegister vtmp4);
+ void kernel_crc32_vclmul_fold_vectorsize_32(Register crc, Register buf, Register len,
+ Register vclmul_table, Register tmp1, Register tmp2);
+ void crc32_vclmul_fold_16_bytes_vectorsize_16(VectorRegister vx, VectorRegister vt,
+ VectorRegister vtmp1, VectorRegister vtmp2, VectorRegister vtmp3, VectorRegister vtmp4,
+ Register buf, Register tmp, const int STEP);
+ void crc32_vclmul_fold_16_bytes_vectorsize_16_2(VectorRegister vx, VectorRegister vy, VectorRegister vt,
+ VectorRegister vtmp1, VectorRegister vtmp2, VectorRegister vtmp3, VectorRegister vtmp4,
+ Register tmp);
+ void crc32_vclmul_fold_16_bytes_vectorsize_16_3(VectorRegister vx, VectorRegister vy, VectorRegister vt,
+ VectorRegister vtmp1, VectorRegister vtmp2, VectorRegister vtmp3, VectorRegister vtmp4,
+ Register tmp);
+ void kernel_crc32_vclmul_fold_vectorsize_16(Register crc, Register buf, Register len,
+ Register vclmul_table, Register tmp1, Register tmp2);
void mul_add(Register out, Register in, Register offset,
Register len, Register k, Register tmp);
diff --git a/src/hotspot/cpu/riscv/stubRoutines_riscv.cpp b/src/hotspot/cpu/riscv/stubRoutines_riscv.cpp
index 28b797a639e51..559511fca5713 100644
--- a/src/hotspot/cpu/riscv/stubRoutines_riscv.cpp
+++ b/src/hotspot/cpu/riscv/stubRoutines_riscv.cpp
@@ -479,5 +479,17 @@ ATTRIBUTE_ALIGNED(4096) juint StubRoutines::riscv::_crc_table[] =
0x29413c29, 0x548c7116, 0xd2dba657, 0xaf16eb68, 0x05050e94,
0x78c843ab, 0xfe9f94ea, 0x8352d9d5, 0x71c95953, 0x0c04146c,
0x8a53c32d, 0xf79e8e12, 0x5d8d6bee, 0x204026d1, 0xa617f190,
- 0xdbdabcaf
+ 0xdbdabcaf,
+
+ // CRC32 table for carry-less multiplication implementation
+ 0xe88ef372UL, 0x00000001UL,
+ 0x4a7fe880UL, 0x00000001UL,
+ 0x54442bd4UL, 0x00000001UL,
+ 0xc6e41596UL, 0x00000001UL,
+ 0x3db1ecdcUL, 0x00000000UL,
+ 0x74359406UL, 0x00000001UL,
+ 0xf1da05aaUL, 0x00000000UL,
+ 0x5a546366UL, 0x00000001UL,
+ 0x751997d0UL, 0x00000001UL,
+ 0xccaa009eUL, 0x00000000UL,
};
diff --git a/src/hotspot/cpu/riscv/vm_version_riscv.cpp b/src/hotspot/cpu/riscv/vm_version_riscv.cpp
index 3b8d8119a8e1c..cf1f88d045c79 100644
--- a/src/hotspot/cpu/riscv/vm_version_riscv.cpp
+++ b/src/hotspot/cpu/riscv/vm_version_riscv.cpp
@@ -355,6 +355,14 @@ void VM_Version::c2_initialize() {
warning("Cannot enable UseZvbb on cpu without RVV support.");
}
+ // UseZvbc (depends on RVV).
+ if (UseZvbc && !UseRVV) {
+ if (!FLAG_IS_DEFAULT(UseZvbc)) {
+ warning("Cannot enable UseZvbc on cpu without RVV support.");
+ }
+ FLAG_SET_DEFAULT(UseZvbc, false);
+ }
+
// SHA's
if (FLAG_IS_DEFAULT(UseSHA)) {
FLAG_SET_DEFAULT(UseSHA, true);
diff --git a/src/hotspot/cpu/riscv/vm_version_riscv.hpp b/src/hotspot/cpu/riscv/vm_version_riscv.hpp
index e08838c3a6fe4..b858cca643d54 100644
--- a/src/hotspot/cpu/riscv/vm_version_riscv.hpp
+++ b/src/hotspot/cpu/riscv/vm_version_riscv.hpp
@@ -164,6 +164,7 @@ class VM_Version : public Abstract_VM_Version {
decl(ext_Zihintpause , "Zihintpause" , RV_NO_FLAG_BIT, true , UPDATE_DEFAULT(UseZihintpause)) \
decl(ext_Zacas , "Zacas" , RV_NO_FLAG_BIT, true , UPDATE_DEFAULT(UseZacas)) \
decl(ext_Zvbb , "Zvbb" , RV_NO_FLAG_BIT, true , UPDATE_DEFAULT(UseZvbb)) \
+ decl(ext_Zvbc , "Zvbc" , RV_NO_FLAG_BIT, true , UPDATE_DEFAULT(UseZvbc)) \
decl(ext_Zvfh , "Zvfh" , RV_NO_FLAG_BIT, true , UPDATE_DEFAULT(UseZvfh)) \
decl(ext_Zvkn , "Zvkn" , RV_NO_FLAG_BIT, true , UPDATE_DEFAULT(UseZvkn)) \
decl(ext_Zicond , "Zicond" , RV_NO_FLAG_BIT, true , UPDATE_DEFAULT(UseZicond)) \
diff --git a/src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp b/src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp
index f785d93539348..b1eccb850b869 100644
--- a/src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp
+++ b/src/hotspot/os_cpu/linux_riscv/riscv_hwprobe.cpp
@@ -178,6 +178,9 @@ void RiscvHwprobe::add_features_from_query_result() {
if (is_set(RISCV_HWPROBE_KEY_IMA_EXT_0, RISCV_HWPROBE_EXT_ZFH)) {
VM_Version::ext_Zfh.enable_feature();
}
+ if (is_set(RISCV_HWPROBE_KEY_IMA_EXT_0, RISCV_HWPROBE_EXT_ZVBC)) {
+ VM_Version::ext_Zvbc.enable_feature();
+ }
if (is_set(RISCV_HWPROBE_KEY_IMA_EXT_0, RISCV_HWPROBE_EXT_ZVFH)) {
VM_Version::ext_Zvfh.enable_feature();
}
diff --git a/src/java.base/share/classes/module-info.java b/src/java.base/share/classes/module-info.java
index 3c293770003f9..7486fdd825ce5 100644
--- a/src/java.base/share/classes/module-info.java
+++ b/src/java.base/share/classes/module-info.java
@@ -315,8 +315,7 @@
java.desktop;
exports sun.reflect.misc to
java.desktop,
- java.management,
- java.sql.rowset;
+ java.management;
exports sun.security.internal.interfaces to
jdk.crypto.cryptoki;
exports sun.security.internal.spec to
diff --git a/src/java.base/share/classes/sun/reflect/misc/ReflectUtil.java b/src/java.base/share/classes/sun/reflect/misc/ReflectUtil.java
index 812e77a0a82d0..92c55f6653292 100644
--- a/src/java.base/share/classes/sun/reflect/misc/ReflectUtil.java
+++ b/src/java.base/share/classes/sun/reflect/misc/ReflectUtil.java
@@ -32,10 +32,6 @@ public final class ReflectUtil {
private ReflectUtil() {
}
- public static Class forName(String name) throws ClassNotFoundException {
- return Class.forName(name);
- }
-
/**
* Ensures that access to a method or field is granted and throws
* IllegalAccessException if not. This method is not suitable for checking
diff --git a/src/java.sql.rowset/share/classes/com/sun/rowset/internal/XmlReaderContentHandler.java b/src/java.sql.rowset/share/classes/com/sun/rowset/internal/XmlReaderContentHandler.java
index e5f25f8a1680b..73bb39eba985b 100644
--- a/src/java.sql.rowset/share/classes/com/sun/rowset/internal/XmlReaderContentHandler.java
+++ b/src/java.sql.rowset/share/classes/com/sun/rowset/internal/XmlReaderContentHandler.java
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003, 2022, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2003, 2024, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@@ -659,13 +659,12 @@ public void endElement(String uri, String lName, String qName) throws SAXExcepti
case PropClassTag:
//Added the handling for Class tags to take care of maps
//Makes an entry into the map upon end of class tag
- try{
- typeMap.put(Key_map,sun.reflect.misc.ReflectUtil.forName(Value_map));
-
- }catch(ClassNotFoundException ex) {
- throw new SAXException(MessageFormat.format(resBundle.handleGetObject("xmlrch.errmap").toString(), ex.getMessage()));
- }
- break;
+ try {
+ typeMap.put(Key_map, Class.forName(Value_map, true, null));
+ } catch (ClassNotFoundException ex) {
+ throw new SAXException(MessageFormat.format(resBundle.handleGetObject("xmlrch.errmap").toString(), ex.getMessage()));
+ }
+ break;
case MapTag:
//Added the handling for Map to take set the typeMap
diff --git a/src/jdk.javadoc/share/classes/jdk/javadoc/internal/doclets/formats/html/taglets/LinkTaglet.java b/src/jdk.javadoc/share/classes/jdk/javadoc/internal/doclets/formats/html/taglets/LinkTaglet.java
index c171e10132ace..69cabd5427d41 100644
--- a/src/jdk.javadoc/share/classes/jdk/javadoc/internal/doclets/formats/html/taglets/LinkTaglet.java
+++ b/src/jdk.javadoc/share/classes/jdk/javadoc/internal/doclets/formats/html/taglets/LinkTaglet.java
@@ -271,7 +271,7 @@ Content linkSeeReferenceOutput(Element holder,
}
if (utils.isExecutableElement(refMem)) {
if (refMemName.indexOf('(') < 0) {
- refMemName += utils.makeSignature((ExecutableElement) refMem, null, true);
+ refMemName += utils.makeSignature((ExecutableElement) refMem, null, false, true);
}
if (overriddenMethod != null) {
// The method to actually link.
diff --git a/test/jdk/jdk/jfr/startupargs/TestStartDuration.java b/test/jdk/jdk/jfr/startupargs/TestStartDuration.java
index df27c054dd80e..d9697492d94fb 100644
--- a/test/jdk/jdk/jfr/startupargs/TestStartDuration.java
+++ b/test/jdk/jdk/jfr/startupargs/TestStartDuration.java
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013, 2023, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2013, 2024, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@@ -38,6 +38,7 @@
* @summary Start a recording with duration. Verify recording stops.
* @key jfr
* @requires vm.hasJFR
+ * @requires vm.flagless
* @library /test/lib /test/jdk
* @run main jdk.jfr.startupargs.TestStartDuration
*/
diff --git a/test/langtools/jdk/javadoc/doclet/testLinkTaglet/TestLinkTaglet.java b/test/langtools/jdk/javadoc/doclet/testLinkTaglet/TestLinkTaglet.java
index 54faadcee1e8c..422b0fcddc81d 100644
--- a/test/langtools/jdk/javadoc/doclet/testLinkTaglet/TestLinkTaglet.java
+++ b/test/langtools/jdk/javadoc/doclet/testLinkTaglet/TestLinkTaglet.java
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2004, 2022, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2004, 2024, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@@ -24,7 +24,7 @@
/*
* @test
* @bug 4732864 6280605 7064544 8014636 8016328 8025633 8071982 8182765
- * 8274781
+ * 8274781 8345664
* @summary Make sure that you can link from one member to another using
* non-qualified name, furthermore, ensure the right one is linked.
* @library ../../lib
@@ -50,6 +50,17 @@ public void test() {
"pkg", testSrc("checkPkg/B.java"));
checkExit(Exit.OK);
+ checkOutput("pkg/package-summary.html", true,
+ """
+ Qualified Link: C.InnerC.
+ Unqualified Link1: C.InnerC.
+ Unqualified Link2: C.InnerC.
+ Qualified Link: C.method(pkg.\
+ C.InnerC, pkg.C.InnerC2).
+ Unqualified Link: C.method(C.InnerC, C.InnerC2).
+ Unqualified Link: C.method(InnerC, InnerC2).
+ Link w/o Signature: C.method(C.InnerC, C.InnerC2).
+ Package Link: pkg.
""");
checkOutput("pkg/C.html", true,
"""
Qualified Link: C.InnerC.
@@ -59,6 +70,7 @@ public void test() {
C.InnerC, pkg.C.InnerC2).
Unqualified Link: method(C.InnerC, C.InnerC2).
Unqualified Link: method(InnerC, InnerC2).
+ Link w/o Signature: method(C.InnerC, C.InnerC2).
Package Link: pkg.
""");
checkOutput("pkg/C.InnerC.html", true,
diff --git a/test/langtools/jdk/javadoc/doclet/testLinkTaglet/TestLinkTagletWithModule.java b/test/langtools/jdk/javadoc/doclet/testLinkTaglet/TestLinkTagletWithModule.java
index 3adfe661965eb..86d678fbaa512 100644
--- a/test/langtools/jdk/javadoc/doclet/testLinkTaglet/TestLinkTagletWithModule.java
+++ b/test/langtools/jdk/javadoc/doclet/testLinkTaglet/TestLinkTagletWithModule.java
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2020, 2022, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2020, 2024, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@@ -76,7 +76,7 @@ public void testLinkModuleInternal(Path base) throws Exception {
m1
package link
Lib
- Lib.method(java.lang.String)
+ Lib.method(String)
Lib.method(String)
m2
m2
@@ -110,7 +110,7 @@ public void testLinkModuleExternal(Path base) throws Exception {
Lib
Lib.method(java.lang.String)
+ interface in com.m1.lib" class="external-link">Lib.method(String)
Lib.method(String)
m2
diff --git a/test/langtools/jdk/javadoc/doclet/testLinkTaglet/pkg/C.java b/test/langtools/jdk/javadoc/doclet/testLinkTaglet/pkg/C.java
index 97b3f402235bf..16e788595ff4a 100644
--- a/test/langtools/jdk/javadoc/doclet/testLinkTaglet/pkg/C.java
+++ b/test/langtools/jdk/javadoc/doclet/testLinkTaglet/pkg/C.java
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2004, 2016, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2004, 2024, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@@ -30,6 +30,7 @@
* Qualified Link: {@link #method(pkg.C.InnerC, pkg.C.InnerC2)}.
* Unqualified Link: {@link #method(C.InnerC, C.InnerC2)}.
* Unqualified Link: {@link #method(InnerC, InnerC2)}.
+ * Link w/o Signature: {@link #method}.
* Package Link: {@link pkg}.
*
*
diff --git a/test/langtools/jdk/javadoc/doclet/testNestedGenerics/TestNestedGenerics.java b/test/langtools/jdk/javadoc/doclet/testNestedGenerics/TestNestedGenerics.java
index b34574a592dfe..ce5ec77a5736c 100644
--- a/test/langtools/jdk/javadoc/doclet/testNestedGenerics/TestNestedGenerics.java
+++ b/test/langtools/jdk/javadoc/doclet/testNestedGenerics/TestNestedGenerics.java
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2011, 2022, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2011, 2024, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@@ -23,7 +23,7 @@
/*
* @test
- * @bug 6758050 8025633 8182765
+ * @bug 6758050 8025633 8182765 8345664
* @summary Test HTML output for nested generic types.
* @library ../../lib
* @modules jdk.javadoc/jdk.javadoc.internal.tool
@@ -49,7 +49,6 @@ public void test() {
checkOutput("pkg/NestedGenerics.html", true,
"""
- """);
+ """);
}
}
diff --git a/test/langtools/jdk/javadoc/doclet/testSeeTag/TestSeeTagWithModule.java b/test/langtools/jdk/javadoc/doclet/testSeeTag/TestSeeTagWithModule.java
index 6864aca195956..810db37839443 100644
--- a/test/langtools/jdk/javadoc/doclet/testSeeTag/TestSeeTagWithModule.java
+++ b/test/langtools/jdk/javadoc/doclet/testSeeTag/TestSeeTagWithModule.java
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2020, 2022, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2020, 2024, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
@@ -79,13 +79,13 @@ public void testSeeModuleInternal(Path base) throws Exception {
m1
com.m1.lib
Lib
- Lib.method(java.lang.String)
+ Lib.method(String)
Lib.method(String)
m2
m2
com.m2.lib
Lib
- Lib.method(java.lang.String)
+ Lib.method(String)
Lib.method(String)
""");
}
@@ -115,7 +115,7 @@ public void testSeeModuleExternal(Path base) throws Exception {
m1/com.m1.lib
Lib
Lib.method(java.lang.String)
+ interface in com.m1.lib" class="external-link">Lib.method(String)
Lib.method(String)
m2
@@ -123,7 +123,7 @@ interface in com.m1.lib" class="external-link">Lib.method(String)m2/com.m2.lib
Lib
Lib.method(java.lang.String)
+ interface in com.m2.lib" class="external-link">Lib.method(String)
Lib.method(String)
""");