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p256-cortex-m4-asm-keil.s
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p256-cortex-m4-asm-keil.s
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; Copyright (c) 2017-2021 Emil Lenngren
; Copyright (c) 2021 Shortcut Labs AB
;
; Permission is hereby granted, free of charge, to any person obtaining a copy
; of this software and associated documentation files (the "Software"), to deal
; in the Software without restriction, including without limitation the rights
; to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
; copies of the Software, and to permit persons to whom the Software is
; furnished to do so, subject to the following conditions:
;
; The above copyright notice and this permission notice shall be included in all
; copies or substantial portions of the Software.
;
; THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
; IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
; FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
; AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
; LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
; OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
; SOFTWARE.
; P256-Cortex-M4
#include "p256-cortex-m4-config.h"
; This is an armv7 implementation of P-256.
;
; When secret data is processed, the implementation runs in constant time,
; and no conditional branches depend on secret data.
area |.text|, code, readonly
align 4
#if (include_p256_basemult || include_p256_varmult) && has_d_cache
; Selects one of many values
; *r0 = output, *r1 = table, r2 = num coordinates, r3 = index to choose [0..7]
; 547 cycles for affine coordinates
P256_select_point proc
export P256_select_point
push {r0,r2,r3,r4-r11,lr}
frame push {r4-r11,lr}
frame address sp,48
subs r2,#1
lsls r2,#5
0
rsbs r3,#0
sbcs r3,r3
mvns r3,r3
ldm r1!,{r6-r12,lr}
ands r6,r3
ands r7,r3
and r8,r3
and r9,r3
and r10,r3
and r11,r3
and r12,r3
and lr,r3
adds r1,r2
movs r3,#1
1
ldr r0,[sp,#8]
eors r0,r3
mrs r0,apsr
lsrs r0,#30
ldm r1!,{r4,r5}
umlal r6,r2,r0,r4
umlal r7,r3,r0,r5
ldm r1!,{r4,r5}
umlal r8,r2,r0,r4
umlal r9,r3,r0,r5
ldm r1!,{r4,r5}
umlal r10,r2,r0,r4
umlal r11,r3,r0,r5
ldm r1!,{r4,r5}
umlal r12,r2,r0,r4
umlal lr,r3,r0,r5
adds r1,r2
adds r3,#1
cmp r3,#8
bne %b1
ldm sp,{r0,r4}
stm r0!,{r6-r12,lr}
str r0,[sp]
sub r1,r1,r2, lsl #3
subs r1,#224
subs r4,#1
str r4,[sp,#4]
ldr r3,[sp,#8]
bne %b0
add sp,#12
frame address sp,36
pop {r4-r11,pc}
endp
#endif
#if include_p256_verify || include_p256_sign
; in: *r0 = out, *r1 = a, *r2 = b
; quite slow, so only used in code not critical for performance
mul288x288 proc
push {r4-r11,lr}
frame push {r4-r11,lr}
mov r4,r0
mov r5,r2
mov r6,r1
movs r1,#72
bl setzero
ldm r5,{r0-r2,r8-r12,lr}
movs r7,#9
0
ldm r6!,{r5}
push {r6,r7}
frame address sp,44
movs r3,#0
ldm r4,{r6,r7}
umaal r6,r3,r5,r0
umaal r7,r3,r5,r1
stm r4!,{r6,r7}
ldm r4,{r6,r7}
umaal r6,r3,r5,r2
umaal r7,r3,r5,r8
stm r4!,{r6,r7}
ldm r4,{r6,r7}
umaal r6,r3,r5,r9
umaal r7,r3,r5,r10
stm r4!,{r6,r7}
ldm r4,{r6,r7}
umaal r6,r3,r5,r11
umaal r7,r3,r5,r12
stm r4!,{r6,r7}
ldm r4,{r6}
umaal r3,r6,r5,lr
stm r4!,{r3,r6}
subs r4,r4,#36
pop {r6,r7}
frame address sp,36
subs r7,r7,#1
bne %b0
pop {r4-r11,pc}
endp
; in: r0 = address, r1 = num bytes (> 0, must be multiple of 8)
setzero proc
movs r2,#0
movs r3,#0
0
stm r0!,{r2,r3}
subs r1,r1,#8
bne %b0
bx lr
endp
#endif
; Field arithmetics for the prime field where p = 2^256 - 2^224 + 2^192 + 2^96 - 1
; Multiplication and Squaring use Montgomery Modular Multiplication where R = 2^256
; To convert a value to Montgomery class, use P256_mulmod(value, R^512 mod p)
; To convert a value from Montgomery class to standard form, use P256_mulmod(value, 1)
#if include_p256_mult || include_p256_decompress_point || include_p256_decode_point
#if use_mul_for_sqr
P256_sqrmod proc
push {r0-r7,lr}
frame push {lr}
frame address sp,36
mov r1,sp
mov r2,sp
bl P256_mulmod
add sp,sp,#32
frame address sp,4
pop {pc}
endp
#endif
#if has_fpu
; If inputs are A*R mod p and B*R mod p, computes AB*R mod p
; *r1 = in1, *r2 = in2
; out: r0-r7
; clobbers all other registers
P256_mulmod proc
push {lr}
frame push {lr}
vmov s4,r2
vldm r1,{s8-s15}
ldm r2,{r2,r3,r4,r5}
vmov r0,r10,s8,s9
umull r6,r1,r2,r0
umull r7,r12,r3,r0
umaal r7,r1,r2,r10
vmov s0,s1,r6,r7
umull r8,r6,r4,r0
umaal r8,r1,r3,r10
umull r9,r7,r5,r0
umaal r9,r1,r4,r10
umaal r1,r7,r5,r10
vmov lr,r0,s10,s11
umaal r8,r12,r2,lr
umaal r9,r12,r3,lr
umaal r1,r12,r4,lr
umaal r12,r7,r5,lr
umaal r9,r6,r2,r0
umaal r1,r6,r3,r0
umaal r12,r6,r4,r0
umaal r6,r7,r5,r0
vmov s2,s3,r8,r9
vmov r10,lr,s12,s13
mov r9,#0
umaal r1,r9,r2,r10
umaal r12,r9,r3,r10
umaal r6,r9,r4,r10
umaal r7,r9,r5,r10
mov r10,#0
umaal r12,r10,r2,lr
umaal r6,r10,r3,lr
umaal r7,r10,r4,lr
umaal r9,r10,r5,lr
vmov r8,s14
mov lr,#0
umaal lr,r6,r2,r8
umaal r7,r6,r3,r8
umaal r9,r6,r4,r8
umaal r10,r6,r5,r8
;_ _ _ _ _ 6 10 9| 7 | lr 12 1 _ _ _ _
vmov r8,s15
mov r11,#0
umaal r7,r11,r2,r8
umaal r9,r11,r3,r8
umaal r10,r11,r4,r8
umaal r6,r11,r5,r8
;_ _ _ _ 11 6 10 9| 7 | lr 12 1 _ _ _ _
vmov r2,s4
adds r2,r2,#16
ldm r2,{r2,r3,r4,r5}
vmov r8,s8
movs r0,#0
umaal r1,r0,r2,r8
vmov s4,r1
umaal r12,r0,r3,r8
umaal lr,r0,r4,r8
umaal r0,r7,r5,r8 ; 7=carry for 9
;_ _ _ _ 11 6 10 9+7| 0 | lr 12 _ _ _ _ _
vmov r8,s9
movs r1,#0
umaal r12,r1,r2,r8
vmov s5,r12
umaal lr,r1,r3,r8
umaal r0,r1,r4,r8
umaal r1,r7,r5,r8 ; 7=carry for 10
;_ _ _ _ 11 6 10+7 9+1| 0 | lr _ _ _ _ _ _
vmov r8,s10
mov r12,#0
umaal lr,r12,r2,r8
vmov s6,lr
umaal r0,r12,r3,r8
umaal r1,r12,r4,r8
umaal r10,r12,r5,r8 ; 12=carry for 6
;_ _ _ _ 11 6+12 10+7 9+1| 0 | _ _ _ _ _ _ _
vmov r8,s11
mov lr,#0
umaal r0,lr,r2,r8
vmov s7,r0
umaal r1,lr,r3,r8
umaal r10,lr,r4,r8
umaal r6,lr,r5,r8 ; lr=carry for saved
;_ _ _ _ 11+lr 6+12 10+7 9+1| _ | _ _ _ _ _ _ _
vmov r0,r8,s12,s13
umaal r1,r9,r2,r0
vmov s8,r1
umaal r9,r10,r3,r0
umaal r10,r6,r4,r0
umaal r11,r6,r5,r0 ; 6=carry for next
;_ _ _ 6 11+lr 10+12 9+7 _ | _ | _ _ _ _ _ _ _
umaal r9,r7,r2,r8
umaal r10,r7,r3,r8
umaal r11,r7,r4,r8
umaal r6,r7,r5,r8
vmov r0,r8,s14,s15
umaal r10,r12,r2,r0
umaal r11,r12,r3,r0
umaal r6,r12,r4,r0
umaal r7,r12,r5,r0
umaal r11,lr,r2,r8
umaal lr,r6,r3,r8
umaal r6,r7,r4,r8
umaal r7,r12,r5,r8
; 12 7 6 lr 11 10 9 s8 s7 s6 s5 s4 s3 s2 s1 s0
;now reduce
vmov s13,s14,r6,r7
vmov s15,r12
vmov r0,r1,s0,s1
vmov r2,r3,s2,s3
vmov r4,r5,s4,s5
vmov r6,r7,s6,s7
vmov r8,s8
mov r12,#0
adds r3,r0
adcs r4,r1
adcs r5,r2
adcs r6,r0
adcs r7,r1
adcs r8,r0
adcs r9,r1
adcs r10,#0
adcs r11,#0
adcs r12,#0
adds r6,r3
adcs r7,r4 ; r4 instead of 0
adcs r8,r2
adcs r9,r3
adcs r10,r2
adcs r11,r3
adcs r12,#0
subs r7,r0
sbcs r8,r1
sbcs r9,r2
sbcs r10,r3
sbcs r11,#0
sbcs r12,#0 ; r12 is between 0 and 2
vmov r1,r2,s13,s14
vmov r3,s15
adds r0,lr,r12
adcs r1,#0
mov r12,#0
adcs r12,#0
;adds r7,r4 (added above instead)
adcs r8,r5
adcs r9,r6
adcs r10,r4
adcs r11,r5
adcs r0,r4
adcs r1,r5
adcs r2,r12
adcs r3,#0
mov r12,#0
adcs r12,#0
adcs r10,r7
adcs r11,#0
adcs r0,r6
adcs r1,r7
adcs r2,r6
adcs r3,r7
adcs r12,#0
subs r11,r4
sbcs r0,r5
sbcs r1,r6
sbcs r2,r7
sbcs r3,#0
sbcs r12,#0
; now (T + mN) / R is
; 8 9 10 11 0 1 2 3 12 (lsb -> msb)
subs r8,r8,#0xffffffff
sbcs r9,r9,#0xffffffff
sbcs r10,r10,#0xffffffff
sbcs r11,r11,#0
sbcs r4,r0,#0
sbcs r5,r1,#0
sbcs r6,r2,#1
sbcs r7,r3,#0xffffffff
sbc r12,r12,#0
adds r0,r8,r12
adcs r1,r9,r12
adcs r2,r10,r12
adcs r3,r11,#0
adcs r4,r4,#0
adcs r5,r5,#0
adcs r6,r6,r12, lsr #31
adcs r7,r7,r12
pop {pc}
endp
#if !use_mul_for_sqr
; If input is A*R mod p, computes A^2*R mod p
; in/out: r0-r7
; clobbers all other registers
P256_sqrmod proc
push {lr}
frame push {lr}
;mul 01, 00
umull r9,r10,r0,r0
umull r11,r12,r0,r1
adds r11,r11,r11
mov lr,#0
umaal r10,r11,lr,lr
;r9 r10 done
;r12 carry for 3rd before col
;r11+C carry for 3rd final col
vmov s0,s1,r9,r10
;mul 02, 11
mov r8,#0
umaal r8,r12,r0,r2
adcs r8,r8,r8
umaal r8,r11,r1,r1
;r8 done (3rd col)
;r12 carry for 4th before col
;r11+C carry for 4th final col
;mul 03, 12
umull r9,r10,r0,r3
umaal r9,r12,r1,r2
adcs r9,r9,r9
umaal r9,r11,lr,lr
;r9 done (4th col)
;r10+r12 carry for 5th before col
;r11+C carry for 5th final col
vmov s2,s3,r8,r9
;mul 04, 13, 22
mov r9,#0
umaal r9,r10,r0,r4
umaal r9,r12,r1,r3
adcs r9,r9,r9
umaal r9,r11,r2,r2
;r9 done (5th col)
;r10+r12 carry for 6th before col
;r11+C carry for 6th final col
vmov s4,r9
;mul 05, 14, 23
umull r9,r8,r0,r5
umaal r9,r10,r1,r4
umaal r9,r12,r2,r3
adcs r9,r9,r9
umaal r9,r11,lr,lr
;r9 done (6th col)
;r10+r12+r8 carry for 7th before col
;r11+C carry for 7th final col
vmov s5,r9
;mul 06, 15, 24, 33
mov r9,#0
umaal r9,r8,r1,r5
umaal r9,r12,r2,r4
umaal r9,r10,r0,r6
adcs r9,r9,r9
umaal r9,r11,r3,r3
;r9 done (7th col)
;r8+r10+r12 carry for 8th before col
;r11+C carry for 8th final col
vmov s6,r9
;mul 07, 16, 25, 34
umull r0,r9,r0,r7
umaal r0,r10,r1,r6
umaal r0,r12,r2,r5
umaal r0,r8,r3,r4
adcs r0,r0,r0
umaal r0,r11,lr,lr
;r0 done (8th col)
;r9+r8+r10+r12 carry for 9th before col
;r11+C carry for 9th final col
;mul 17, 26, 35, 44
umaal r9,r8,r1,r7 ;r1 is now dead
umaal r9,r10,r2,r6
umaal r12,r9,r3,r5
adcs r12,r12,r12
umaal r11,r12,r4,r4
;r11 done (9th col)
;r8+r10+r9 carry for 10th before col
;r12+C carry for 10th final col
;mul 27, 36, 45
umaal r9,r8,r2,r7 ;r2 is now dead
umaal r10,r9,r3,r6
movs r2,#0
umaal r10,r2,r4,r5
adcs r10,r10,r10
umaal r12,r10,lr,lr
;r12 done (10th col)
;r8+r9+r2 carry for 11th before col
;r10+C carry for 11th final col
;mul 37, 46, 55
umaal r2,r8,r3,r7 ;r3 is now dead
umaal r9,r2,r4,r6
adcs r9,r9,r9
umaal r10,r9,r5,r5
;r10 done (11th col)
;r8+r2 carry for 12th before col
;r9+C carry for 12th final col
;mul 47, 56
movs r3,#0
umaal r3,r8,r4,r7 ;r4 is now dead
umaal r3,r2,r5,r6
adcs r3,r3,r3
umaal r9,r3,lr,lr
;r9 done (12th col)
;r8+r2 carry for 13th before col
;r3+C carry for 13th final col
;mul 57, 66
umaal r8,r2,r5,r7 ;r5 is now dead
adcs r8,r8,r8
umaal r3,r8,r6,r6
;r3 done (13th col)
;r2 carry for 14th before col
;r8+C carry for 14th final col
;mul 67
umull r4,r5,lr,lr ; set 0
umaal r4,r2,r6,r7
adcs r4,r4,r4
umaal r4,r8,lr,lr
;r4 done (14th col)
;r2 carry for 15th before col
;r8+C carry for 15th final col
;mul 77
adcs r2,r2,r2
umaal r8,r2,r7,r7
adcs r2,r2,lr
;r8 done (15th col)
;r2 done (16th col)
;msb -> lsb: r2 r8 r4 r3 r9 r10 r12 r11 r0 s6 s5 s4 s3 s2 s1 s0
;lr: 0
;now do reduction
vmov s13,s14,r4,r8
vmov s15,r2 ;s15
vmov r1,r2,s0,s1
vmov r8,r7,s2,s3
vmov r6,r5,s4,s5
vmov r4,s6
;lr is already 0
X0 RN 1
X1 RN 2
X2 RN 8
X3 RN 7
X4 RN 6
X5 RN 5
X6 RN 4
X7 RN 0
X8 RN 11
X9 RN 12
X10 RN 10
X11 RN 9
X12 RN 3
X13 RN 7
X14 RN 8
X15 RN 2
adcs X3,X0
adcs X4,X1
adcs X5,X2
adcs X6,X0
adcs X7,X1
adcs X8,X0
adcs X9,X1
adcs X10,#0
adcs X11,#0
adcs lr,#0
adds X6,X3
adcs X7,X4 ; X4 instead of 0
adcs X8,X2
adcs X9,X3
adcs X10,X2
adcs X11,X3
adcs lr,#0
subs X7,X0
sbcs X8,X1
sbcs X9,X2
sbcs X10,X3
sbcs X11,#0
sbcs lr,#0 ; lr is between 0 and 2
vmov X13,X14,s13,s14
vmov X15,s15
adds X0,X12,lr
adcs X13,#0
mov lr,#0
adcs lr,#0
;adds X7,X4 (added above instead)
adcs X8,X5
adcs X9,X6
adcs X10,X4
adcs X11,X5
adcs X0,X4
adcs X13,X5
adcs X14,lr
adcs X15,#0
mov lr,#0
adcs lr,#0
adcs X10,X7
adcs X11,#0
adcs X0,X6
adcs X13,X7
adcs X14,X6
adcs X15,X7
adcs lr,#0
subs X11,X4
sbcs X0,X5
sbcs X13,X6
sbcs X14,X7
sbcs X15,#0
sbcs lr,#0
; now (T + mN) / R is
; X8 X9 X10 X11 X0 X13 X14 X15 lr (lsb -> msb)
; r11 r12 r10 r9 r1 r7 r8 r2 lr
subs r0,r11,#0xffffffff
sbcs r12,r12,#0xffffffff
sbcs r4,r10,#0xffffffff
sbcs r9,r9,#0
sbcs r6,r1,#0
sbcs r5,r7,#0
sbcs r10,r8,#1
sbcs r8,r2,#0xffffffff
sbcs r7,lr,#0
adds r0,r0,r7
adcs r1,r12,r7
adcs r2,r4,r7
adcs r3,r9,#0
adcs r4,r6,#0
adcs r5,r5,#0
adcs r6,r10,r7, lsr #31
adcs r7,r8,r7
pop {pc}
endp
#endif
#else
; If inputs are A*R mod p and B*R mod p, computes AB*R mod p
; *r1 = in1, *r2 = in2
; out: r0-r7
; clobbers all other registers
; cycles: 231
P256_mulmod proc
push {r2,lr}
frame push {lr}
frame address sp,8
sub sp,#28
frame address sp,36
ldm r2,{r2,r3,r4,r5}
ldm r1!,{r0,r10,lr}
umull r6,r11,r2,r0
umull r7,r12,r3,r0
umaal r7,r11,r2,r10
push {r6,r7}
frame address sp,44
umull r8,r6,r4,r0
umaal r8,r11,r3,r10
umull r9,r7,r5,r0
umaal r9,r11,r4,r10
umaal r11,r7,r5,r10
umaal r8,r12,r2,lr
umaal r9,r12,r3,lr
umaal r11,r12,r4,lr
umaal r12,r7,r5,lr
ldm r1!,{r0,r10,lr}
umaal r9,r6,r2,r0
umaal r11,r6,r3,r0
umaal r12,r6,r4,r0
umaal r6,r7,r5,r0
strd r8,r9,[sp,#8]
mov r9,#0
umaal r11,r9,r2,r10
umaal r12,r9,r3,r10
umaal r6,r9,r4,r10
umaal r7,r9,r5,r10
mov r10,#0
umaal r12,r10,r2,lr
umaal r6,r10,r3,lr
umaal r7,r10,r4,lr
umaal r9,r10,r5,lr
ldr r8,[r1],#4
mov lr,#0
umaal lr,r6,r2,r8
umaal r7,r6,r3,r8
umaal r9,r6,r4,r8
umaal r10,r6,r5,r8
;_ _ _ _ _ 6 10 9| 7 | lr 12 11 _ _ _ _
ldr r8,[r1],#-28
mov r0,#0
umaal r7,r0,r2,r8
umaal r9,r0,r3,r8
umaal r10,r0,r4,r8
umaal r6,r0,r5,r8
push {r0}
frame address sp,48
;_ _ _ _ s 6 10 9| 7 | lr 12 11 _ _ _ _
ldr r2,[sp,#40]
adds r2,r2,#16
ldm r2,{r2,r3,r4,r5}
ldr r8,[r1],#4
mov r0,#0
umaal r11,r0,r2,r8
str r11,[sp,#16+4]
umaal r12,r0,r3,r8
umaal lr,r0,r4,r8
umaal r0,r7,r5,r8 ; 7=carry for 9
;_ _ _ _ s 6 10 9+7| 0 | lr 12 _ _ _ _ _
ldr r8,[r1],#4
mov r11,#0
umaal r12,r11,r2,r8
str r12,[sp,#20+4]
umaal lr,r11,r3,r8
umaal r0,r11,r4,r8
umaal r11,r7,r5,r8 ; 7=carry for 10
;_ _ _ _ s 6 10+7 9+11| 0 | lr _ _ _ _ _ _
ldr r8,[r1],#4
mov r12,#0
umaal lr,r12,r2,r8
str lr,[sp,#24+4]
umaal r0,r12,r3,r8
umaal r11,r12,r4,r8
umaal r10,r12,r5,r8 ; 12=carry for 6
;_ _ _ _ s 6+12 10+7 9+11| 0 | _ _ _ _ _ _ _
ldr r8,[r1],#4
mov lr,#0
umaal r0,lr,r2,r8
str r0,[sp,#28+4]
umaal r11,lr,r3,r8
umaal r10,lr,r4,r8
umaal r6,lr,r5,r8 ; lr=carry for saved
;_ _ _ _ s+lr 6+12 10+7 9+11| _ | _ _ _ _ _ _ _
ldm r1!,{r0,r8}
umaal r11,r9,r2,r0
str r11,[sp,#32+4]
umaal r9,r10,r3,r0
umaal r10,r6,r4,r0
pop {r11}
frame address sp,44
umaal r11,r6,r5,r0 ; 6=carry for next
;_ _ _ 6 11+lr 10+12 9+7 _ | _ | _ _ _ _ _ _ _
umaal r9,r7,r2,r8
umaal r10,r7,r3,r8
umaal r11,r7,r4,r8
umaal r6,r7,r5,r8
ldm r1!,{r0,r8}
umaal r10,r12,r2,r0
umaal r11,r12,r3,r0
umaal r6,r12,r4,r0
umaal r7,r12,r5,r0
umaal r11,lr,r2,r8
umaal lr,r6,r3,r8
umaal r6,r7,r4,r8
umaal r7,r12,r5,r8
; 12 7 6 lr 11 10 9 stack*9
push {r6,r7,r12}
frame address sp,56
add r7,sp,#12
ldm r7,{r0-r8}
mov r12,#0
adds r3,r0
adcs r4,r1
adcs r5,r2
adcs r6,r0
adcs r7,r1
adcs r8,r0
adcs r9,r1
adcs r10,#0
adcs r11,#0
adcs r12,#0
adds r6,r3
adcs r7,r4 ; r4 instead of 0
adcs r8,r2
adcs r9,r3
adcs r10,r2
adcs r11,r3
adcs r12,#0
subs r7,r0
sbcs r8,r1
sbcs r9,r2
sbcs r10,r3
sbcs r11,#0
sbcs r12,#0 ; r12 is between 0 and 2
pop {r1-r3}
frame address sp,44
adds r0,lr,r12
adcs r1,#0
mov r12,#0
adcs r12,#0
;adds r7,r4 (added above instead)
adcs r8,r5
adcs r9,r6
adcs r10,r4
adcs r11,r5
adcs r0,r4
adcs r1,r5
adcs r2,r12
adcs r3,#0
mov r12,#0
adcs r12,#0
adcs r10,r7
adcs r11,#0
adcs r0,r6
adcs r1,r7
adcs r2,r6
adcs r3,r7
adcs r12,#0
subs r11,r4
sbcs r0,r5
sbcs r1,r6
sbcs r2,r7
sbcs r3,#0
sbcs r12,#0
; now (T + mN) / R is
; 8 9 10 11 0 1 2 3 12 (lsb -> msb)
subs r8,r8,#0xffffffff
sbcs r9,r9,#0xffffffff
sbcs r10,r10,#0xffffffff
sbcs r11,r11,#0
sbcs r4,r0,#0
sbcs r5,r1,#0
sbcs r6,r2,#1
sbcs r7,r3,#0xffffffff
sbc r12,r12,#0
adds r0,r8,r12
adcs r1,r9,r12
adcs r2,r10,r12
adcs r3,r11,#0
adcs r4,r4,#0
adcs r5,r5,#0
adcs r6,r6,r12, lsr #31
adcs r7,r7,r12
add sp,sp,#40
frame address sp,4
pop {pc}
endp
#if !use_mul_for_sqr
; 173 cycles
; If input is A*R mod p, computes A^2*R mod p
; in/out: r0-r7
; clobbers all other registers
P256_sqrmod proc
push {lr}
frame push {lr}
;mul 01, 00
umull r9,r10,r0,r0
umull r11,r12,r0,r1
adds r11,r11,r11
mov lr,#0
umaal r10,r11,lr,lr
;r10 r9 done
;r12 carry for 3rd before col
;r11+C carry for 3rd final col
push {r9,r10}
frame address sp,12
;mul 02, 11
mov r9,#0
umaal r9,r12,r0,r2
adcs r9,r9,r9
umaal r9,r11,r1,r1
;r9 done (3rd col)
;r12 carry for 4th before col
;r11+C carry for 4th final col
push {r9}