-
Notifications
You must be signed in to change notification settings - Fork 0
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
SWCLK pull-down/pull-up #1
Comments
Thanks for the info. The board needs a revision to isolate the battery sense resistors in sleep mode. I will revise it soon and fix this issue.
I have been looking for the cause of high sleep current on the board. Nothing really excessive but higher than the datasheet numbers. I have duplicated the core in a few places on customer specific boards and it is reliable.
Daniel
Jul 18, 2021 12:41:30 PM majbthrd ***@***.***>:
… Just a friendly FYI for any future PCB revisions:
At the moment, the EzSBC board has a 100k pull-down "R2-2" that is in conflict with the internal pull-up on SWCLK. One can see that the signal is mid-scale by probing the signal. CMOS inputs generally don't like mid-scale signals, and this resultant resistor divider circuit adds a bit more current consumption too.
A pull-down is not desirable, as the SAMD21 has a feature called "CPU reset extension" (see Section 13.6.2) where SWCLK is sampled when the external reset is triggered. That is why section 39.1.1 of the SAMD21 datasheet states "a pull-up resistor on the SWCLK pin is critical for reliable operations".
So, perhaps it is worth considering replacing the pull-down with a pull-up?
—
You are receiving this because you are subscribed to this thread.
Reply to this email directly, view it on GitHub[#1], or unsubscribe[https://github.com/notifications/unsubscribe-auth/ARSDOQ2CIVAXLMUZL2T4633TYMU5XANCNFSM5ASN6I6Q].
[data:image/png;base64,iVBORw0KGgoAAAANSUhEUgAAAFQAAABUCAYAAAAcaxDBAAAAAXNSR0IArs4c6QAAAARzQklUCAgICHwIZIgAAAAySURBVHic7cEBDQAAAMKg909tDjegAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAeDVulAABbzDScQAAAABJRU5ErkJggg==###24x24:true###][Tracking image][https://github.com/notifications/beacon/ARSDOQ7TOANPX5L3TSGFIGTTYMU5XA5CNFSM5ASN6I62YY3PNVWWK3TUL52HS4DFUVEXG43VMWVGG33NNVSW45C7NFSM4ODTVL4Q.gif]
|
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Just a friendly FYI for any future PCB revisions:
At the moment, the EzSBC board has a 100k pull-down "R2-2" that is in conflict with the internal pull-up on SWCLK. One can see that the signal is mid-scale by probing the signal. CMOS inputs generally don't like mid-scale signals, and this resultant resistor divider circuit adds a bit more current consumption too.
A pull-down is not desirable, as the SAMD21 has a feature called "CPU reset extension" (see Section 13.6.2) where SWCLK is sampled when the external reset is triggered. That is why section 39.1.1 of the SAMD21 datasheet states "a pull-up resistor on the SWCLK pin is critical for reliable operations".
So, perhaps it is worth considering replacing the pull-down with a pull-up?
The text was updated successfully, but these errors were encountered: