diff --git a/source/portable/NetworkInterface/xilinx_ultrascale/NetworkInterface.c b/source/portable/NetworkInterface/xilinx_ultrascale/NetworkInterface.c index 6fa18eded..fb4643c1c 100644 --- a/source/portable/NetworkInterface/xilinx_ultrascale/NetworkInterface.c +++ b/source/portable/NetworkInterface/xilinx_ultrascale/NetworkInterface.c @@ -50,6 +50,7 @@ #include "x_topology.h" #include "x_emacpsif.h" #include "x_emacpsif_hw.h" +#include "x_emac_map.h" /* Provided memory configured as uncached. */ #include "uncached_memory.h" @@ -160,7 +161,7 @@ struct xtopology_t xXTopologies[ XPAR_XEMACPS_NUM_INSTANCES ] = .intc_baseaddr = 0x0, .intc_emac_intr = 0x0, .scugic_baseaddr = XPAR_SCUGIC_0_CPU_BASEADDR, - .scugic_emac_intr = XPAR_XEMACPS_0_INTR, + .scugic_emac_intr = ZYNQMP_EMACPS_0_IRQ_ID, }, #if ( XPAR_XEMACPS_NUM_INSTANCES > 1 ) [ 1 ] = @@ -170,7 +171,7 @@ struct xtopology_t xXTopologies[ XPAR_XEMACPS_NUM_INSTANCES ] = .intc_baseaddr = 0x0, .intc_emac_intr = 0x0, .scugic_baseaddr = XPAR_SCUGIC_0_CPU_BASEADDR, - .scugic_emac_intr = XPAR_XEMACPS_1_INTR, + .scugic_emac_intr = ZYNQMP_EMACPS_1_IRQ_ID, }, #elif ( XPAR_XEMACPS_NUM_INSTANCES > 2 ) [ 2 ] = @@ -180,7 +181,7 @@ struct xtopology_t xXTopologies[ XPAR_XEMACPS_NUM_INSTANCES ] = .intc_baseaddr = 0x0, .intc_emac_intr = 0x0, .scugic_baseaddr = XPAR_SCUGIC_0_CPU_BASEADDR, - .scugic_emac_intr = XPAR_XEMACPS_2_INTR, + .scugic_emac_intr = ZYNQMP_EMACPS_2_IRQ_ID, }, #elif ( XPAR_XEMACPS_NUM_INSTANCES > 3 ) [ 3 ] = @@ -190,7 +191,7 @@ struct xtopology_t xXTopologies[ XPAR_XEMACPS_NUM_INSTANCES ] = .intc_baseaddr = 0x0, .intc_emac_intr = 0x0, .scugic_baseaddr = XPAR_SCUGIC_0_CPU_BASEADDR, - .scugic_emac_intr = XPAR_XEMACPS_3_INTR, + .scugic_emac_intr = ZYNQMP_EMACPS_3_IRQ_ID, }, #endif /* if ( XPAR_XEMACPS_NUM_INSTANCES > 1 ) */ }; diff --git a/source/portable/NetworkInterface/xilinx_ultrascale/x_emac_map.h b/source/portable/NetworkInterface/xilinx_ultrascale/x_emac_map.h new file mode 100644 index 000000000..78bf9804e --- /dev/null +++ b/source/portable/NetworkInterface/xilinx_ultrascale/x_emac_map.h @@ -0,0 +1,80 @@ +/* + * Copyright (c) 2007-2013 Xilinx, Inc. All rights reserved. + * + * Xilinx, Inc. + * XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A + * COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS + * ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR + * STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION + * IS FREE FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE + * FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. + * XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO + * THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO + * ANY WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE + * FROM CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. + * + */ + +#ifndef __XEMACMAP_H_ +#define __XEMACMAP_H_ + +#include "xparameters_ps.h" +#include "xparameters.h" + + +#define ZYNQMP_EMACPS_0_BASEADDR 0xFF0B0000 +#define ZYNQMP_EMACPS_1_BASEADDR 0xFF0C0000 +#define ZYNQMP_EMACPS_2_BASEADDR 0xFF0D0000 +#define ZYNQMP_EMACPS_3_BASEADDR 0xFF0E0000 + +#if XPAR_XEMACPS_0_BASEADDR == ZYNQMP_EMACPS_0_BASEADDR + #define ZYNQMP_EMACPS_0_IRQ_ID XPAR_XEMACPS_0_INTR +#endif +#if XPAR_XEMACPS_0_BASEADDR == ZYNQMP_EMACPS_1_BASEADDR + #define ZYNQMP_EMACPS_0_IRQ_ID XPAR_XEMACPS_1_INTR +#endif +#if XPAR_XEMACPS_0_BASEADDR == ZYNQMP_EMACPS_2_BASEADDR + #define ZYNQMP_EMACPS_0_IRQ_ID XPAR_XEMACPS_2_INTR +#endif +#if XPAR_XEMACPS_0_BASEADDR == ZYNQMP_EMACPS_3_BASEADDR + #define ZYNQMP_EMACPS_0_IRQ_ID XPAR_XEMACPS_3_INTR +#endif +#if XPAR_XEMACPS_1_BASEADDR == ZYNQMP_EMACPS_0_BASEADDR + #define ZYNQMP_EMACPS_1_IRQ_ID XPAR_XEMACPS_0_INTR +#endif +#if XPAR_XEMACPS_1_BASEADDR == ZYNQMP_EMACPS_1_BASEADDR + #define ZYNQMP_EMACPS_1_IRQ_ID XPAR_XEMACPS_1_INTR +#endif +#if XPAR_XEMACPS_1_BASEADDR == ZYNQMP_EMACPS_2_BASEADDR + #define ZYNQMP_EMACPS_1_IRQ_ID XPAR_XEMACPS_2_INTR +#endif +#if XPAR_XEMACPS_1_BASEADDR == ZYNQMP_EMACPS_3_BASEADDR + #define ZYNQMP_EMACPS_1_IRQ_ID XPAR_XEMACPS_3_INTR +#endif +#if XPAR_XEMACPS_2_BASEADDR == ZYNQMP_EMACPS_0_BASEADDR + #define ZYNQMP_EMACPS_2_IRQ_ID XPAR_XEMACPS_0_INTR +#endif +#if XPAR_XEMACPS_2_BASEADDR == ZYNQMP_EMACPS_1_BASEADDR + #define ZYNQMP_EMACPS_2_IRQ_ID XPAR_XEMACPS_1_INTR +#endif +#if XPAR_XEMACPS_2_BASEADDR == ZYNQMP_EMACPS_2_BASEADDR + #define ZYNQMP_EMACPS_2_IRQ_ID XPAR_XEMACPS_2_INTR +#endif +#if XPAR_XEMACPS_2_BASEADDR == ZYNQMP_EMACPS_3_BASEADDR + #define ZYNQMP_EMACPS_2_IRQ_ID XPAR_XEMACPS_3_INTR +#endif +#if XPAR_XEMACPS_3_BASEADDR == ZYNQMP_EMACPS_0_BASEADDR + #define ZYNQMP_EMACPS_3_IRQ_ID XPAR_XEMACPS_0_INTR +#endif +#if XPAR_XEMACPS_3_BASEADDR == ZYNQMP_EMACPS_1_BASEADDR + #define ZYNQMP_EMACPS_3_IRQ_ID XPAR_XEMACPS_1_INTR +#endif +#if XPAR_XEMACPS_3_BASEADDR == ZYNQMP_EMACPS_2_BASEADDR + #define ZYNQMP_EMACPS_3_IRQ_ID XPAR_XEMACPS_2_INTR +#endif +#if XPAR_XEMACPS_3_BASEADDR == ZYNQMP_EMACPS_3_BASEADDR + #define ZYNQMP_EMACPS_3_IRQ_ID XPAR_XEMACPS_3_INTR +#endif + +#endif /* __XEMACMAP_H_ */ diff --git a/source/portable/NetworkInterface/xilinx_ultrascale/x_emacpsif_physpeed.c b/source/portable/NetworkInterface/xilinx_ultrascale/x_emacpsif_physpeed.c index c51aee080..1e46156de 100644 --- a/source/portable/NetworkInterface/xilinx_ultrascale/x_emacpsif_physpeed.c +++ b/source/portable/NetworkInterface/xilinx_ultrascale/x_emacpsif_physpeed.c @@ -54,6 +54,7 @@ #include #include "x_emacpsif.h" +#include "x_emac_map.h" #include "xparameters_ps.h" #include "xparameters.h"