From a4bee2e958c92b2931481eefc61d8ab29b2e5bba Mon Sep 17 00:00:00 2001 From: Devaraj Ranganna Date: Sat, 30 Sep 2023 12:54:47 +0000 Subject: [PATCH] ci: Fix formatting issues Signed-off-by: Devaraj Ranganna --- .../MPS3_AN552/CMSIS_Driver/Driver_Common.h | 8 ++-- .../MPS3_AN552/CMSIS_Driver/Driver_ETH.h | 2 +- .../MPS3_AN552/CMSIS_Driver/Driver_ETH_MAC.h | 4 +- .../MPS3_AN552/CMSIS_Driver/Driver_ETH_PHY.h | 2 +- .../MPS3_AN552/CMSIS_Driver/ETH_LAN91C111.c | 2 +- .../MPS3_AN552/CMSIS_Driver/ETH_LAN91C111.h | 4 +- .../MPS3_AN552/Device/Include/SSE300MPS3.h | 2 +- .../MPS3_AN552/Device/Include/cachel1_armv7.h | 2 +- .../Device/Include/cmsis_armclang.h | 2 +- .../Device/Include/cmsis_compiler.h | 2 +- .../MPS3_AN552/Device/Include/cmsis_gcc.h | 2 +- .../MPS3_AN552/Device/Include/cmsis_version.h | 2 +- .../MPS3_AN552/Device/Include/core_cm55.h | 2 +- .../MPS3_AN552/Device/Include/mpu_armv8.h | 34 +++++++------- .../Device/Include/platform_base_address.h | 2 +- .../MPS3_AN552/Device/Include/platform_irq.h | 2 +- .../MPS3_AN552/Device/Include/platform_pins.h | 2 +- .../MPS3_AN552/Device/Include/platform_regs.h | 2 +- .../MPS3_AN552/Device/Include/pmu_armv8.h | 44 +++++++++---------- .../Device/Include/system_SSE300MPS3.h | 2 +- 20 files changed, 62 insertions(+), 62 deletions(-) diff --git a/source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/Driver_Common.h b/source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/Driver_Common.h index ca7bca38df..5ab9d369e2 100644 --- a/source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/Driver_Common.h +++ b/source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/Driver_Common.h @@ -33,7 +33,7 @@ * Initial release */ -/* This file is a copy of +/* This file is a copy of * https://github.com/ARM-software/CMSIS_5/blob/a75f01746df18bb5b929dfb8dc6c9407fac3a0f3/CMSIS/Driver/Include/Driver_Common.h */ @@ -55,17 +55,17 @@ typedef struct _ARM_DRIVER_VERSION { } ARM_DRIVER_VERSION; /* General return codes */ -#define ARM_DRIVER_OK 0 ///< Operation succeeded +#define ARM_DRIVER_OK 0 ///< Operation succeeded #define ARM_DRIVER_ERROR -1 ///< Unspecified error #define ARM_DRIVER_ERROR_BUSY -2 ///< Driver is busy #define ARM_DRIVER_ERROR_TIMEOUT -3 ///< Timeout occurred #define ARM_DRIVER_ERROR_UNSUPPORTED -4 ///< Operation not supported #define ARM_DRIVER_ERROR_PARAMETER -5 ///< Parameter error -#define ARM_DRIVER_ERROR_SPECIFIC -6 ///< Start of driver specific errors +#define ARM_DRIVER_ERROR_SPECIFIC -6 ///< Start of driver specific errors /** \brief General power states -*/ +*/ typedef enum _ARM_POWER_STATE { ARM_POWER_OFF, ///< Power off: no operation possible ARM_POWER_LOW, ///< Low Power mode: retain state, detect and signal wake-up events diff --git a/source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/Driver_ETH.h b/source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/Driver_ETH.h index b974b43642..cf1378b1ae 100644 --- a/source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/Driver_ETH.h +++ b/source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/Driver_ETH.h @@ -37,7 +37,7 @@ * Initial release */ -/* This file is a copy of +/* This file is a copy of * https://github.com/ARM-software/CMSIS_5/blob/a75f01746df18bb5b929dfb8dc6c9407fac3a0f3/CMSIS/Driver/Include/Driver_ETH.h */ diff --git a/source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/Driver_ETH_MAC.h b/source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/Driver_ETH_MAC.h index 0f220b2d9e..865ccb8042 100644 --- a/source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/Driver_ETH_MAC.h +++ b/source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/Driver_ETH_MAC.h @@ -53,7 +53,7 @@ * Initial release */ -/* This file is a copy of +/* This file is a copy of * https://github.com/ARM-software/CMSIS_5/blob/a75f01746df18bb5b929dfb8dc6c9407fac3a0f3/CMSIS/Driver/Include/Driver_ETH_MAC.h */ @@ -202,7 +202,7 @@ typedef struct _ARM_ETH_MAC_TIME { \param[in] len Frame buffer length in bytes \return number of data bytes read or execution status - value >= 0: number of data bytes read - - value < 0: error occurred, value is execution status as defined with \ref execution_status + - value < 0: error occurred, value is execution status as defined with \ref execution_status */ /** \fn uint32_t ARM_ETH_MAC_GetRxFrameSize (void) diff --git a/source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/Driver_ETH_PHY.h b/source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/Driver_ETH_PHY.h index 77f6bfcd58..d6ca30e61f 100644 --- a/source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/Driver_ETH_PHY.h +++ b/source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/Driver_ETH_PHY.h @@ -38,7 +38,7 @@ * Initial release */ -/* This file is a copy of +/* This file is a copy of * https://github.com/ARM-software/CMSIS_5/blob/a75f01746df18bb5b929dfb8dc6c9407fac3a0f3/CMSIS/Driver/Include/Driver_ETH_PHY.h */ diff --git a/source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/ETH_LAN91C111.c b/source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/ETH_LAN91C111.c index 02c0e75ebe..f6c0c08e24 100644 --- a/source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/ETH_LAN91C111.c +++ b/source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/ETH_LAN91C111.c @@ -575,7 +575,7 @@ static int32_t MAC_SendFrame (const uint8_t *frame, uint32_t len, uint32_t flags \param[in] len Frame buffer length in bytes \return number of data bytes read or execution status - value >= 0: number of data bytes read - - value < 0: error occurred, value is execution status as defined with \ref execution_status + - value < 0: error occurred, value is execution status as defined with \ref execution_status */ static int32_t MAC_ReadFrame (uint8_t *frame, uint32_t len) { uint32_t stat,sz,data; diff --git a/source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/ETH_LAN91C111.h b/source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/ETH_LAN91C111.h index 359afa1496..1a09ead6b8 100644 --- a/source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/ETH_LAN91C111.h +++ b/source/portable/NetworkInterface/MPS3_AN552/CMSIS_Driver/ETH_LAN91C111.h @@ -25,7 +25,7 @@ * Project: Register Interface Definitions for LAN91C111 * -------------------------------------------------------------------- */ -/* This file is a copy of +/* This file is a copy of * https://github.com/ARM-software/CMSIS-Driver/blob/b91908d907b647bd212920e30b383b03809d68e0/ETH/ETH_LAN91C111.h */ @@ -217,7 +217,7 @@ #define MSK_TX_EMPTY 0x04 // Tx FIFO empty int. mask #define MSK_TX_INT 0x02 // Tx Complete int. mask #define MSK_RCV 0x01 // Rx Complete int. mask - + /* PHY Management Interface */ #define MGMT_MSK_CRS100 0x0040 // Disables CRS100 detection in Tx Half Dup. #define MGMT_MDOE 0x0008 // MII - 1= MDO pin output, 0= MDO tristated diff --git a/source/portable/NetworkInterface/MPS3_AN552/Device/Include/SSE300MPS3.h b/source/portable/NetworkInterface/MPS3_AN552/Device/Include/SSE300MPS3.h index b12c46e278..bd741ec626 100755 --- a/source/portable/NetworkInterface/MPS3_AN552/Device/Include/SSE300MPS3.h +++ b/source/portable/NetworkInterface/MPS3_AN552/Device/Include/SSE300MPS3.h @@ -16,7 +16,7 @@ * limitations under the License. */ -/* This file is a copy of +/* This file is a copy of * https://gitlab.arm.com/iot/open-iot-sdk/arm-corstone-platform-bsp/-/blob/main/corstone300/Device/Include/SSE300MPS3.h */ diff --git a/source/portable/NetworkInterface/MPS3_AN552/Device/Include/cachel1_armv7.h b/source/portable/NetworkInterface/MPS3_AN552/Device/Include/cachel1_armv7.h index f6c07428d1..855439c09b 100644 --- a/source/portable/NetworkInterface/MPS3_AN552/Device/Include/cachel1_armv7.h +++ b/source/portable/NetworkInterface/MPS3_AN552/Device/Include/cachel1_armv7.h @@ -24,7 +24,7 @@ * limitations under the License. */ -/* This file is a copy of +/* This file is a copy of * https://github.com/ARM-software/CMSIS_5/blob/a75f01746df18bb5b929dfb8dc6c9407fac3a0f3/CMSIS/Core/Include/cachel1_armv7.h */ diff --git a/source/portable/NetworkInterface/MPS3_AN552/Device/Include/cmsis_armclang.h b/source/portable/NetworkInterface/MPS3_AN552/Device/Include/cmsis_armclang.h index 83edea46cd..a45156cd8b 100644 --- a/source/portable/NetworkInterface/MPS3_AN552/Device/Include/cmsis_armclang.h +++ b/source/portable/NetworkInterface/MPS3_AN552/Device/Include/cmsis_armclang.h @@ -26,7 +26,7 @@ /*lint -esym(9058, IRQn)*/ /* disable MISRA 2012 Rule 2.4 for IRQn */ -/* This file is a copy of +/* This file is a copy of * https://github.com/ARM-software/CMSIS_5/blob/a75f01746df18bb5b929dfb8dc6c9407fac3a0f3/CMSIS/Core/Include/cmsis_armclang.h */ diff --git a/source/portable/NetworkInterface/MPS3_AN552/Device/Include/cmsis_compiler.h b/source/portable/NetworkInterface/MPS3_AN552/Device/Include/cmsis_compiler.h index 7557189d94..68bfe5ee22 100644 --- a/source/portable/NetworkInterface/MPS3_AN552/Device/Include/cmsis_compiler.h +++ b/source/portable/NetworkInterface/MPS3_AN552/Device/Include/cmsis_compiler.h @@ -24,7 +24,7 @@ * limitations under the License. */ -/* This file is a copy of +/* This file is a copy of * https://github.com/ARM-software/CMSIS_5/blob/a75f01746df18bb5b929dfb8dc6c9407fac3a0f3/CMSIS/Core/Include/cmsis_compiler.h */ diff --git a/source/portable/NetworkInterface/MPS3_AN552/Device/Include/cmsis_gcc.h b/source/portable/NetworkInterface/MPS3_AN552/Device/Include/cmsis_gcc.h index 32241ee86a..ffb718c925 100644 --- a/source/portable/NetworkInterface/MPS3_AN552/Device/Include/cmsis_gcc.h +++ b/source/portable/NetworkInterface/MPS3_AN552/Device/Include/cmsis_gcc.h @@ -24,7 +24,7 @@ * limitations under the License. */ -/* This file is a copy of +/* This file is a copy of * https://github.com/ARM-software/CMSIS_5/blob/a75f01746df18bb5b929dfb8dc6c9407fac3a0f3/CMSIS/Core/Include/cmsis_gcc.h */ diff --git a/source/portable/NetworkInterface/MPS3_AN552/Device/Include/cmsis_version.h b/source/portable/NetworkInterface/MPS3_AN552/Device/Include/cmsis_version.h index ae6dfc93be..32d3afbd96 100644 --- a/source/portable/NetworkInterface/MPS3_AN552/Device/Include/cmsis_version.h +++ b/source/portable/NetworkInterface/MPS3_AN552/Device/Include/cmsis_version.h @@ -24,7 +24,7 @@ * limitations under the License. */ -/* This file is a copy of +/* This file is a copy of * https://github.com/ARM-software/CMSIS_5/blob/a75f01746df18bb5b929dfb8dc6c9407fac3a0f3/CMSIS/Core/Include/cmsis_version.h */ diff --git a/source/portable/NetworkInterface/MPS3_AN552/Device/Include/core_cm55.h b/source/portable/NetworkInterface/MPS3_AN552/Device/Include/core_cm55.h index 0e7a0a5806..bc49aa5654 100644 --- a/source/portable/NetworkInterface/MPS3_AN552/Device/Include/core_cm55.h +++ b/source/portable/NetworkInterface/MPS3_AN552/Device/Include/core_cm55.h @@ -24,7 +24,7 @@ * limitations under the License. */ -/* This file is a copy of +/* This file is a copy of * https://github.com/ARM-software/CMSIS_5/blob/a75f01746df18bb5b929dfb8dc6c9407fac3a0f3/CMSIS/Core/Include/core_cm55.h */ diff --git a/source/portable/NetworkInterface/MPS3_AN552/Device/Include/mpu_armv8.h b/source/portable/NetworkInterface/MPS3_AN552/Device/Include/mpu_armv8.h index 854fae420f..832862128c 100644 --- a/source/portable/NetworkInterface/MPS3_AN552/Device/Include/mpu_armv8.h +++ b/source/portable/NetworkInterface/MPS3_AN552/Device/Include/mpu_armv8.h @@ -24,7 +24,7 @@ * limitations under the License. */ -/* This file is a copy of +/* This file is a copy of * https://github.com/ARM-software/CMSIS_5/blob/a75f01746df18bb5b929dfb8dc6c9407fac3a0f3/CMSIS/Core/Include/mpu_armv8.h */ @@ -170,7 +170,7 @@ (MPU_RLAR_EN_Msk)) #if defined(MPU_RLAR_PXN_Pos) - + /** \brief Region Limit Address Register with PXN value * \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended. * \param PXN Privileged execute never. Defines whether code can be executed from this privileged region. @@ -181,7 +181,7 @@ (((PXN) << MPU_RLAR_PXN_Pos) & MPU_RLAR_PXN_Msk) | \ (((IDX) << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \ (MPU_RLAR_EN_Msk)) - + #endif /** @@ -200,7 +200,7 @@ __STATIC_INLINE uint32_t ARM_MPU_TYPE() { return ((MPU->TYPE) >> 8); } - + /** Enable the MPU. * \param MPU_Control Default access permissions for unconfigured regions. */ @@ -267,11 +267,11 @@ __STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t at const uint8_t reg = idx / 4U; const uint32_t pos = ((idx % 4U) * 8U); const uint32_t mask = 0xFFU << pos; - + if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) { return; // invalid index } - + mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask)); } @@ -318,7 +318,7 @@ __STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr) * \param rnr Region number to be cleared. */ __STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr) -{ +{ ARM_MPU_ClrRegionEx(MPU_NS, rnr); } #endif @@ -328,7 +328,7 @@ __STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr) * \param rnr Region number to be configured. * \param rbar Value for RBAR register. * \param rlar Value for RLAR register. -*/ +*/ __STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar) { mpu->RNR = rnr; @@ -340,7 +340,7 @@ __STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t r * \param rnr Region number to be configured. * \param rbar Value for RBAR register. * \param rlar Value for RLAR register. -*/ +*/ __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar) { ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar); @@ -351,10 +351,10 @@ __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rla * \param rnr Region number to be configured. * \param rbar Value for RBAR register. * \param rlar Value for RLAR register. -*/ +*/ __STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar) { - ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar); + ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar); } #endif @@ -366,7 +366,7 @@ __STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t __STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len) { uint32_t i; - for (i = 0U; i < len; ++i) + for (i = 0U; i < len; ++i) { dst[i] = src[i]; } @@ -378,7 +378,7 @@ __STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_ * \param table Pointer to the MPU configuration table. * \param cnt Amount of regions to be configured. */ -__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) +__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) { const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U; if (cnt == 1U) { @@ -387,7 +387,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_ } else { uint32_t rnrBase = rnr & ~(MPU_TYPE_RALIASES-1U); uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES; - + mpu->RNR = rnrBase; while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) { uint32_t c = MPU_TYPE_RALIASES - rnrOffset; @@ -398,7 +398,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_ rnrBase += MPU_TYPE_RALIASES; mpu->RNR = rnrBase; } - + ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize); } } @@ -408,7 +408,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_ * \param table Pointer to the MPU configuration table. * \param cnt Amount of regions to be configured. */ -__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) +__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) { ARM_MPU_LoadEx(MPU, rnr, table, cnt); } @@ -419,7 +419,7 @@ __STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, u * \param table Pointer to the MPU configuration table. * \param cnt Amount of regions to be configured. */ -__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) +__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) { ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt); } diff --git a/source/portable/NetworkInterface/MPS3_AN552/Device/Include/platform_base_address.h b/source/portable/NetworkInterface/MPS3_AN552/Device/Include/platform_base_address.h index e4cccb3e53..8743c7f28e 100755 --- a/source/portable/NetworkInterface/MPS3_AN552/Device/Include/platform_base_address.h +++ b/source/portable/NetworkInterface/MPS3_AN552/Device/Include/platform_base_address.h @@ -22,7 +22,7 @@ * Ethos-U55 platform. */ -/* This file is a copy of +/* This file is a copy of * https://gitlab.arm.com/iot/open-iot-sdk/arm-corstone-platform-bsp/-/blob/ce35a01596530637b16287234788d68b0d1c75a8/corstone300/Board/Platform/platform_base_address.h */ diff --git a/source/portable/NetworkInterface/MPS3_AN552/Device/Include/platform_irq.h b/source/portable/NetworkInterface/MPS3_AN552/Device/Include/platform_irq.h index f220b111ba..c4c06e2e8b 100755 --- a/source/portable/NetworkInterface/MPS3_AN552/Device/Include/platform_irq.h +++ b/source/portable/NetworkInterface/MPS3_AN552/Device/Include/platform_irq.h @@ -16,7 +16,7 @@ * limitations under the License. */ -/* This file is a copy of +/* This file is a copy of * https://gitlab.arm.com/iot/open-iot-sdk/arm-corstone-platform-bsp/-/blob/ce35a01596530637b16287234788d68b0d1c75a8/corstone300/Board/Platform/platform_irq.h */ diff --git a/source/portable/NetworkInterface/MPS3_AN552/Device/Include/platform_pins.h b/source/portable/NetworkInterface/MPS3_AN552/Device/Include/platform_pins.h index c613a5eff3..1489afd2f9 100755 --- a/source/portable/NetworkInterface/MPS3_AN552/Device/Include/platform_pins.h +++ b/source/portable/NetworkInterface/MPS3_AN552/Device/Include/platform_pins.h @@ -21,7 +21,7 @@ * \brief This file defines all the pins for this platform. */ -/* This file is a copy of +/* This file is a copy of * https://gitlab.arm.com/iot/open-iot-sdk/arm-corstone-platform-bsp/-/blob/ce35a01596530637b16287234788d68b0d1c75a8/corstone300/Board/Platform/platform_pins.h */ diff --git a/source/portable/NetworkInterface/MPS3_AN552/Device/Include/platform_regs.h b/source/portable/NetworkInterface/MPS3_AN552/Device/Include/platform_regs.h index 6097c00507..47d318735c 100755 --- a/source/portable/NetworkInterface/MPS3_AN552/Device/Include/platform_regs.h +++ b/source/portable/NetworkInterface/MPS3_AN552/Device/Include/platform_regs.h @@ -16,7 +16,7 @@ * limitations under the License. */ -/* This file is a copy of +/* This file is a copy of * https://gitlab.arm.com/iot/open-iot-sdk/arm-corstone-platform-bsp/-/blob/ce35a01596530637b16287234788d68b0d1c75a8/corstone300/Board/Platform/platform_regs.h */ diff --git a/source/portable/NetworkInterface/MPS3_AN552/Device/Include/pmu_armv8.h b/source/portable/NetworkInterface/MPS3_AN552/Device/Include/pmu_armv8.h index f17298c110..e11cbb8f80 100644 --- a/source/portable/NetworkInterface/MPS3_AN552/Device/Include/pmu_armv8.h +++ b/source/portable/NetworkInterface/MPS3_AN552/Device/Include/pmu_armv8.h @@ -24,7 +24,7 @@ * limitations under the License. */ -/* This file is a copy of +/* This file is a copy of * https://github.com/ARM-software/CMSIS_5/blob/a75f01746df18bb5b929dfb8dc6c9407fac3a0f3/CMSIS/Core/Include/pmu_armv8.h */ @@ -198,23 +198,23 @@ __STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Disable(uint32_t mask); __STATIC_INLINE void ARM_PMU_CNTR_Increment(uint32_t mask); -/** +/** \brief Enable the PMU */ -__STATIC_INLINE void ARM_PMU_Enable(void) +__STATIC_INLINE void ARM_PMU_Enable(void) { PMU->CTRL |= PMU_CTRL_ENABLE_Msk; } -/** +/** \brief Disable the PMU */ -__STATIC_INLINE void ARM_PMU_Disable(void) +__STATIC_INLINE void ARM_PMU_Disable(void) { PMU->CTRL &= ~PMU_CTRL_ENABLE_Msk; } -/** +/** \brief Set event to count for PMU eventer counter \param [in] num Event counter (0-30) to configure \param [in] type Event to count @@ -224,7 +224,7 @@ __STATIC_INLINE void ARM_PMU_Set_EVTYPER(uint32_t num, uint32_t type) PMU->EVTYPER[num] = type; } -/** +/** \brief Reset cycle counter */ __STATIC_INLINE void ARM_PMU_CYCCNT_Reset(void) @@ -232,7 +232,7 @@ __STATIC_INLINE void ARM_PMU_CYCCNT_Reset(void) PMU->CTRL |= PMU_CTRL_CYCCNT_RESET_Msk; } -/** +/** \brief Reset all event counters */ __STATIC_INLINE void ARM_PMU_EVCNTR_ALL_Reset(void) @@ -240,8 +240,8 @@ __STATIC_INLINE void ARM_PMU_EVCNTR_ALL_Reset(void) PMU->CTRL |= PMU_CTRL_EVENTCNT_RESET_Msk; } -/** - \brief Enable counters +/** + \brief Enable counters \param [in] mask Counters to enable \note Enables one or more of the following: - event counters (0-30) @@ -252,7 +252,7 @@ __STATIC_INLINE void ARM_PMU_CNTR_Enable(uint32_t mask) PMU->CNTENSET = mask; } -/** +/** \brief Disable counters \param [in] mask Counters to enable \note Disables one or more of the following: @@ -264,7 +264,7 @@ __STATIC_INLINE void ARM_PMU_CNTR_Disable(uint32_t mask) PMU->CNTENCLR = mask; } -/** +/** \brief Read cycle counter \return Cycle count */ @@ -273,7 +273,7 @@ __STATIC_INLINE uint32_t ARM_PMU_Get_CCNTR(void) return PMU->CCNTR; } -/** +/** \brief Read event counter \param [in] num Event counter (0-30) to read \return Event count @@ -283,7 +283,7 @@ __STATIC_INLINE uint32_t ARM_PMU_Get_EVCNTR(uint32_t num) return PMU_EVCNTR_CNT_Msk & PMU->EVCNTR[num]; } -/** +/** \brief Read counter overflow status \return Counter overflow status bits for the following: - event counters (0-30) @@ -291,10 +291,10 @@ __STATIC_INLINE uint32_t ARM_PMU_Get_EVCNTR(uint32_t num) */ __STATIC_INLINE uint32_t ARM_PMU_Get_CNTR_OVS(void) { - return PMU->OVSSET; + return PMU->OVSSET; } -/** +/** \brief Clear counter overflow status \param [in] mask Counter overflow status bits to clear \note Clears overflow status bits for one or more of the following: @@ -306,8 +306,8 @@ __STATIC_INLINE void ARM_PMU_Set_CNTR_OVS(uint32_t mask) PMU->OVSCLR = mask; } -/** - \brief Enable counter overflow interrupt request +/** + \brief Enable counter overflow interrupt request \param [in] mask Counter overflow interrupt request bits to set \note Sets overflow interrupt request bits for one or more of the following: - event counters (0-30) @@ -318,8 +318,8 @@ __STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Enable(uint32_t mask) PMU->INTENSET = mask; } -/** - \brief Disable counter overflow interrupt request +/** + \brief Disable counter overflow interrupt request \param [in] mask Counter overflow interrupt request bits to clear \note Clears overflow interrupt request bits for one or more of the following: - event counters (0-30) @@ -330,8 +330,8 @@ __STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Disable(uint32_t mask) PMU->INTENCLR = mask; } -/** - \brief Software increment event counter +/** + \brief Software increment event counter \param [in] mask Counters to increment \note Software increment bits for one or more event counters (0-30) */ diff --git a/source/portable/NetworkInterface/MPS3_AN552/Device/Include/system_SSE300MPS3.h b/source/portable/NetworkInterface/MPS3_AN552/Device/Include/system_SSE300MPS3.h index d2cd40bd6d..0aa08214a6 100755 --- a/source/portable/NetworkInterface/MPS3_AN552/Device/Include/system_SSE300MPS3.h +++ b/source/portable/NetworkInterface/MPS3_AN552/Device/Include/system_SSE300MPS3.h @@ -21,7 +21,7 @@ * Git SHA: b5f0603d6a584d1724d952fd8b0737458b90d62b */ -/* This file is a copy of +/* This file is a copy of * https://gitlab.arm.com/iot/open-iot-sdk/arm-corstone-platform-bsp/-/blob/main/corstone300/Device/Include/system_SSE300MPS3.h */