From 2ca535d976caa2e0d8a10c1a95eac091b4cdcd2b Mon Sep 17 00:00:00 2001 From: Catherine Date: Sun, 29 Oct 2023 16:13:17 +0000 Subject: [PATCH] platform.rev_c123: add Ram-Pak resources. (NOT VERIFIED) --- software/glasgow/platform/rev_c.py | 36 ++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/software/glasgow/platform/rev_c.py b/software/glasgow/platform/rev_c.py index d31765751..71cf578f9 100644 --- a/software/glasgow/platform/rev_c.py +++ b/software/glasgow/platform/rev_c.py @@ -121,6 +121,42 @@ class _GlasgowPlatformRevC(GlasgowPlatformICE40): "F2 - - E3 E1 E2 D1 - - D2 C1 D3 C2 - - C3 B1 C4 B2 - - - "), ] + def add_ram_pak_resources(self): + self.add_resources([ + Resource("hyperram", 0, + Subsignal("reset", + Pins("21", dir="o", conn=("lvds", 0)), + Attrs(IO_STANDARD="SB_LVCMOS18")), + Subsignal("cs", + Pins("8", dir="o", conn=("lvds", 0)), + Attrs(IO_STANDARD="SB_LVCMOS18")), + Subsignal("clk", + DiffPairs("5", "3", dir="o", conn=("lvds", 0)), + Attrs(IO_STANDARD="SB_LVDS")), + Subsignal("rwds", + Pins("10", dir="io", conn=("lvds", 0)), + Attrs(IO_STANDARD="SB_LVCMOS18")), + Subsignal("dq", + Pins("16 15 9 11 14 17 20 22", dir="io", conn=("lvds", 0))), + Attrs(IO_STANDARD="SB_LVCMOS18")), + Resource("hyperram", 1, + Subsignal("reset", + Pins("23", dir="o", conn=("lvds", 0)), + Attrs(IO_STANDARD="SB_LVCMOS18")), + Subsignal("cs", + Pins("27", dir="o", conn=("lvds", 0)), + Attrs(IO_STANDARD="SB_LVCMOS18")), + Subsignal("clk", + DiffPairs("26", "28", dir="o", conn=("lvds", 0)), + Attrs(IO_STANDARD="SB_LVDS")), + Subsignal("rwds", + Pins("29", dir="io", conn=("lvds", 0)), + Attrs(IO_STANDARD="SB_LVCMOS18")), + Subsignal("dq", + Pins("35 38 32 34 33 40 39 41", dir="io", conn=("lvds", 0))), + Attrs(IO_STANDARD="SB_LVCMOS18")), + ]) + class GlasgowPlatformRevC0(_GlasgowPlatformRevC): resources = _GlasgowPlatformRevC.resources + [