From d8a1cd4125a09af4e6207932f72c250591e5b1cf Mon Sep 17 00:00:00 2001 From: Purdea Andrei Date: Sat, 24 Aug 2024 21:26:39 +0300 Subject: [PATCH] test_iostream.test_skid: fix assert message --- software/tests/gateware/test_iostream.py | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/software/tests/gateware/test_iostream.py b/software/tests/gateware/test_iostream.py index ab47f0871..0efebba7d 100644 --- a/software/tests/gateware/test_iostream.py +++ b/software/tests/gateware/test_iostream.py @@ -176,8 +176,8 @@ async def testbench(ctx): await ctx.tick() - assert ctx.get(dut.i_stream.p.port.data.i) == 0b0101, f"{i_stream_p.port.data.i:#06b}" - assert ctx.get(dut.i_stream.p.meta) == 0b0101, f"{i_stream_p.meta:#06b}" + assert ctx.get(dut.i_stream.p.port.data.i) == 0b0101, f"{ctx.get(dut.i_stream.p.port.data.i):#06b}" + assert ctx.get(dut.i_stream.p.meta) == 0b0101, f"{ctx.get(dut.i_stream.p.meta):#06b}" ctx.set(dut.o_stream.p.meta, 0b1111) ctx.set(port.i, 0b1111) @@ -186,15 +186,15 @@ async def testbench(ctx): await ctx.tick().repeat(10) # The skid buffer should protect the input stream from changes on the input signal - assert ctx.get(dut.i_stream.p.port.data.i) == 0b0101, f"{i_stream_p.port.data.i:#06b}" - assert ctx.get(dut.i_stream.p.meta) == 0b0101, f"{i_stream_p.meta:#06b}" + assert ctx.get(dut.i_stream.p.port.data.i) == 0b0101, f"{ctx.get(dut.i_stream.p.port.data.i):#06b}" + assert ctx.get(dut.i_stream.p.meta) == 0b0101, f"{ctx.get(dut.i_stream.p.meta):#06b}" ctx.set(dut.i_stream.ready, 1) await ctx.tick() - assert ctx.get(dut.i_stream.p.port.data.i) == 0b1111, f"{i_stream_p.port.data.i:#06b}" - assert ctx.get(dut.i_stream.p.meta) == 0b1111, f"{i_stream_p.meta:#06b}" + assert ctx.get(dut.i_stream.p.port.data.i) == 0b1111, f"{ctx.get(dut.i_stream.p.port.data.i):#06b}" + assert ctx.get(dut.i_stream.p.meta) == 0b1111, f"{ctx.get(dut.i_stream.p.meta):#06b}" sim = Simulator(dut) sim.add_clock(1e-6)