Analog Inference 1T1R? 1R?

[HeatPhoenix]

What are the assumptions made in the IBM AI HW Kit with regards to access transistors? Are they implemented, are they assumed to be present (individually accessible devices)? The only reference to transistors I could find in the project was in:

aihwkit/notebooks/analog_fusion.ipynb

Line 22 in 69e524f

"The Fusion chip is a first-generation AI Analog chip by IBM Research. The chip has 512 word-lines (WL) and 2048 bit-lines. Each WL/BL address as a Phase Changed Memory (PCM) device in series with an access transistor that can be individually accessed. Therefore, there are 512x2048 or 1,048,576 PCM devices in total. This implies that the chip can hold neural networks with about 1 million weights. \n",

wherein it is discussed in the context of the fusion chip (which is also the basis of the PCM data in the toolkit, if I understand it correctly)?

[maljoras-sony]

Hi @HeatPhoenix,
many thanks for the question. Typically it is assumed not assumed that individual devices are accessible directly and individually. If one wants to readout devices, one has to perform an MVM, e.g. with one-hot input, which is then subject to noise etc. That said, for debugging purposes it is of course possible to readout the conductances exactly. For instance, layer.get_weight(apply_weights_scaling=False) gets the part of the weights that are in (normalized) conductances (note that there are possibly digital output scales part of the overall weight) in perfect manner (without any readout noise). However, in case of layer.get_weight(apply_weights_scaling=False, realistic=True) multiple MVMs are performed to read out the weights in a realistic manner (without direct access to individual weights). Similarly, e.g. drift compensation is performed by reading out the weights in a realistic manner (without direct access).

Hope that answers your question.

[HeatPhoenix]

Answers the question perfectly. Thank you.