diff --git a/ihp-sg13g2/libs.tech/openroad/export.yml b/ihp-sg13g2/libs.tech/openroad/export.yml
new file mode 100644
index 00000000..e8faa388
--- /dev/null
+++ b/ihp-sg13g2/libs.tech/openroad/export.yml
@@ -0,0 +1,185 @@
+api_version: 1
+files:
+- destination: gds
+  file: libs.ref/sg13g2_io/gds/sg13g2_io.gds
+  md5_checksum: d3f637705a11f8867dd8efd33cffc75a
+- destination: lef
+  file: libs.ref/sg13g2_io/lef/sg13g2_io.lef
+  md5_checksum: ed10c467851cfafa782083ac2995c2b2
+- destination: lib
+  file: libs.ref/sg13g2_io/lib/sg13g2_io_fast_1p32V_3p6V_m40C.lib
+  md5_checksum: d33bf32629b318182ba839d01812c928
+- destination: lib
+  file: libs.ref/sg13g2_io/lib/sg13g2_io_fast_1p65V_3p6V_m40C.lib
+  md5_checksum: 2757767d3b38b1574ed58315099a7a51
+- destination: lib
+  file: libs.ref/sg13g2_io/lib/sg13g2_io_slow_1p08V_3p0V_125C.lib
+  md5_checksum: 9aeaf0430eaa78a72646b1169fc0e7c8
+- destination: lib
+  file: libs.ref/sg13g2_io/lib/sg13g2_io_slow_1p35V_3p0V_125C.lib
+  md5_checksum: c661932b2343976c546862e5a9ead4af
+- destination: lib
+  file: libs.ref/sg13g2_io/lib/sg13g2_io_typ_1p2V_3p3V_25C.lib
+  md5_checksum: ff531e10c049a6b54c6e8c66ce24e856
+- destination: lib
+  file: libs.ref/sg13g2_io/lib/sg13g2_io_typ_1p5V_3p3V_25C.lib
+  md5_checksum: bf5ab286801c0050600c45de11149ce1
+- destination: cdl
+  file: libs.ref/sg13g2_sram/cdl/RM_IHPSG13_1P_1024x64_c2_bm_bist.cdl
+  md5_checksum: 338dd23542b6e53e7ba9a9d8e9673e72
+- destination: cdl
+  file: libs.ref/sg13g2_sram/cdl/RM_IHPSG13_1P_2048x64_c2_bm_bist.cdl
+  md5_checksum: 050bf8592a103d47d967dfdbbeba8aae
+- destination: cdl
+  file: libs.ref/sg13g2_sram/cdl/RM_IHPSG13_1P_256x48_c2_bm_bist.cdl
+  md5_checksum: 88428837e4d25ce4534291338970a2d6
+- destination: cdl
+  file: libs.ref/sg13g2_sram/cdl/RM_IHPSG13_1P_256x64_c2_bm_bist.cdl
+  md5_checksum: 6b52bee671c5c927ad372fb0758fcd63
+- destination: cdl
+  file: libs.ref/sg13g2_sram/cdl/RM_IHPSG13_1P_512x64_c2_bm_bist.cdl
+  md5_checksum: da4852c4e197e62e908563d8b49158c2
+- destination: cdl
+  file: libs.ref/sg13g2_sram/cdl/RM_IHPSG13_1P_64x64_c2_bm_bist.cdl
+  md5_checksum: bcc73e6feff4527ddb45b060a78481a2
+- destination: gds
+  file: libs.ref/sg13g2_sram/gds/RM_IHPSG13_1P_1024x64_c2_bm_bist.gds
+  md5_checksum: 46355b44562381993327e23da900f47e
+- destination: gds
+  file: libs.ref/sg13g2_sram/gds/RM_IHPSG13_1P_2048x64_c2_bm_bist.gds
+  md5_checksum: 63c8bcfa2d0de0e573b32d42bb8009ca
+- destination: gds
+  file: libs.ref/sg13g2_sram/gds/RM_IHPSG13_1P_256x48_c2_bm_bist.gds
+  md5_checksum: 856d3bbe26f1b3c1971feedb88c49aa4
+- destination: gds
+  file: libs.ref/sg13g2_sram/gds/RM_IHPSG13_1P_256x64_c2_bm_bist.gds
+  md5_checksum: e83026cf6bc931345e4cb84a2aa1e881
+- destination: gds
+  file: libs.ref/sg13g2_sram/gds/RM_IHPSG13_1P_512x64_c2_bm_bist.gds
+  md5_checksum: eae1de98642eb9c957f57d0085ec30f8
+- destination: gds
+  file: libs.ref/sg13g2_sram/gds/RM_IHPSG13_1P_64x64_c2_bm_bist.gds
+  md5_checksum: e3c8adb6feaf16da8ec3366816700295
+- destination: lef
+  file: libs.ref/sg13g2_sram/lef/RM_IHPSG13_1P_1024x64_c2_bm_bist.lef
+  md5_checksum: b5eeea4f9b161ab9cddf927388b54641
+- destination: lef
+  file: libs.ref/sg13g2_sram/lef/RM_IHPSG13_1P_2048x64_c2_bm_bist.lef
+  md5_checksum: 726faa2227b73d2d18631595ad87eaf4
+- destination: lef
+  file: libs.ref/sg13g2_sram/lef/RM_IHPSG13_1P_256x48_c2_bm_bist.lef
+  md5_checksum: 1820525a686524820aa8e0b3da58ff3d
+- destination: lef
+  file: libs.ref/sg13g2_sram/lef/RM_IHPSG13_1P_256x64_c2_bm_bist.lef
+  md5_checksum: 8b7351d7b09831812f580d7904359941
+- destination: lef
+  file: libs.ref/sg13g2_sram/lef/RM_IHPSG13_1P_512x64_c2_bm_bist.lef
+  md5_checksum: cdffd3b2f621106969b116c989a681d6
+- destination: lef
+  file: libs.ref/sg13g2_sram/lef/RM_IHPSG13_1P_64x64_c2_bm_bist.lef
+  md5_checksum: 41c6b9d75e6729cbcc9ca0993907593b
+- destination: lib
+  file: libs.ref/sg13g2_sram/lib/RM_IHPSG13_1P_1024x64_c2_bm_bist_fast_1p32V_m55C.lib
+  md5_checksum: 11914c0cf2d1bcb571887535d8dedde9
+- destination: lib
+  file: libs.ref/sg13g2_sram/lib/RM_IHPSG13_1P_2048x64_c2_bm_bist_fast_1p32V_m55C.lib
+  md5_checksum: 6501fc59e7b0f276725993274311625d
+- destination: lib
+  file: libs.ref/sg13g2_sram/lib/RM_IHPSG13_1P_256x48_c2_bm_bist_fast_1p32V_m55C.lib
+  md5_checksum: 1b51cf5003df7db5c2a99770f66ea585
+- destination: lib
+  file: libs.ref/sg13g2_sram/lib/RM_IHPSG13_1P_256x64_c2_bm_bist_fast_1p32V_m55C.lib
+  md5_checksum: c3718f582f83a221f13e50dbc9b31d51
+- destination: lib
+  file: libs.ref/sg13g2_sram/lib/RM_IHPSG13_1P_512x64_c2_bm_bist_fast_1p32V_m55C.lib
+  md5_checksum: 506a0eea332a25bc160d8399c92b1583
+- destination: lib
+  file: libs.ref/sg13g2_sram/lib/RM_IHPSG13_1P_64x64_c2_bm_bist_fast_1p32V_m55C.lib
+  md5_checksum: d53cccfb9ec4e4e92ce5f625ae5ee6ac
+- destination: lib
+  file: libs.ref/sg13g2_sram/lib/RM_IHPSG13_1P_1024x64_c2_bm_bist_slow_1p08V_125C.lib
+  md5_checksum: 6a3675d194c090944cd639183099eca5
+- destination: lib
+  file: libs.ref/sg13g2_sram/lib/RM_IHPSG13_1P_2048x64_c2_bm_bist_slow_1p08V_125C.lib
+  md5_checksum: d33b35a0461e1ab2a15e1b481f7e412c
+- destination: lib
+  file: libs.ref/sg13g2_sram/lib/RM_IHPSG13_1P_256x48_c2_bm_bist_slow_1p08V_125C.lib
+  md5_checksum: 6e006955a7938aa6a1a466358f41698f
+- destination: lib
+  file: libs.ref/sg13g2_sram/lib/RM_IHPSG13_1P_256x64_c2_bm_bist_slow_1p08V_125C.lib
+  md5_checksum: eb37c9e6dbb15120d716ea91bfc73b98
+- destination: lib
+  file: libs.ref/sg13g2_sram/lib/RM_IHPSG13_1P_512x64_c2_bm_bist_slow_1p08V_125C.lib
+  md5_checksum: 3e6cd428071e9a8ba0ef3702a3b43073
+- destination: lib
+  file: libs.ref/sg13g2_sram/lib/RM_IHPSG13_1P_64x64_c2_bm_bist_slow_1p08V_125C.lib
+  md5_checksum: 4de52cf48080bbd6d34be880b7459024
+- destination: lib
+  file: libs.ref/sg13g2_sram/lib/RM_IHPSG13_1P_1024x64_c2_bm_bist_typ_1p20V_25C.lib
+  md5_checksum: 55130ff47badae41205f96e3d28bda77
+- destination: lib
+  file: libs.ref/sg13g2_sram/lib/RM_IHPSG13_1P_2048x64_c2_bm_bist_typ_1p20V_25C.lib
+  md5_checksum: a18464f7338a57b31435e13ade8bef54
+- destination: lib
+  file: libs.ref/sg13g2_sram/lib/RM_IHPSG13_1P_256x48_c2_bm_bist_typ_1p20V_25C.lib
+  md5_checksum: 09097b53d7821ca528e781b7935d39ee
+- destination: lib
+  file: libs.ref/sg13g2_sram/lib/RM_IHPSG13_1P_256x64_c2_bm_bist_typ_1p20V_25C.lib
+  md5_checksum: 73e06676d2dbe2ab30c6b3fa01aebd8d
+- destination: lib
+  file: libs.ref/sg13g2_sram/lib/RM_IHPSG13_1P_512x64_c2_bm_bist_typ_1p20V_25C.lib
+  md5_checksum: b55b9a6b1dfdd67566737f4263f746a6
+- destination: lib
+  file: libs.ref/sg13g2_sram/lib/RM_IHPSG13_1P_64x64_c2_bm_bist_typ_1p20V_25C.lib
+  md5_checksum: 8a0deb90e1650b5169aece2f8bb2afb2
+- destination: verilog
+  file: libs.ref/sg13g2_sram/verilog/RM_IHPSG13_1P_1024x64_c2_bm_bist.v
+  md5_checksum: 3a509b1fd008d8530f6b0d2204a440be
+- destination: verilog
+  file: libs.ref/sg13g2_sram/verilog/RM_IHPSG13_1P_2048x64_c2_bm_bist.v
+  md5_checksum: 657032947eab23e5c10c31ce40bf9567
+- destination: verilog
+  file: libs.ref/sg13g2_sram/verilog/RM_IHPSG13_1P_256x48_c2_bm_bist.v
+  md5_checksum: 09b9291177d2615f3976f4547f031c57
+- destination: verilog
+  file: libs.ref/sg13g2_sram/verilog/RM_IHPSG13_1P_256x64_c2_bm_bist.v
+  md5_checksum: c9687bf3b168b66b312e2243f18e2fa0
+- destination: verilog
+  file: libs.ref/sg13g2_sram/verilog/RM_IHPSG13_1P_512x64_c2_bm_bist.v
+  md5_checksum: dfeb04488490ced44392d352a28c0878
+- destination: verilog
+  file: libs.ref/sg13g2_sram/verilog/RM_IHPSG13_1P_64x64_c2_bm_bist.v
+  md5_checksum: a344cb9c0383b290c176fb7468ec6846
+- destination: cdl
+  file: libs.ref/sg13g2_stdcell/cdl/sg13g2_stdcell.cdl
+  md5_checksum: 61b724dfbe1361dc9b5e5228150b3deb
+- destination: gds
+  file: libs.ref/sg13g2_stdcell/gds/sg13g2_stdcell.gds
+  md5_checksum: 06d608855a43b4de58896154b93e0890
+- destination: lef
+  file: libs.ref/sg13g2_stdcell/lef/sg13g2_stdcell.lef
+  md5_checksum: 6ed9d2c4611957a1fb5df35575a7ce60
+- destination: lef
+  file: libs.ref/sg13g2_stdcell/lef/sg13g2_tech.lef
+  md5_checksum: 34bdf16eb90c556c2449119bf767b6bc
+- destination: lib
+  file: libs.ref/sg13g2_stdcell/lib/sg13g2_stdcell_fast_1p32V_m40C.lib
+  md5_checksum: a5de1e08ccb148efb087dce7b0076646
+- destination: lib
+  file: libs.ref/sg13g2_stdcell/lib/sg13g2_stdcell_fast_1p65V_m40C.lib
+  md5_checksum: 1c7594e80a00c56fcac6b59764c31561
+- destination: lib
+  file: libs.ref/sg13g2_stdcell/lib/sg13g2_stdcell_slow_1p08V_125C.lib
+  md5_checksum: 840af240045a287d18691cc857bb6182
+- destination: lib
+  file: libs.ref/sg13g2_stdcell/lib/sg13g2_stdcell_slow_1p35V_125C.lib
+  md5_checksum: d02120bda32f33ebd5a58679aaf4cf06
+- destination: lib
+  file: libs.ref/sg13g2_stdcell/lib/sg13g2_stdcell_typ_1p20V_25C.lib
+  md5_checksum: 8f5182c483de30937ea2cf67d124cdbe
+- destination: lib
+  file: libs.ref/sg13g2_stdcell/lib/sg13g2_stdcell_typ_1p50V_25C.lib
+  md5_checksum: fb6845ac3d9f4c65fa082b18bc9d4f00
+- destination: verilog
+  file: libs.ref/sg13g2_stdcell/verilog/sg13g2_stdcell.v
+  md5_checksum: 0109466e4ea00d33e4e01cf3f68f1b47
diff --git a/ihp-sg13g2/libs.tech/openroad/generate.py b/ihp-sg13g2/libs.tech/openroad/generate.py
new file mode 100644
index 00000000..5b93e059
--- /dev/null
+++ b/ihp-sg13g2/libs.tech/openroad/generate.py
@@ -0,0 +1,166 @@
+"""Generates the export.yml file which can be used OpenROAD-flow-scripts to update
+IHP PDK files there."""
+import pathlib
+import hashlib
+import yaml
+
+API_VERSION = 1
+PDK_ROOT = pathlib.Path(__file__).parent.parent.parent.resolve()
+
+SG13G2_IO = [
+    {
+        "destination": "gds",
+        "files": [
+            "gds/sg13g2_io.gds",
+        ]
+    },
+    {
+        "destination": "lef",
+        "files": [
+            "lef/sg13g2_io.lef",
+        ]
+    },
+    {
+        "destination": "lib",
+        "files": [
+            "lib/sg13g2_io_fast_1p32V_3p6V_m40C.lib",
+            "lib/sg13g2_io_fast_1p65V_3p6V_m40C.lib",
+            "lib/sg13g2_io_slow_1p08V_3p0V_125C.lib",
+            "lib/sg13g2_io_slow_1p35V_3p0V_125C.lib",
+            "lib/sg13g2_io_typ_1p2V_3p3V_25C.lib",
+            "lib/sg13g2_io_typ_1p5V_3p3V_25C.lib",
+        ]
+    },
+]
+
+SG13G2_SRAMS = [
+    "1P_1024x64_c2",
+    "1P_2048x64_c2",
+    "1P_256x48_c2",
+    "1P_256x64_c2",
+    "1P_512x64_c2",
+    "1P_64x64_c2",
+]
+
+SG13G2_SRAM = [
+    {
+        "destination": "cdl",
+        "file_formats": [
+            "cdl/RM_IHPSG13_{}_bm_bist.cdl",
+        ]
+    },
+    {
+        "destination": "gds",
+        "file_formats": [
+            "gds/RM_IHPSG13_{}_bm_bist.gds",
+        ]
+    },
+    {
+        "destination": "lef",
+        "file_formats": [
+            "lef/RM_IHPSG13_{}_bm_bist.lef",
+        ]
+    },
+    {
+        "destination": "lib",
+        "file_formats": [
+            "lib/RM_IHPSG13_{}_bm_bist_fast_1p32V_m55C.lib",
+            "lib/RM_IHPSG13_{}_bm_bist_slow_1p08V_125C.lib",
+            "lib/RM_IHPSG13_{}_bm_bist_typ_1p20V_25C.lib",
+        ]
+    },
+    {
+        "destination": "verilog",
+        "file_formats": [
+            "verilog/RM_IHPSG13_{}_bm_bist.v",
+        ]
+    },
+]
+
+SG13G2_STDCELL = [
+    {
+        "destination": "cdl",
+        "files": [
+            "cdl/sg13g2_stdcell.cdl",
+        ]
+    },
+    {
+        "destination": "gds",
+        "files": [
+            "gds/sg13g2_stdcell.gds",
+        ]
+    },
+    {
+        "destination": "lef",
+        "files": [
+            "lef/sg13g2_stdcell.lef",
+            "lef/sg13g2_tech.lef",
+        ]
+    },
+    {
+        "destination": "lib",
+        "files": [
+            "lib/sg13g2_stdcell_fast_1p32V_m40C.lib",
+            "lib/sg13g2_stdcell_fast_1p65V_m40C.lib",
+            "lib/sg13g2_stdcell_slow_1p08V_125C.lib",
+            "lib/sg13g2_stdcell_slow_1p35V_125C.lib",
+            "lib/sg13g2_stdcell_typ_1p20V_25C.lib",
+            "lib/sg13g2_stdcell_typ_1p50V_25C.lib",
+        ]
+    },
+    {
+        "destination": "verilog",
+        "files": [
+            "verilog/sg13g2_stdcell.v",
+        ]
+    },
+]
+
+
+def write_file(content):
+    """Saves the list of exportable files to the 'export.yml' file."""
+    filename = PDK_ROOT / "libs.tech" / "openroad" / "export.yml"
+    with open(filename, 'w', encoding="utf-8") as outfile:
+        yaml.dump(content, outfile, default_flow_style=False)
+
+
+def calc_file_md5(file):
+    """Calculates a MD5 checksum of a file."""
+    with open(file, 'rb') as file_content:
+        return hashlib.md5(file_content.read()).hexdigest()
+
+
+def get_entry(file, destination, cell_lib):
+    """Creates an entry for a specific file."""
+    entry = {
+        "file": str(pathlib.Path("libs.ref") / cell_lib / file),
+        "md5_checksum": calc_file_md5(PDK_ROOT / "libs.ref" / cell_lib / file),
+        "destination": destination,
+    }
+    return entry
+
+
+def main(): # pylint: disable=missing-function-docstring
+    content = {
+        "api_version": API_VERSION,
+        "files": [],
+    }
+    for entry in SG13G2_IO:
+        for file in entry.get('files', []):
+            content['files'].append(get_entry(file, entry['destination'], "sg13g2_io"))
+    for entry in SG13G2_SRAM:
+        for file in entry.get('files', []):
+            content['files'].append(get_entry(file, entry['destination'], "sg13g2_sram"))
+        for file_format in entry.get('file_formats', []):
+            for sram in SG13G2_SRAMS:
+                file = file_format.format(sram)
+                content['files'].append(get_entry(file, entry['destination'], "sg13g2_sram"))
+    for entry in SG13G2_STDCELL:
+        for file in entry.get('files', []):
+            content['files'].append(get_entry(file, entry['destination'], "sg13g2_stdcell"))
+
+    write_file(content)
+
+
+if __name__ == "__main__":
+    main()