Actual state of corner / statistical / mismatch models for lv_Xmos and hv_Xmos

[dwarning]

The attached documents show the actual status of corner and statistical models for lv and hv mos library and the proposed mismatch models wrt. PR #269.

For each of this four devices four different geometries are selected, which should cover the practical usage range of these devices. On the left side the corner behavior is shown and direct opposite on right side the results of 60 MC runs under same bias conditions. For the statistical parameters one standard deviations is assumed.

In bottom of the page two graphs showing the curves for mismatch simulations of transfer and output characteristic. These data are preliminary and must be approved.

All simulations are made with ngspice version 43 and the IHP provided psp103_nqs Verilog-A model. Temperature 27°C, bias conditions are shown in the graphs.

sg13_lv_mos_varianz.pdf
sg13_hv_mos_varianz.pdf