diff --git a/test/extensions/EXT/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_double.ll b/test/extensions/EXT/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_double.ll
index 02c19941a9..4cc4b95ec3 100644
--- a/test/extensions/EXT/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_double.ll
+++ b/test/extensions/EXT/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_double.ll
@@ -20,9 +20,9 @@ target triple = "spir64"
 ; Function Attrs: nounwind
 define dso_local spir_func void @test_atomicrmw_fadd() local_unnamed_addr #0 {
 entry:
- %0 = atomicrmw fmin double addrspace(1)* @f, double 42.000000e+00 seq_cst
+ %0 = atomicrmw fmin ptr addrspace(1) @f, double 42.000000e+00 seq_cst
 ; CHECK: AtomicFMinEXT [[Double]] {{[0-9]+}} [[DoublePointer]] [[Scope_Device]] [[MemSem_SequentiallyConsistent]] [[DoubleValue]]
- %1 = atomicrmw fmax double addrspace(1)* @f, double 42.000000e+00 seq_cst
+ %1 = atomicrmw fmax ptr addrspace(1) @f, double 42.000000e+00 seq_cst
 ; CHECK: AtomicFMaxEXT [[Double]] {{[0-9]+}} [[DoublePointer]] [[Scope_Device]] [[MemSem_SequentiallyConsistent]] [[DoubleValue]]
 
   ret void
diff --git a/test/extensions/EXT/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_float.ll b/test/extensions/EXT/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_float.ll
index 3422253c03..de839a5c2b 100644
--- a/test/extensions/EXT/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_float.ll
+++ b/test/extensions/EXT/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_float.ll
@@ -20,9 +20,9 @@ target triple = "spir64"
 ; Function Attrs: nounwind
 define dso_local spir_func void @test_atomicrmw_fadd() local_unnamed_addr #0 {
 entry:
- %0 = atomicrmw fmin float addrspace(1)* @f, float 42.000000e+00 seq_cst
+ %0 = atomicrmw fmin ptr addrspace(1) @f, float 42.000000e+00 seq_cst
 ; CHECK: AtomicFMinEXT [[Float]] {{[0-9]+}} [[FPPointer]] [[Scope_Device]] [[MemSem_SequentiallyConsistent]] [[FPValue]]
- %1 = atomicrmw fmax float addrspace(1)* @f, float 42.000000e+00 seq_cst
+ %1 = atomicrmw fmax ptr addrspace(1) @f, float 42.000000e+00 seq_cst
 ; CHECK: AtomicFMaxEXT [[Float]] {{[0-9]+}} [[FPPointer]] [[Scope_Device]] [[MemSem_SequentiallyConsistent]] [[FPValue]]
 
   ret void
diff --git a/test/extensions/EXT/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_half.ll b/test/extensions/EXT/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_half.ll
index c653dc2027..2c1960c11b 100644
--- a/test/extensions/EXT/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_half.ll
+++ b/test/extensions/EXT/SPV_EXT_shader_atomic_float_min_max/atomicrmw_fminfmax_half.ll
@@ -20,9 +20,9 @@ target triple = "spir64"
 ; Function Attrs: nounwind
 define dso_local spir_func void @test_atomicrmw_fadd() local_unnamed_addr #0 {
 entry:
- %0 = atomicrmw fmin half addrspace(1)* @f, half 42.000000e+00 seq_cst
+ %0 = atomicrmw fmin ptr addrspace(1) @f, half 42.000000e+00 seq_cst
 ; CHECK: AtomicFMinEXT [[Half]] {{[0-9]+}} [[HalfPointer]] [[Scope_Device]] [[MemSem_SequentiallyConsistent]] [[HalfValue]]
- %1 = atomicrmw fmax half addrspace(1)* @f, half 42.000000e+00 seq_cst
+ %1 = atomicrmw fmax ptr addrspace(1) @f, half 42.000000e+00 seq_cst
 ; CHECK: AtomicFMaxEXT [[Half]] {{[0-9]+}} [[HalfPointer]] [[Scope_Device]] [[MemSem_SequentiallyConsistent]] [[HalfValue]]
 
   ret void
diff --git a/test/extensions/INTEL/SPV_INTEL_arbitrary_precision_fixed_point/capability-arbitrary-precision-fixed-point-numbers.ll b/test/extensions/INTEL/SPV_INTEL_arbitrary_precision_fixed_point/capability-arbitrary-precision-fixed-point-numbers.ll
index e151e558f5..8e4c2512a3 100644
--- a/test/extensions/INTEL/SPV_INTEL_arbitrary_precision_fixed_point/capability-arbitrary-precision-fixed-point-numbers.ll
+++ b/test/extensions/INTEL/SPV_INTEL_arbitrary_precision_fixed_point/capability-arbitrary-precision-fixed-point-numbers.ll
@@ -227,23 +227,21 @@ $_Z3expILi68ELi68ELb0ELi20ELi20EEvv = comdat any
 define dso_local spir_kernel void @_ZTSZ4mainE15kernel_function() #0 !kernel_arg_addr_space !4 !kernel_arg_access_qual !4 !kernel_arg_type !4 !kernel_arg_base_type !4 !kernel_arg_type_qual !4 {
 entry:
   %0 = alloca %"class._ZTSZ4mainE3$_0.anon", align 1
-  %1 = bitcast %"class._ZTSZ4mainE3$_0.anon"* %0 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %1) #5
-  %2 = addrspacecast %"class._ZTSZ4mainE3$_0.anon"* %0 to %"class._ZTSZ4mainE3$_0.anon" addrspace(4)*
-  call spir_func void @"_ZZ4mainENK3$_0clEv"(%"class._ZTSZ4mainE3$_0.anon" addrspace(4)* %2)
-  %3 = bitcast %"class._ZTSZ4mainE3$_0.anon"* %0 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %3) #5
+  call void @llvm.lifetime.start.p0(i64 1, ptr %0) #5
+  %1 = addrspacecast ptr %0 to ptr addrspace(4)
+  call spir_func void @"_ZZ4mainENK3$_0clEv"(ptr addrspace(4) %1)
+  call void @llvm.lifetime.end.p0(i64 1, ptr %0) #5
   ret void
 }
 
 ; Function Attrs: argmemonly nounwind willreturn
-declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #1
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
 
 ; Function Attrs: inlinehint norecurse
-define internal spir_func void @"_ZZ4mainENK3$_0clEv"(%"class._ZTSZ4mainE3$_0.anon" addrspace(4)* %this) #2 align 2 {
+define internal spir_func void @"_ZZ4mainENK3$_0clEv"(ptr addrspace(4) %this) #2 align 2 {
 entry:
-  %this.addr = alloca %"class._ZTSZ4mainE3$_0.anon" addrspace(4)*, align 8
-  store %"class._ZTSZ4mainE3$_0.anon" addrspace(4)* %this, %"class._ZTSZ4mainE3$_0.anon" addrspace(4)** %this.addr, align 8, !tbaa !5
+  %this.addr = alloca ptr addrspace(4), align 8
+  store ptr addrspace(4) %this, ptr %this.addr, align 8, !tbaa !5
   call spir_func void @_Z4sqrtILi13ELi5ELb0ELi2ELi2EEvv()
   call spir_func void @_Z5recipILi3ELi8ELb1ELi4ELi4EEvv()
   call spir_func void @_Z5rsqrtILi11ELi10ELb0ELi8ELi6EEvv()
@@ -261,7 +259,7 @@ entry:
 }
 
 ; Function Attrs: argmemonly nounwind willreturn
-declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #1
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
 
 ; Function Attrs: norecurse nounwind
 define linkonce_odr dso_local spir_func void @_Z4sqrtILi13ELi5ELb0ELi2ELi2EEvv() #3 comdat {
@@ -272,39 +270,27 @@ entry:
   %ap_fixed_Sqrt_b = alloca i13, align 2
   %c = alloca i5, align 1
   %ap_fixed_Sqrt_c = alloca i13, align 2
-  %0 = bitcast i13* %a to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %0) #5
-  %1 = bitcast i5* %ap_fixed_Sqrt to i8*
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %1) #5
-  %2 = load i13, i13* %a, align 2, !tbaa !9
-  %call = call spir_func signext i5 @_Z22__spirv_FixedSqrtINTELILi13ELi5EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEibiiii(i13 signext %2, i1 zeroext false, i32 2, i32 2, i32 0, i32 0) #5
-  store i5 %call, i5* %ap_fixed_Sqrt, align 1, !tbaa !11
-  %3 = bitcast i5* %b to i8*
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %3) #5
-  %4 = bitcast i13* %ap_fixed_Sqrt_b to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %4) #5
-  %5 = load i5, i5* %b, align 1, !tbaa !11
-  %call1 = call spir_func signext i13 @_Z22__spirv_FixedSqrtINTELILi5ELi13EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEibiiii(i5 signext %5, i1 zeroext false, i32 2, i32 2, i32 0, i32 0) #5
-  store i13 %call1, i13* %ap_fixed_Sqrt_b, align 2, !tbaa !9
-  %6 = bitcast i5* %c to i8*
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %6) #5
-  %7 = bitcast i13* %ap_fixed_Sqrt_c to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %7) #5
-  %8 = load i5, i5* %c, align 1, !tbaa !11
-  %call2 = call spir_func signext i13 @_Z22__spirv_FixedSqrtINTELILi5ELi13EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEibiiii(i5 signext %8, i1 zeroext false, i32 2, i32 2, i32 0, i32 0) #5
-  store i13 %call2, i13* %ap_fixed_Sqrt_c, align 2, !tbaa !9
-  %9 = bitcast i13* %ap_fixed_Sqrt_c to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %9) #5
-  %10 = bitcast i5* %c to i8*
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %10) #5
-  %11 = bitcast i13* %ap_fixed_Sqrt_b to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %11) #5
-  %12 = bitcast i5* %b to i8*
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %12) #5
-  %13 = bitcast i5* %ap_fixed_Sqrt to i8*
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %13) #5
-  %14 = bitcast i13* %a to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %14) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %a) #5
+  call void @llvm.lifetime.start.p0(i64 1, ptr %ap_fixed_Sqrt) #5
+  %0 = load i13, ptr %a, align 2, !tbaa !9
+  %call = call spir_func signext i5 @_Z22__spirv_FixedSqrtINTELILi13ELi5EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEibiiii(i13 signext %0, i1 zeroext false, i32 2, i32 2, i32 0, i32 0) #5
+  store i5 %call, ptr %ap_fixed_Sqrt, align 1, !tbaa !11
+  call void @llvm.lifetime.start.p0(i64 1, ptr %b) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %ap_fixed_Sqrt_b) #5
+  %1 = load i5, ptr %b, align 1, !tbaa !11
+  %call1 = call spir_func signext i13 @_Z22__spirv_FixedSqrtINTELILi5ELi13EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEibiiii(i5 signext %1, i1 zeroext false, i32 2, i32 2, i32 0, i32 0) #5
+  store i13 %call1, ptr %ap_fixed_Sqrt_b, align 2, !tbaa !9
+  call void @llvm.lifetime.start.p0(i64 1, ptr %c) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %ap_fixed_Sqrt_c) #5
+  %2 = load i5, ptr %c, align 1, !tbaa !11
+  %call2 = call spir_func signext i13 @_Z22__spirv_FixedSqrtINTELILi5ELi13EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEibiiii(i5 signext %2, i1 zeroext false, i32 2, i32 2, i32 0, i32 0) #5
+  store i13 %call2, ptr %ap_fixed_Sqrt_c, align 2, !tbaa !9
+  call void @llvm.lifetime.end.p0(i64 2, ptr %ap_fixed_Sqrt_c) #5
+  call void @llvm.lifetime.end.p0(i64 1, ptr %c) #5
+  call void @llvm.lifetime.end.p0(i64 2, ptr %ap_fixed_Sqrt_b) #5
+  call void @llvm.lifetime.end.p0(i64 1, ptr %b) #5
+  call void @llvm.lifetime.end.p0(i64 1, ptr %ap_fixed_Sqrt) #5
+  call void @llvm.lifetime.end.p0(i64 2, ptr %a) #5
   ret void
 }
 
@@ -313,15 +299,13 @@ define linkonce_odr dso_local spir_func void @_Z5recipILi3ELi8ELb1ELi4ELi4EEvv()
 entry:
   %a = alloca i3, align 1
   %ap_fixed_Recip = alloca i8, align 1
-  %0 = bitcast i3* %a to i8*
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %0) #5
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %ap_fixed_Recip) #5
-  %1 = load i3, i3* %a, align 1, !tbaa !13
-  %call = call spir_func signext i8 @_Z23__spirv_FixedRecipINTELILi3ELi8EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEibiiii(i3 signext %1, i1 zeroext true, i32 4, i32 4, i32 0, i32 0) #5
-  store i8 %call, i8* %ap_fixed_Recip, align 1, !tbaa !15
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %ap_fixed_Recip) #5
-  %2 = bitcast i3* %a to i8*
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %2) #5
+  call void @llvm.lifetime.start.p0(i64 1, ptr %a) #5
+  call void @llvm.lifetime.start.p0(i64 1, ptr %ap_fixed_Recip) #5
+  %0 = load i3, ptr %a, align 1, !tbaa !13
+  %call = call spir_func signext i8 @_Z23__spirv_FixedRecipINTELILi3ELi8EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEibiiii(i3 signext %0, i1 zeroext true, i32 4, i32 4, i32 0, i32 0) #5
+  store i8 %call, ptr %ap_fixed_Recip, align 1, !tbaa !15
+  call void @llvm.lifetime.end.p0(i64 1, ptr %ap_fixed_Recip) #5
+  call void @llvm.lifetime.end.p0(i64 1, ptr %a) #5
   ret void
 }
 
@@ -330,17 +314,13 @@ define linkonce_odr dso_local spir_func void @_Z5rsqrtILi11ELi10ELb0ELi8ELi6EEvv
 entry:
   %a = alloca i11, align 2
   %ap_fixed_Rsqrt = alloca i10, align 2
-  %0 = bitcast i11* %a to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %0) #5
-  %1 = bitcast i10* %ap_fixed_Rsqrt to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %1) #5
-  %2 = load i11, i11* %a, align 2, !tbaa !17
-  %call = call spir_func signext i10 @_Z23__spirv_FixedRsqrtINTELILi11ELi10EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEibiiii(i11 signext %2, i1 zeroext false, i32 8, i32 6, i32 0, i32 0) #5
-  store i10 %call, i10* %ap_fixed_Rsqrt, align 2, !tbaa !19
-  %3 = bitcast i10* %ap_fixed_Rsqrt to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %3) #5
-  %4 = bitcast i11* %a to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %4) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %a) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %ap_fixed_Rsqrt) #5
+  %0 = load i11, ptr %a, align 2, !tbaa !17
+  %call = call spir_func signext i10 @_Z23__spirv_FixedRsqrtINTELILi11ELi10EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEibiiii(i11 signext %0, i1 zeroext false, i32 8, i32 6, i32 0, i32 0) #5
+  store i10 %call, ptr %ap_fixed_Rsqrt, align 2, !tbaa !19
+  call void @llvm.lifetime.end.p0(i64 2, ptr %ap_fixed_Rsqrt) #5
+  call void @llvm.lifetime.end.p0(i64 2, ptr %a) #5
   ret void
 }
 
@@ -349,17 +329,13 @@ define linkonce_odr dso_local spir_func void @_Z3sinILi17ELi11ELb1ELi7ELi5EEvv()
 entry:
   %a = alloca i17, align 4
   %ap_fixed_Sin = alloca i11, align 2
-  %0 = bitcast i17* %a to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #5
-  %1 = bitcast i11* %ap_fixed_Sin to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %1) #5
-  %2 = load i17, i17* %a, align 4, !tbaa !21
-  %call = call spir_func signext i11 @_Z21__spirv_FixedSinINTELILi17ELi11EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEibiiii(i17 signext %2, i1 zeroext true, i32 7, i32 5, i32 0, i32 0) #5
-  store i11 %call, i11* %ap_fixed_Sin, align 2, !tbaa !17
-  %3 = bitcast i11* %ap_fixed_Sin to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %3) #5
-  %4 = bitcast i17* %a to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %4) #5
+  call void @llvm.lifetime.start.p0(i64 4, ptr %a) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %ap_fixed_Sin) #5
+  %0 = load i17, ptr %a, align 4, !tbaa !21
+  %call = call spir_func signext i11 @_Z21__spirv_FixedSinINTELILi17ELi11EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEibiiii(i17 signext %0, i1 zeroext true, i32 7, i32 5, i32 0, i32 0) #5
+  store i11 %call, ptr %ap_fixed_Sin, align 2, !tbaa !17
+  call void @llvm.lifetime.end.p0(i64 2, ptr %ap_fixed_Sin) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %a) #5
   ret void
 }
 
@@ -368,17 +344,13 @@ define linkonce_odr dso_local spir_func void @_Z3cosILi35ELi28ELb0ELi9ELi3EEvv()
 entry:
   %a = alloca i35, align 8
   %ap_fixed_Cos = alloca i28, align 4
-  %0 = bitcast i35* %a to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %0) #5
-  %1 = bitcast i28* %ap_fixed_Cos to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %1) #5
-  %2 = load i35, i35* %a, align 8, !tbaa !23
-  %call = call spir_func signext i28 @_Z21__spirv_FixedCosINTELILi35ELi28EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEibiiii(i35 %2, i1 zeroext false, i32 9, i32 3, i32 0, i32 0) #5
-  store i28 %call, i28* %ap_fixed_Cos, align 4, !tbaa !25
-  %3 = bitcast i28* %ap_fixed_Cos to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %3) #5
-  %4 = bitcast i35* %a to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %4) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %a) #5
+  call void @llvm.lifetime.start.p0(i64 4, ptr %ap_fixed_Cos) #5
+  %0 = load i35, ptr %a, align 8, !tbaa !23
+  %call = call spir_func signext i28 @_Z21__spirv_FixedCosINTELILi35ELi28EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEibiiii(i35 %0, i1 zeroext false, i32 9, i32 3, i32 0, i32 0) #5
+  store i28 %call, ptr %ap_fixed_Cos, align 4, !tbaa !25
+  call void @llvm.lifetime.end.p0(i64 4, ptr %ap_fixed_Cos) #5
+  call void @llvm.lifetime.end.p0(i64 8, ptr %a) #5
   ret void
 }
 
@@ -387,17 +359,13 @@ define linkonce_odr dso_local spir_func void @_Z7sin_cosILi31ELi20ELb1ELi10ELi12
 entry:
   %a = alloca i31, align 4
   %ap_fixed_SinCos = alloca i40, align 8
-  %0 = bitcast i31* %a to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #5
-  %1 = bitcast i40* %ap_fixed_SinCos to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %1) #5
-  %2 = load i31, i31* %a, align 4, !tbaa !27
-  %call = call spir_func i40 @_Z24__spirv_FixedSinCosINTELILi31ELi20EEU7_ExtIntIXmlLi2ET0_EEiU7_ExtIntIXT_EEibiiii(i31 signext %2, i1 zeroext true, i32 10, i32 12, i32 0, i32 0) #5
-  store i40 %call, i40* %ap_fixed_SinCos, align 8, !tbaa !29
-  %3 = bitcast i40* %ap_fixed_SinCos to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %3) #5
-  %4 = bitcast i31* %a to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %4) #5
+  call void @llvm.lifetime.start.p0(i64 4, ptr %a) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %ap_fixed_SinCos) #5
+  %0 = load i31, ptr %a, align 4, !tbaa !27
+  %call = call spir_func i40 @_Z24__spirv_FixedSinCosINTELILi31ELi20EEU7_ExtIntIXmlLi2ET0_EEiU7_ExtIntIXT_EEibiiii(i31 signext %0, i1 zeroext true, i32 10, i32 12, i32 0, i32 0) #5
+  store i40 %call, ptr %ap_fixed_SinCos, align 8, !tbaa !29
+  call void @llvm.lifetime.end.p0(i64 8, ptr %ap_fixed_SinCos) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %a) #5
   ret void
 }
 
@@ -406,17 +374,13 @@ define linkonce_odr dso_local spir_func void @_Z6sin_piILi60ELi5ELb0ELi2ELi2EEvv
 entry:
   %a = alloca i60, align 8
   %ap_fixed_SinPi = alloca i5, align 1
-  %0 = bitcast i60* %a to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %0) #5
-  %1 = bitcast i5* %ap_fixed_SinPi to i8*
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %1) #5
-  %2 = load i60, i60* %a, align 8, !tbaa !31
-  %call = call spir_func signext i5 @_Z23__spirv_FixedSinPiINTELILi60ELi5EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEibiiii(i60 %2, i1 zeroext false, i32 2, i32 2, i32 0, i32 0) #5
-  store i5 %call, i5* %ap_fixed_SinPi, align 1, !tbaa !11
-  %3 = bitcast i5* %ap_fixed_SinPi to i8*
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %3) #5
-  %4 = bitcast i60* %a to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %4) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %a) #5
+  call void @llvm.lifetime.start.p0(i64 1, ptr %ap_fixed_SinPi) #5
+  %0 = load i60, ptr %a, align 8, !tbaa !31
+  %call = call spir_func signext i5 @_Z23__spirv_FixedSinPiINTELILi60ELi5EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEibiiii(i60 %0, i1 zeroext false, i32 2, i32 2, i32 0, i32 0) #5
+  store i5 %call, ptr %ap_fixed_SinPi, align 1, !tbaa !11
+  call void @llvm.lifetime.end.p0(i64 1, ptr %ap_fixed_SinPi) #5
+  call void @llvm.lifetime.end.p0(i64 8, ptr %a) #5
   ret void
 }
 
@@ -425,17 +389,13 @@ define linkonce_odr dso_local spir_func void @_Z6cos_piILi28ELi16ELb0ELi8ELi5EEv
 entry:
   %a = alloca i28, align 4
   %ap_fixed_CosPi = alloca i16, align 2
-  %0 = bitcast i28* %a to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #5
-  %1 = bitcast i16* %ap_fixed_CosPi to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %1) #5
-  %2 = load i28, i28* %a, align 4, !tbaa !25
-  %call = call spir_func signext i16 @_Z23__spirv_FixedCosPiINTELILi28ELi16EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEibiiii(i28 signext %2, i1 zeroext false, i32 8, i32 5, i32 0, i32 0) #5
-  store i16 %call, i16* %ap_fixed_CosPi, align 2, !tbaa !33
-  %3 = bitcast i16* %ap_fixed_CosPi to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %3) #5
-  %4 = bitcast i28* %a to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %4) #5
+  call void @llvm.lifetime.start.p0(i64 4, ptr %a) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %ap_fixed_CosPi) #5
+  %0 = load i28, ptr %a, align 4, !tbaa !25
+  %call = call spir_func signext i16 @_Z23__spirv_FixedCosPiINTELILi28ELi16EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEibiiii(i28 signext %0, i1 zeroext false, i32 8, i32 5, i32 0, i32 0) #5
+  store i16 %call, ptr %ap_fixed_CosPi, align 2, !tbaa !33
+  call void @llvm.lifetime.end.p0(i64 2, ptr %ap_fixed_CosPi) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %a) #5
   ret void
 }
 
@@ -444,17 +404,13 @@ define linkonce_odr dso_local spir_func void @_Z10sin_cos_piILi13ELi5ELb0ELi2ELi
 entry:
   %a = alloca i13, align 2
   %ap_fixed_SinCosPi = alloca i10, align 2
-  %0 = bitcast i13* %a to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %0) #5
-  %1 = bitcast i10* %ap_fixed_SinCosPi to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %1) #5
-  %2 = load i13, i13* %a, align 2, !tbaa !9
-  %call = call spir_func signext i10 @_Z26__spirv_FixedSinCosPiINTELILi13ELi5EEU7_ExtIntIXmlLi2ET0_EEiU7_ExtIntIXT_EEibiiii(i13 signext %2, i1 zeroext false, i32 2, i32 2, i32 0, i32 0) #5
-  store i10 %call, i10* %ap_fixed_SinCosPi, align 2, !tbaa !19
-  %3 = bitcast i10* %ap_fixed_SinCosPi to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %3) #5
-  %4 = bitcast i13* %a to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %4) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %a) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %ap_fixed_SinCosPi) #5
+  %0 = load i13, ptr %a, align 2, !tbaa !9
+  %call = call spir_func signext i10 @_Z26__spirv_FixedSinCosPiINTELILi13ELi5EEU7_ExtIntIXmlLi2ET0_EEiU7_ExtIntIXT_EEibiiii(i13 signext %0, i1 zeroext false, i32 2, i32 2, i32 0, i32 0) #5
+  store i10 %call, ptr %ap_fixed_SinCosPi, align 2, !tbaa !19
+  call void @llvm.lifetime.end.p0(i64 2, ptr %ap_fixed_SinCosPi) #5
+  call void @llvm.lifetime.end.p0(i64 2, ptr %a) #5
   ret void
 }
 
@@ -463,17 +419,13 @@ define linkonce_odr dso_local spir_func void @_Z3logILi64ELi44ELb1ELi24ELi22EEvv
 entry:
   %a = alloca i64, align 8
   %ap_fixed_Log = alloca i44, align 8
-  %0 = bitcast i64* %a to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %0) #5
-  %1 = bitcast i44* %ap_fixed_Log to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %1) #5
-  %2 = load i64, i64* %a, align 8, !tbaa !35
-  %call = call spir_func i44 @_Z21__spirv_FixedLogINTELILi64ELi44EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEibiiii(i64 %2, i1 zeroext true, i32 24, i32 22, i32 0, i32 0) #5
-  store i44 %call, i44* %ap_fixed_Log, align 8, !tbaa !37
-  %3 = bitcast i44* %ap_fixed_Log to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %3) #5
-  %4 = bitcast i64* %a to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %4) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %a) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %ap_fixed_Log) #5
+  %0 = load i64, ptr %a, align 8, !tbaa !35
+  %call = call spir_func i44 @_Z21__spirv_FixedLogINTELILi64ELi44EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEibiiii(i64 %0, i1 zeroext true, i32 24, i32 22, i32 0, i32 0) #5
+  store i44 %call, ptr %ap_fixed_Log, align 8, !tbaa !37
+  call void @llvm.lifetime.end.p0(i64 8, ptr %ap_fixed_Log) #5
+  call void @llvm.lifetime.end.p0(i64 8, ptr %a) #5
   ret void
 }
 
@@ -482,17 +434,13 @@ define linkonce_odr dso_local spir_func void @_Z3expILi44ELi34ELb0ELi20ELi20EEvv
 entry:
   %a = alloca i44, align 8
   %ap_fixed_Exp = alloca i34, align 8
-  %0 = bitcast i44* %a to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %0) #5
-  %1 = bitcast i34* %ap_fixed_Exp to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %1) #5
-  %2 = load i44, i44* %a, align 8, !tbaa !37
-  %call = call spir_func i34 @_Z21__spirv_FixedExpINTELILi44ELi34EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEibiiii(i44 %2, i1 zeroext false, i32 20, i32 20, i32 0, i32 0) #5
-  store i34 %call, i34* %ap_fixed_Exp, align 8, !tbaa !39
-  %3 = bitcast i34* %ap_fixed_Exp to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %3) #5
-  %4 = bitcast i44* %a to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %4) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %a) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %ap_fixed_Exp) #5
+  %0 = load i44, ptr %a, align 8, !tbaa !37
+  %call = call spir_func i34 @_Z21__spirv_FixedExpINTELILi44ELi34EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEibiiii(i44 %0, i1 zeroext false, i32 20, i32 20, i32 0, i32 0) #5
+  store i34 %call, ptr %ap_fixed_Exp, align 8, !tbaa !39
+  call void @llvm.lifetime.end.p0(i64 8, ptr %ap_fixed_Exp) #5
+  call void @llvm.lifetime.end.p0(i64 8, ptr %a) #5
   ret void
 }
 
@@ -500,21 +448,17 @@ entry:
 define linkonce_odr dso_local spir_func void @_Z7sin_cosILi31ELi20ELb1ELi10ELi12EEvv_() #3 comdat {
 entry:
   %0 = alloca i34, align 8
-  %1 = addrspacecast i34* %0 to i34 addrspace(4)*
+  %1 = addrspacecast ptr %0 to ptr addrspace(4)
   %2 = alloca i66, align 8
-  %3 = addrspacecast i66* %2 to i66 addrspace(4)*
-  %4 = bitcast i34* %0 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %4)
-  %5 = bitcast i66* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 16, i8* %5)
-  %6 = load i34, i34 addrspace(4)* %1, align 8
-  call spir_func void @_Z24__spirv_FixedSinCosINTELILi34ELi66EEU7_ExtIntIXmlLi2ET0_EEiU7_ExtIntIXT_EEibiiii(i66 addrspace(4)* sret(i66) align 8 %3, i34 %6, i1 zeroext true, i32 3, i32 2, i32 0, i32 0) #5
-  %7 = load i66, i66 addrspace(4)* %3, align 8
-  store i66 %7, i66 addrspace(4)* %3, align 8
-  %8 = bitcast i66* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 16, i8* %8)
-  %9 = bitcast i34* %0 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %9)
+  %3 = addrspacecast ptr %2 to ptr addrspace(4)
+  call void @llvm.lifetime.start.p0(i64 8, ptr %0)
+  call void @llvm.lifetime.start.p0(i64 16, ptr %2)
+  %4 = load i34, ptr addrspace(4) %1, align 8
+  call spir_func void @_Z24__spirv_FixedSinCosINTELILi34ELi66EEU7_ExtIntIXmlLi2ET0_EEiU7_ExtIntIXT_EEibiiii(ptr addrspace(4) sret(i66) align 8 %3, i34 %4, i1 zeroext true, i32 3, i32 2, i32 0, i32 0) #5
+  %5 = load i66, ptr addrspace(4) %3, align 8
+  store i66 %5, ptr addrspace(4) %3, align 8
+  call void @llvm.lifetime.end.p0(i64 16, ptr %2)
+  call void @llvm.lifetime.end.p0(i64 8, ptr %0)
   ret void
 }
 
@@ -522,25 +466,21 @@ entry:
 define linkonce_odr dso_local spir_func void @_Z3expILi68ELi68ELb0ELi20ELi20EEvv() #3 comdat {
 entry:
   %a = alloca i68, align 8
-  %a.ascast = addrspacecast i68* %a to i68 addrspace(4)*
+  %a.ascast = addrspacecast ptr %a to ptr addrspace(4)
   %ap_fixed_Exp = alloca i68, align 8
-  %ap_fixed_Exp.ascast = addrspacecast i68* %ap_fixed_Exp to i68 addrspace(4)*
+  %ap_fixed_Exp.ascast = addrspacecast ptr %ap_fixed_Exp to ptr addrspace(4)
   %tmp = alloca i68, align 8
-  %tmp.ascast = addrspacecast i68* %tmp to i68 addrspace(4)*
+  %tmp.ascast = addrspacecast ptr %tmp to ptr addrspace(4)
   %indirect-arg-temp = alloca i68, align 8
-  %0 = bitcast i68* %a to i8*
-  call void @llvm.lifetime.start.p0i8(i64 16, i8* %0)
-  %1 = bitcast i68* %ap_fixed_Exp to i8*
-  call void @llvm.lifetime.start.p0i8(i64 16, i8* %1)
-  %2 = load i68, i68 addrspace(4)* %a.ascast, align 8
-  store i68 %2, i68* %indirect-arg-temp, align 8
-  call spir_func void @_Z21__spirv_FixedExpINTELILi68ELi68EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEibiiii(i68 addrspace(4)* sret(i68) align 8 %tmp.ascast, i68* byval(i68) align 8 %indirect-arg-temp, i1 zeroext false, i32 20, i32 20, i32 0, i32 0) #4
-  %3 = load i68, i68 addrspace(4)* %tmp.ascast, align 8
-  store i68 %3, i68 addrspace(4)* %ap_fixed_Exp.ascast, align 8
-  %4 = bitcast i68* %ap_fixed_Exp to i8*
-  call void @llvm.lifetime.end.p0i8(i64 16, i8* %4)
-  %5 = bitcast i68* %a to i8*
-  call void @llvm.lifetime.end.p0i8(i64 16, i8* %5)
+  call void @llvm.lifetime.start.p0(i64 16, ptr %a)
+  call void @llvm.lifetime.start.p0(i64 16, ptr %ap_fixed_Exp)
+  %0 = load i68, ptr addrspace(4) %a.ascast, align 8
+  store i68 %0, ptr %indirect-arg-temp, align 8
+  call spir_func void @_Z21__spirv_FixedExpINTELILi68ELi68EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEibiiii(ptr addrspace(4) sret(i68) align 8 %tmp.ascast, ptr byval(i68) align 8 %indirect-arg-temp, i1 zeroext false, i32 20, i32 20, i32 0, i32 0) #4
+  %1 = load i68, ptr addrspace(4) %tmp.ascast, align 8
+  store i68 %1, ptr addrspace(4) %ap_fixed_Exp.ascast, align 8
+  call void @llvm.lifetime.end.p0(i64 16, ptr %ap_fixed_Exp)
+  call void @llvm.lifetime.end.p0(i64 16, ptr %a)
   ret void
 }
 
@@ -582,10 +522,10 @@ declare dso_local spir_func i44 @_Z21__spirv_FixedLogINTELILi64ELi44EEU7_ExtIntI
 declare dso_local spir_func i34 @_Z21__spirv_FixedExpINTELILi44ELi34EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEibiiii(i44, i1 zeroext, i32, i32, i32, i32) #4
 
 ; Function Attrs: nounwind
-declare dso_local spir_func void @_Z24__spirv_FixedSinCosINTELILi34ELi66EEU7_ExtIntIXmlLi2ET0_EEiU7_ExtIntIXT_EEibiiii(i66 addrspace(4)* sret(i66) align 8, i34, i1 zeroext, i32, i32, i32, i32) #4
+declare dso_local spir_func void @_Z24__spirv_FixedSinCosINTELILi34ELi66EEU7_ExtIntIXmlLi2ET0_EEiU7_ExtIntIXT_EEibiiii(ptr addrspace(4) sret(i66) align 8, i34, i1 zeroext, i32, i32, i32, i32) #4
 
 ; Function Attrs: convergent nounwind
-declare dso_local spir_func void @_Z21__spirv_FixedExpINTELILi68ELi68EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEibiiii(i68 addrspace(4)* sret(i68) align 8, i68* byval(i68) align 8, i1 zeroext, i32, i32, i32, i32) #4
+declare dso_local spir_func void @_Z21__spirv_FixedExpINTELILi68ELi68EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEibiiii(ptr addrspace(4) sret(i68) align 8, ptr byval(i68) align 8, i1 zeroext, i32, i32, i32, i32) #4
 
 attributes #0 = { norecurse "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "sycl-module-id"="ap_fixed.cpp" "uniform-work-group-size"="true" "unsafe-fp-math"="false" "use-soft-float"="false" }
 attributes #1 = { argmemonly nounwind willreturn }
diff --git a/test/extensions/INTEL/SPV_INTEL_arbitrary_precision_floating_point/capability-arbitrary-precision-floating-point.ll b/test/extensions/INTEL/SPV_INTEL_arbitrary_precision_floating_point/capability-arbitrary-precision-floating-point.ll
index c3737165f3..4489a44038 100644
--- a/test/extensions/INTEL/SPV_INTEL_arbitrary_precision_floating_point/capability-arbitrary-precision-floating-point.ll
+++ b/test/extensions/INTEL/SPV_INTEL_arbitrary_precision_floating_point/capability-arbitrary-precision-floating-point.ll
@@ -480,22 +480,20 @@ target triple = "spir64-unknown-linux"
 ; Function Attrs: norecurse
 define dso_local spir_kernel void @_ZTSZ4mainE15kernel_function() #0 !kernel_arg_addr_space !4 !kernel_arg_access_qual !4 !kernel_arg_type !4 !kernel_arg_base_type !4 !kernel_arg_type_qual !4 {
   %1 = alloca %"class._ZTSZ4mainE3$_0.anon", align 1
-  %2 = bitcast %"class._ZTSZ4mainE3$_0.anon"* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %2) #5
-  %3 = addrspacecast %"class._ZTSZ4mainE3$_0.anon"* %1 to %"class._ZTSZ4mainE3$_0.anon" addrspace(4)*
-  call spir_func void @"_ZZ4mainENK3$_0clEv"(%"class._ZTSZ4mainE3$_0.anon" addrspace(4)* %3)
-  %4 = bitcast %"class._ZTSZ4mainE3$_0.anon"* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %4) #5
+  call void @llvm.lifetime.start.p0(i64 1, ptr %1) #5
+  %2 = addrspacecast ptr %1 to ptr addrspace(4)
+  call spir_func void @"_ZZ4mainENK3$_0clEv"(ptr addrspace(4) %2)
+  call void @llvm.lifetime.end.p0(i64 1, ptr %1) #5
   ret void
 }
 
 ; Function Attrs: argmemonly nounwind willreturn
-declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #1
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
 
 ; Function Attrs: inlinehint norecurse
-define internal spir_func void @"_ZZ4mainENK3$_0clEv"(%"class._ZTSZ4mainE3$_0.anon" addrspace(4)* %0) #2 align 2 {
-  %2 = alloca %"class._ZTSZ4mainE3$_0.anon" addrspace(4)*, align 8
-  store %"class._ZTSZ4mainE3$_0.anon" addrspace(4)* %0, %"class._ZTSZ4mainE3$_0.anon" addrspace(4)** %2, align 8, !tbaa !5
+define internal spir_func void @"_ZZ4mainENK3$_0clEv"(ptr addrspace(4) %0) #2 align 2 {
+  %2 = alloca ptr addrspace(4), align 8
+  store ptr addrspace(4) %0, ptr %2, align 8, !tbaa !5
   call spir_func void @_Z13ap_float_castILi11ELi28ELi9ELi30EEvv()
   call spir_func void @_Z22ap_float_cast_from_intILi43ELi8ELi16EEvv()
   call spir_func void @_Z20ap_float_cast_to_intILi7ELi15ELi30EEvv()
@@ -545,26 +543,22 @@ define internal spir_func void @"_ZZ4mainENK3$_0clEv"(%"class._ZTSZ4mainE3$_0.an
 }
 
 ; Function Attrs: argmemonly nounwind willreturn
-declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #1
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
 
 ; Function Attrs: norecurse nounwind
 define linkonce_odr dso_local spir_func void @_Z13ap_float_castILi11ELi28ELi9ELi30EEvv() #3 {
   %1 = alloca i40, align 8
   %2 = alloca i40, align 8
-  %3 = bitcast i40* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %3) #5
-  %4 = bitcast i40* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %4) #5
-  %5 = load i40, i40* %1, align 8, !tbaa !9
-  %6 = call spir_func i40 @_Z31__spirv_ArbitraryFloatCastINTELILi40ELi40EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i40 %5, i32 28, i32 30, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #5
+  %3 = load i40, ptr %1, align 8, !tbaa !9
+  %4 = call spir_func i40 @_Z31__spirv_ArbitraryFloatCastINTELILi40ELi40EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i40 %3, i32 28, i32 30, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_40]] [[Cast_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 9 ArbitraryFloatCastINTEL [[Ty_40]] [[#]] [[Cast_AId]] 28 30 0 2 1
 ; CHECK-LLVM: call i40 @intel_arbitrary_float_cast.i40.i40(i40 %[[#]], i32 28, i32 30, i32 0, i32 2, i32 1)
-  store i40 %6, i40* %2, align 8, !tbaa !9
-  %7 = bitcast i40* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %7) #5
-  %8 = bitcast i40* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %8) #5
+  store i40 %4, ptr %2, align 8, !tbaa !9
+  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 8, ptr %1) #5
   ret void
 }
 
@@ -572,20 +566,16 @@ define linkonce_odr dso_local spir_func void @_Z13ap_float_castILi11ELi28ELi9ELi
 define linkonce_odr dso_local spir_func void @_Z22ap_float_cast_from_intILi43ELi8ELi16EEvv() #3 {
   %1 = alloca i43, align 8
   %2 = alloca i25, align 4
-  %3 = bitcast i43* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %3) #5
-  %4 = bitcast i25* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %4) #5
-  %5 = load i43, i43* %1, align 8, !tbaa !11
-  %6 = call spir_func signext i25 @_Z38__spirv_ArbitraryFloatCastFromIntINTELILi43ELi25EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiibiii(i43 %5, i32 16, i1 zeroext false, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #5
+  %3 = load i43, ptr %1, align 8, !tbaa !11
+  %4 = call spir_func signext i25 @_Z38__spirv_ArbitraryFloatCastFromIntINTELILi43ELi25EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiibiii(i43 %3, i32 16, i1 zeroext false, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_43]] [[CastFromInt_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 9 ArbitraryFloatCastFromIntINTEL [[Ty_25]] [[#]] [[CastFromInt_AId]] 16 0 0 2 1
 ; CHECK-LLVM: call i25 @intel_arbitrary_float_cast_from_int.i25.i43(i43 %[[#]], i32 16, i1 false, i32 0, i32 2, i32 1)
-  store i25 %6, i25* %2, align 4, !tbaa !13
-  %7 = bitcast i25* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %7) #5
-  %8 = bitcast i43* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %8) #5
+  store i25 %4, ptr %2, align 4, !tbaa !13
+  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 8, ptr %1) #5
   ret void
 }
 
@@ -593,20 +583,16 @@ define linkonce_odr dso_local spir_func void @_Z22ap_float_cast_from_intILi43ELi
 define linkonce_odr dso_local spir_func void @_Z20ap_float_cast_to_intILi7ELi15ELi30EEvv() #3 {
   %1 = alloca i23, align 4
   %2 = alloca i30, align 4
-  %3 = bitcast i23* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %3) #5
-  %4 = bitcast i30* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %4) #5
-  %5 = load i23, i23* %1, align 4, !tbaa !15
-  %6 = call spir_func signext i30 @_Z36__spirv_ArbitraryFloatCastToIntINTELILi23ELi30EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiibiii(i23 signext %5, i32 15, i1 zeroext true, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #5
+  %3 = load i23, ptr %1, align 4, !tbaa !15
+  %4 = call spir_func signext i30 @_Z36__spirv_ArbitraryFloatCastToIntINTELILi23ELi30EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiibiii(i23 signext %3, i32 15, i1 zeroext true, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_23]] [[CastToInt_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 9 ArbitraryFloatCastToIntINTEL [[Ty_30]] [[#]] [[CastToInt_AId]] 15 1 0 2 1
 ; CHECK-LLVM: call i30 @intel_arbitrary_float_cast_to_int.i30.i23(i23 %[[#]], i32 15, i1 true, i32 0, i32 2, i32 1)
-  store i30 %6, i30* %2, align 4, !tbaa !17
-  %7 = bitcast i30* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %7) #5
-  %8 = bitcast i23* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %8) #5
+  store i30 %4, ptr %2, align 4, !tbaa !17
+  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #5
   ret void
 }
 
@@ -618,46 +604,34 @@ define linkonce_odr dso_local spir_func void @_Z12ap_float_addILi5ELi7ELi6ELi8EL
   %4 = alloca i15, align 2
   %5 = alloca i14, align 2
   %6 = alloca i14, align 2
-  %7 = bitcast i13* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %7) #5
-  %8 = bitcast i13* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %8) #5
-  %9 = bitcast i15* %3 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %9) #5
-  %10 = bitcast i15* %4 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %10) #5
-  %11 = bitcast i14* %5 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %11) #5
-  %12 = load i13, i13* %1, align 2, !tbaa !19
-  %13 = load i15, i15* %3, align 2, !tbaa !21
-  %14 = call spir_func signext i14 @_Z30__spirv_ArbitraryFloatAddINTELILi13ELi15ELi14EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i13 signext %12, i32 7, i15 signext %13, i32 8, i32 9, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %2) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %3) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %4) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %5) #5
+  %7 = load i13, ptr %1, align 2, !tbaa !19
+  %8 = load i15, ptr %3, align 2, !tbaa !21
+  %9 = call spir_func signext i14 @_Z30__spirv_ArbitraryFloatAddINTELILi13ELi15ELi14EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i13 signext %7, i32 7, i15 signext %8, i32 8, i32 9, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_13]] [[Add1_A1Id:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 6 Load [[Ty_15]] [[Add1_B1Id:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 11 ArbitraryFloatAddINTEL [[Ty_14]] [[#]] [[Add1_A1Id]] 7 [[Add1_B1Id]] 8 9 0 2 1
 ; CHECK-LLVM: call i14 @intel_arbitrary_float_add.i14.i13.i15(i13 %[[#]], i32 7, i15 %[[#]], i32 8, i32 9, i32 0, i32 2, i32 1)
-  store i14 %14, i14* %5, align 2, !tbaa !23
-  %15 = bitcast i14* %6 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %15) #5
-  %16 = load i13, i13* %2, align 2, !tbaa !19
-  %17 = load i15, i15* %4, align 2, !tbaa !21
-  %18 = call spir_func signext i14 @_Z30__spirv_ArbitraryFloatAddINTELILi13ELi15ELi14EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i13 signext %16, i32 7, i15 signext %17, i32 8, i32 9, i32 0, i32 2, i32 1) #5
+  store i14 %9, ptr %5, align 2, !tbaa !23
+  call void @llvm.lifetime.start.p0(i64 2, ptr %6) #5
+  %10 = load i13, ptr %2, align 2, !tbaa !19
+  %11 = load i15, ptr %4, align 2, !tbaa !21
+  %12 = call spir_func signext i14 @_Z30__spirv_ArbitraryFloatAddINTELILi13ELi15ELi14EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i13 signext %10, i32 7, i15 signext %11, i32 8, i32 9, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_13]] [[Add1_A2Id:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 6 Load [[Ty_15]] [[Add1_B2Id:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 11 ArbitraryFloatAddINTEL [[Ty_14]] [[#]] [[Add1_A2Id]] 7 [[Add1_B2Id]] 8 9 0 2 1
 ; CHECK-LLVM: call i14 @intel_arbitrary_float_add.i14.i13.i15(i13 %[[#]], i32 7, i15 %[[#]], i32 8, i32 9, i32 0, i32 2, i32 1)
-  store i14 %18, i14* %6, align 2, !tbaa !23
-  %19 = bitcast i14* %6 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %19) #5
-  %20 = bitcast i14* %5 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %20) #5
-  %21 = bitcast i15* %4 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %21) #5
-  %22 = bitcast i15* %3 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %22) #5
-  %23 = bitcast i13* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %23) #5
-  %24 = bitcast i13* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %24) #5
+  store i14 %12, ptr %6, align 2, !tbaa !23
+  call void @llvm.lifetime.end.p0(i64 2, ptr %6) #5
+  call void @llvm.lifetime.end.p0(i64 2, ptr %5) #5
+  call void @llvm.lifetime.end.p0(i64 2, ptr %4) #5
+  call void @llvm.lifetime.end.p0(i64 2, ptr %3) #5
+  call void @llvm.lifetime.end.p0(i64 2, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 2, ptr %1) #5
   ret void
 }
 
@@ -669,46 +643,34 @@ define linkonce_odr dso_local spir_func void @_Z12ap_float_addILi6ELi8ELi4ELi9EL
   %4 = alloca i14, align 2
   %5 = alloca i13, align 2
   %6 = alloca i13, align 2
-  %7 = bitcast i15* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %7) #5
-  %8 = bitcast i15* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %8) #5
-  %9 = bitcast i14* %3 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %9) #5
-  %10 = bitcast i14* %4 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %10) #5
-  %11 = bitcast i13* %5 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %11) #5
-  %12 = load i15, i15* %1, align 2, !tbaa !21
-  %13 = load i14, i14* %3, align 2, !tbaa !23
-  %14 = call spir_func signext i13 @_Z30__spirv_ArbitraryFloatAddINTELILi15ELi14ELi13EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i15 signext %12, i32 8, i14 signext %13, i32 9, i32 7, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %2) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %3) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %4) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %5) #5
+  %7 = load i15, ptr %1, align 2, !tbaa !21
+  %8 = load i14, ptr %3, align 2, !tbaa !23
+  %9 = call spir_func signext i13 @_Z30__spirv_ArbitraryFloatAddINTELILi15ELi14ELi13EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i15 signext %7, i32 8, i14 signext %8, i32 9, i32 7, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_15]] [[Add2_A1Id:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 6 Load [[Ty_14]] [[Add2_B1Id:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 11 ArbitraryFloatAddINTEL [[Ty_13]] [[#]] [[Add2_A1Id]] 8 [[Add2_B1Id]] 9 7 0 2 1
 ; CHECK-LLVM: call i13 @intel_arbitrary_float_add.i13.i15.i14(i15 %[[#]], i32 8, i14 %[[#]], i32 9, i32 7, i32 0, i32 2, i32 1)
-  store i13 %14, i13* %5, align 2, !tbaa !19
-  %15 = bitcast i13* %6 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %15) #5
-  %16 = load i15, i15* %2, align 2, !tbaa !21
-  %17 = load i14, i14* %4, align 2, !tbaa !23
-  %18 = call spir_func signext i13 @_Z30__spirv_ArbitraryFloatAddINTELILi15ELi14ELi13EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i15 signext %16, i32 8, i14 signext %17, i32 9, i32 7, i32 0, i32 2, i32 1) #5
+  store i13 %9, ptr %5, align 2, !tbaa !19
+  call void @llvm.lifetime.start.p0(i64 2, ptr %6) #5
+  %10 = load i15, ptr %2, align 2, !tbaa !21
+  %11 = load i14, ptr %4, align 2, !tbaa !23
+  %12 = call spir_func signext i13 @_Z30__spirv_ArbitraryFloatAddINTELILi15ELi14ELi13EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i15 signext %10, i32 8, i14 signext %11, i32 9, i32 7, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_15]] [[Add2_A2Id:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 6 Load [[Ty_14]] [[Add2_B2Id:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 11 ArbitraryFloatAddINTEL [[Ty_13]] [[#]] [[Add2_A2Id]] 8 [[Add2_B2Id]] 9 7 0 2 1
 ; CHECK-LLVM: call i13 @intel_arbitrary_float_add.i13.i15.i14(i15 %[[#]], i32 8, i14 %[[#]], i32 9, i32 7, i32 0, i32 2, i32 1)
-  store i13 %18, i13* %6, align 2, !tbaa !19
-  %19 = bitcast i13* %6 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %19) #5
-  %20 = bitcast i13* %5 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %20) #5
-  %21 = bitcast i14* %4 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %21) #5
-  %22 = bitcast i14* %3 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %22) #5
-  %23 = bitcast i15* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %23) #5
-  %24 = bitcast i15* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %24) #5
+  store i13 %12, ptr %6, align 2, !tbaa !19
+  call void @llvm.lifetime.end.p0(i64 2, ptr %6) #5
+  call void @llvm.lifetime.end.p0(i64 2, ptr %5) #5
+  call void @llvm.lifetime.end.p0(i64 2, ptr %4) #5
+  call void @llvm.lifetime.end.p0(i64 2, ptr %3) #5
+  call void @llvm.lifetime.end.p0(i64 2, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 2, ptr %1) #5
   ret void
 }
 
@@ -717,26 +679,20 @@ define linkonce_odr dso_local spir_func void @_Z12ap_float_subILi4ELi4ELi5ELi5EL
   %1 = alloca i9, align 2
   %2 = alloca i11, align 2
   %3 = alloca i13, align 2
-  %4 = bitcast i9* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %4) #5
-  %5 = bitcast i11* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %5) #5
-  %6 = bitcast i13* %3 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %6) #5
-  %7 = load i9, i9* %1, align 2, !tbaa !25
-  %8 = load i11, i11* %2, align 2, !tbaa !27
-  %9 = call spir_func signext i13 @_Z30__spirv_ArbitraryFloatSubINTELILi9ELi11ELi13EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i9 signext %7, i32 4, i11 signext %8, i32 5, i32 6, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %2) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %3) #5
+  %4 = load i9, ptr %1, align 2, !tbaa !25
+  %5 = load i11, ptr %2, align 2, !tbaa !27
+  %6 = call spir_func signext i13 @_Z30__spirv_ArbitraryFloatSubINTELILi9ELi11ELi13EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i9 signext %4, i32 4, i11 signext %5, i32 5, i32 6, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_9]] [[Sub_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 6 Load [[Ty_11]] [[Sub_BId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 11 ArbitraryFloatSubINTEL [[Ty_13]] [[#]] [[Sub_AId]] 4 [[Sub_BId]] 5 6 0 2 1
 ; CHECK-LLVM: call i13 @intel_arbitrary_float_sub.i13.i9.i11(i9 %[[#]], i32 4, i11 %[[#]], i32 5, i32 6, i32 0, i32 2, i32 1)
-  store i13 %9, i13* %3, align 2, !tbaa !19
-  %10 = bitcast i13* %3 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %10) #5
-  %11 = bitcast i11* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %11) #5
-  %12 = bitcast i9* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %12) #5
+  store i13 %6, ptr %3, align 2, !tbaa !19
+  call void @llvm.lifetime.end.p0(i64 2, ptr %3) #5
+  call void @llvm.lifetime.end.p0(i64 2, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 2, ptr %1) #5
   ret void
 }
 
@@ -745,26 +701,20 @@ define linkonce_odr dso_local spir_func void @_Z12ap_float_mulILi16ELi34ELi16ELi
   %1 = alloca i51, align 8
   %2 = alloca i51, align 8
   %3 = alloca i51, align 8
-  %4 = bitcast i51* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %4) #5
-  %5 = bitcast i51* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %5) #5
-  %6 = bitcast i51* %3 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %6) #5
-  %7 = load i51, i51* %1, align 8, !tbaa !29
-  %8 = load i51, i51* %2, align 8, !tbaa !29
-  %9 = call spir_func i51 @_Z30__spirv_ArbitraryFloatMulINTELILi51ELi51ELi51EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i51 %7, i32 34, i51 %8, i32 34, i32 34, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #5
+  %4 = load i51, ptr %1, align 8, !tbaa !29
+  %5 = load i51, ptr %2, align 8, !tbaa !29
+  %6 = call spir_func i51 @_Z30__spirv_ArbitraryFloatMulINTELILi51ELi51ELi51EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i51 %4, i32 34, i51 %5, i32 34, i32 34, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_51]] [[Mul_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 6 Load [[Ty_51]] [[Mul_BId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 11 ArbitraryFloatMulINTEL [[Ty_51]] [[#]] [[Mul_AId]] 34 [[Mul_BId]] 34 34 0 2 1
 ; CHECK-LLVM: call i51 @intel_arbitrary_float_mul.i51.i51.i51(i51 %[[#]], i32 34, i51 %[[#]], i32 34, i32 34, i32 0, i32 2, i32 1)
-  store i51 %9, i51* %3, align 8, !tbaa !29
-  %10 = bitcast i51* %3 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %10) #5
-  %11 = bitcast i51* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %11) #5
-  %12 = bitcast i51* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %12) #5
+  store i51 %6, ptr %3, align 8, !tbaa !29
+  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #5
+  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 8, ptr %1) #5
   ret void
 }
 
@@ -773,26 +723,20 @@ define linkonce_odr dso_local spir_func void @_Z12ap_float_divILi4ELi11ELi4ELi11
   %1 = alloca i16, align 2
   %2 = alloca i16, align 2
   %3 = alloca i18, align 4
-  %4 = bitcast i16* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %4) #5
-  %5 = bitcast i16* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %5) #5
-  %6 = bitcast i18* %3 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %6) #5
-  %7 = load i16, i16* %1, align 2, !tbaa !31
-  %8 = load i16, i16* %2, align 2, !tbaa !31
-  %9 = call spir_func signext i18 @_Z30__spirv_ArbitraryFloatDivINTELILi16ELi16ELi18EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i16 signext %7, i32 11, i16 signext %8, i32 11, i32 12, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %2) #5
+  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #5
+  %4 = load i16, ptr %1, align 2, !tbaa !31
+  %5 = load i16, ptr %2, align 2, !tbaa !31
+  %6 = call spir_func signext i18 @_Z30__spirv_ArbitraryFloatDivINTELILi16ELi16ELi18EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i16 signext %4, i32 11, i16 signext %5, i32 11, i32 12, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_16]] [[Div_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 6 Load [[Ty_16]] [[Div_BId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 11 ArbitraryFloatDivINTEL [[Ty_18]] [[#]] [[Div_AId]] 11 [[Div_BId]] 11 12 0 2 1
 ; CHECK-LLVM: call i18 @intel_arbitrary_float_div.i18.i16.i16(i16 %[[#]], i32 11, i16 %[[#]], i32 11, i32 12, i32 0, i32 2, i32 1)
-  store i18 %9, i18* %3, align 4, !tbaa !33
-  %10 = bitcast i18* %3 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %10) #5
-  %11 = bitcast i16* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %11) #5
-  %12 = bitcast i16* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %12) #5
+  store i18 %6, ptr %3, align 4, !tbaa !33
+  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #5
+  call void @llvm.lifetime.end.p0(i64 2, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 2, ptr %1) #5
   ret void
 }
 
@@ -801,25 +745,21 @@ define linkonce_odr dso_local spir_func void @_Z11ap_float_gtILi20ELi42ELi21ELi4
   %1 = alloca i63, align 8
   %2 = alloca i63, align 8
   %3 = alloca i8, align 1
-  %4 = bitcast i63* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %4) #5
-  %5 = bitcast i63* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %5) #5
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %3) #5
-  %6 = load i63, i63* %1, align 8, !tbaa !35
-  %7 = load i63, i63* %2, align 8, !tbaa !35
-  %8 = call spir_func zeroext i1 @_Z29__spirv_ArbitraryFloatGTINTELILi63ELi63EEbU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEii(i63 %6, i32 42, i63 %7, i32 41) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #5
+  call void @llvm.lifetime.start.p0(i64 1, ptr %3) #5
+  %4 = load i63, ptr %1, align 8, !tbaa !35
+  %5 = load i63, ptr %2, align 8, !tbaa !35
+  %6 = call spir_func zeroext i1 @_Z29__spirv_ArbitraryFloatGTINTELILi63ELi63EEbU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEii(i63 %4, i32 42, i63 %5, i32 41) #5
 ; CHECK-SPIRV: 6 Load [[Ty_63]] [[GT_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 6 Load [[Ty_63]] [[GT_BId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 7 ArbitraryFloatGTINTEL [[Ty_Bool]] [[#]] [[GT_AId]] 42 [[GT_BId]] 41
 ; CHECK-LLVM: call i1 @intel_arbitrary_float_gt.i1.i63.i63(i63 %[[#]], i32 42, i63 %[[#]], i32 41)
-  %9 = zext i1 %8 to i8
-  store i8 %9, i8* %3, align 1, !tbaa !37
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %3) #5
-  %10 = bitcast i63* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %10) #5
-  %11 = bitcast i63* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %11) #5
+  %7 = zext i1 %6 to i8
+  store i8 %7, ptr %3, align 1, !tbaa !37
+  call void @llvm.lifetime.end.p0(i64 1, ptr %3) #5
+  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 8, ptr %1) #5
   ret void
 }
 
@@ -828,25 +768,21 @@ define linkonce_odr dso_local spir_func void @_Z11ap_float_geILi19ELi27ELi19ELi2
   %1 = alloca i47, align 8
   %2 = alloca i47, align 8
   %3 = alloca i8, align 1
-  %4 = bitcast i47* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %4) #5
-  %5 = bitcast i47* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %5) #5
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %3) #5
-  %6 = load i47, i47* %1, align 8, !tbaa !39
-  %7 = load i47, i47* %2, align 8, !tbaa !39
-  %8 = call spir_func zeroext i1 @_Z29__spirv_ArbitraryFloatGEINTELILi47ELi47EEbU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEii(i47 %6, i32 27, i47 %7, i32 27) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #5
+  call void @llvm.lifetime.start.p0(i64 1, ptr %3) #5
+  %4 = load i47, ptr %1, align 8, !tbaa !39
+  %5 = load i47, ptr %2, align 8, !tbaa !39
+  %6 = call spir_func zeroext i1 @_Z29__spirv_ArbitraryFloatGEINTELILi47ELi47EEbU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEii(i47 %4, i32 27, i47 %5, i32 27) #5
 ; CHECK-SPIRV: 6 Load [[Ty_47]] [[GE_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 6 Load [[Ty_47]] [[GE_BId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 7 ArbitraryFloatGEINTEL [[Ty_Bool]] [[#]] [[GE_AId]] 27 [[GE_BId]] 27
 ; CHECK-LLVM: call i1 @intel_arbitrary_float_ge.i1.i47.i47(i47 %[[#]], i32 27, i47 %[[#]], i32 27)
-  %9 = zext i1 %8 to i8
-  store i8 %9, i8* %3, align 1, !tbaa !37
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %3) #5
-  %10 = bitcast i47* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %10) #5
-  %11 = bitcast i47* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %11) #5
+  %7 = zext i1 %6 to i8
+  store i8 %7, ptr %3, align 1, !tbaa !37
+  call void @llvm.lifetime.end.p0(i64 1, ptr %3) #5
+  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 8, ptr %1) #5
   ret void
 }
 
@@ -855,25 +791,21 @@ define linkonce_odr dso_local spir_func void @_Z11ap_float_ltILi2ELi2ELi3ELi3EEv
   %1 = alloca i5, align 1
   %2 = alloca i7, align 1
   %3 = alloca i8, align 1
-  %4 = bitcast i5* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %4) #5
-  %5 = bitcast i7* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %5) #5
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %3) #5
-  %6 = load i5, i5* %1, align 1, !tbaa !41
-  %7 = load i7, i7* %2, align 1, !tbaa !43
-  %8 = call spir_func zeroext i1 @_Z29__spirv_ArbitraryFloatLTINTELILi5ELi7EEbU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEii(i5 signext %6, i32 2, i7 signext %7, i32 3) #5
+  call void @llvm.lifetime.start.p0(i64 1, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 1, ptr %2) #5
+  call void @llvm.lifetime.start.p0(i64 1, ptr %3) #5
+  %4 = load i5, ptr %1, align 1, !tbaa !41
+  %5 = load i7, ptr %2, align 1, !tbaa !43
+  %6 = call spir_func zeroext i1 @_Z29__spirv_ArbitraryFloatLTINTELILi5ELi7EEbU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEii(i5 signext %4, i32 2, i7 signext %5, i32 3) #5
 ; CHECK-SPIRV: 6 Load [[Ty_5]] [[LT_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 6 Load [[Ty_7]] [[LT_BId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 7 ArbitraryFloatLTINTEL [[Ty_Bool]] [[#]] [[LT_AId]] 2 [[LT_BId]] 3
 ; CHECK-LLVM: call i1 @intel_arbitrary_float_lt.i1.i5.i7(i5 %[[#]], i32 2, i7 %[[#]], i32 3)
-  %9 = zext i1 %8 to i8
-  store i8 %9, i8* %3, align 1, !tbaa !37
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %3) #5
-  %10 = bitcast i7* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %10) #5
-  %11 = bitcast i5* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %11) #5
+  %7 = zext i1 %6 to i8
+  store i8 %7, ptr %3, align 1, !tbaa !37
+  call void @llvm.lifetime.end.p0(i64 1, ptr %3) #5
+  call void @llvm.lifetime.end.p0(i64 1, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 1, ptr %1) #5
   ret void
 }
 
@@ -882,25 +814,21 @@ define linkonce_odr dso_local spir_func void @_Z11ap_float_leILi27ELi27ELi26ELi2
   %1 = alloca i55, align 8
   %2 = alloca i55, align 8
   %3 = alloca i8, align 1
-  %4 = bitcast i55* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %4) #5
-  %5 = bitcast i55* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %5) #5
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %3) #5
-  %6 = load i55, i55* %1, align 8, !tbaa !45
-  %7 = load i55, i55* %2, align 8, !tbaa !45
-  %8 = call spir_func zeroext i1 @_Z29__spirv_ArbitraryFloatLEINTELILi55ELi55EEbU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEii(i55 %6, i32 27, i55 %7, i32 28) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #5
+  call void @llvm.lifetime.start.p0(i64 1, ptr %3) #5
+  %4 = load i55, ptr %1, align 8, !tbaa !45
+  %5 = load i55, ptr %2, align 8, !tbaa !45
+  %6 = call spir_func zeroext i1 @_Z29__spirv_ArbitraryFloatLEINTELILi55ELi55EEbU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEii(i55 %4, i32 27, i55 %5, i32 28) #5
 ; CHECK-SPIRV: 6 Load [[Ty_55]] [[LE_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 6 Load [[Ty_55]] [[LE_BId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 7 ArbitraryFloatLEINTEL [[Ty_Bool]] [[#]] [[LE_AId]] 27 [[LE_BId]] 28
 ; CHECK-LLVM: call i1 @intel_arbitrary_float_le.i1.i55.i55(i55 %[[#]], i32 27, i55 %[[#]], i32 28)
-  %9 = zext i1 %8 to i8
-  store i8 %9, i8* %3, align 1, !tbaa !37
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %3) #5
-  %10 = bitcast i55* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %10) #5
-  %11 = bitcast i55* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %11) #5
+  %7 = zext i1 %6 to i8
+  store i8 %7, ptr %3, align 1, !tbaa !37
+  call void @llvm.lifetime.end.p0(i64 1, ptr %3) #5
+  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 8, ptr %1) #5
   ret void
 }
 
@@ -909,25 +837,21 @@ define linkonce_odr dso_local spir_func void @_Z11ap_float_eqILi7ELi12ELi7ELi7EE
   %1 = alloca i20, align 4
   %2 = alloca i15, align 2
   %3 = alloca i8, align 1
-  %4 = bitcast i20* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %4) #5
-  %5 = bitcast i15* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %5) #5
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %3) #5
-  %6 = load i20, i20* %1, align 4, !tbaa !47
-  %7 = load i15, i15* %2, align 2, !tbaa !21
-  %8 = call spir_func zeroext i1 @_Z29__spirv_ArbitraryFloatEQINTELILi20ELi15EEbU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEii(i20 signext %6, i32 12, i15 signext %7, i32 7) #5
+  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %2) #5
+  call void @llvm.lifetime.start.p0(i64 1, ptr %3) #5
+  %4 = load i20, ptr %1, align 4, !tbaa !47
+  %5 = load i15, ptr %2, align 2, !tbaa !21
+  %6 = call spir_func zeroext i1 @_Z29__spirv_ArbitraryFloatEQINTELILi20ELi15EEbU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEii(i20 signext %4, i32 12, i15 signext %5, i32 7) #5
 ; CHECK-SPIRV: 6 Load [[Ty_20]] [[EQ_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 6 Load [[Ty_15]] [[EQ_BId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 7 ArbitraryFloatEQINTEL [[Ty_Bool]] [[#]] [[EQ_AId]] 12 [[EQ_BId]] 7
 ; CHECK-LLVM: call i1 @intel_arbitrary_float_eq.i1.i20.i15(i20 %[[#]], i32 12, i15 %[[#]], i32 7)
-  %9 = zext i1 %8 to i8
-  store i8 %9, i8* %3, align 1, !tbaa !37
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %3) #5
-  %10 = bitcast i15* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %10) #5
-  %11 = bitcast i20* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %11) #5
+  %7 = zext i1 %6 to i8
+  store i8 %7, ptr %3, align 1, !tbaa !37
+  call void @llvm.lifetime.end.p0(i64 1, ptr %3) #5
+  call void @llvm.lifetime.end.p0(i64 2, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #5
   ret void
 }
 
@@ -935,20 +859,16 @@ define linkonce_odr dso_local spir_func void @_Z11ap_float_eqILi7ELi12ELi7ELi7EE
 define linkonce_odr dso_local spir_func void @_Z14ap_float_recipILi9ELi29ELi9ELi29EEvv() #3 {
   %1 = alloca i39, align 8
   %2 = alloca i39, align 8
-  %3 = bitcast i39* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %3) #5
-  %4 = bitcast i39* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %4) #5
-  %5 = load i39, i39* %1, align 8, !tbaa !49
-  %6 = call spir_func i39 @_Z32__spirv_ArbitraryFloatRecipINTELILi39ELi39EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i39 %5, i32 29, i32 29, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #5
+  %3 = load i39, ptr %1, align 8, !tbaa !49
+  %4 = call spir_func i39 @_Z32__spirv_ArbitraryFloatRecipINTELILi39ELi39EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i39 %3, i32 29, i32 29, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_39]] [[Recip_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 9 ArbitraryFloatRecipINTEL [[Ty_39]] [[#]] [[Recip_AId]] 29 29 0 2 1
 ; CHECK-LLVM: call i39 @intel_arbitrary_float_recip.i39.i39(i39 %[[#]], i32 29, i32 29, i32 0, i32 2, i32 1)
-  store i39 %6, i39* %2, align 8, !tbaa !49
-  %7 = bitcast i39* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %7) #5
-  %8 = bitcast i39* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %8) #5
+  store i39 %4, ptr %2, align 8, !tbaa !49
+  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 8, ptr %1) #5
   ret void
 }
 
@@ -956,20 +876,16 @@ define linkonce_odr dso_local spir_func void @_Z14ap_float_recipILi9ELi29ELi9ELi
 define linkonce_odr dso_local spir_func void @_Z14ap_float_rsqrtILi12ELi19ELi13ELi20EEvv() #3 {
   %1 = alloca i32, align 4
   %2 = alloca i34, align 8
-  %3 = bitcast i32* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %3) #5
-  %4 = bitcast i34* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %4) #5
-  %5 = load i32, i32* %1, align 4, !tbaa !51
-  %6 = call spir_func i34 @_Z32__spirv_ArbitraryFloatRSqrtINTELILi32ELi34EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i32 %5, i32 19, i32 20, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #5
+  %3 = load i32, ptr %1, align 4, !tbaa !51
+  %4 = call spir_func i34 @_Z32__spirv_ArbitraryFloatRSqrtINTELILi32ELi34EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i32 %3, i32 19, i32 20, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_32]] [[Rsqrt_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 9 ArbitraryFloatRSqrtINTEL [[Ty_34]] [[#]] [[Rsqrt_AId]] 19 20 0 2 1
 ; CHECK-LLVM: call i34 @intel_arbitrary_float_rsqrt.i34.i32(i32 %[[#]], i32 19, i32 20, i32 0, i32 2, i32 1)
-  store i34 %6, i34* %2, align 8, !tbaa !53
-  %7 = bitcast i34* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %7) #5
-  %8 = bitcast i32* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %8) #5
+  store i34 %4, ptr %2, align 8, !tbaa !53
+  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #5
   ret void
 }
 
@@ -977,20 +893,16 @@ define linkonce_odr dso_local spir_func void @_Z14ap_float_rsqrtILi12ELi19ELi13E
 define linkonce_odr dso_local spir_func void @_Z13ap_float_cbrtILi0ELi1ELi0ELi1EEvv() #3 {
   %1 = alloca i2, align 1
   %2 = alloca i2, align 1
-  %3 = bitcast i2* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %3) #5
-  %4 = bitcast i2* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %4) #5
-  %5 = load i2, i2* %1, align 1, !tbaa !55
-  %6 = call spir_func signext i2 @_Z31__spirv_ArbitraryFloatCbrtINTELILi2ELi2EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i2 signext %5, i32 1, i32 1, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 1, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 1, ptr %2) #5
+  %3 = load i2, ptr %1, align 1, !tbaa !55
+  %4 = call spir_func signext i2 @_Z31__spirv_ArbitraryFloatCbrtINTELILi2ELi2EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i2 signext %3, i32 1, i32 1, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_2]] [[Cbrt_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 9 ArbitraryFloatCbrtINTEL [[Ty_2]] [[#]] [[Cbrt_AId]] 1 1 0 2 1
 ; CHECK-LLVM: call i2 @intel_arbitrary_float_cbrt.i2.i2(i2 %[[#]], i32 1, i32 1, i32 0, i32 2, i32 1)
-  store i2 %6, i2* %2, align 1, !tbaa !55
-  %7 = bitcast i2* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %7) #5
-  %8 = bitcast i2* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %8) #5
+  store i2 %4, ptr %2, align 1, !tbaa !55
+  call void @llvm.lifetime.end.p0(i64 1, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 1, ptr %1) #5
   ret void
 }
 
@@ -999,26 +911,20 @@ define linkonce_odr dso_local spir_func void @_Z14ap_float_hypotILi20ELi20ELi21E
   %1 = alloca i41, align 8
   %2 = alloca i43, align 8
   %3 = alloca i42, align 8
-  %4 = bitcast i41* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %4) #5
-  %5 = bitcast i43* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %5) #5
-  %6 = bitcast i42* %3 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %6) #5
-  %7 = load i41, i41* %1, align 8, !tbaa !57
-  %8 = load i43, i43* %2, align 8, !tbaa !11
-  %9 = call spir_func i42 @_Z32__spirv_ArbitraryFloatHypotINTELILi41ELi43ELi42EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i41 %7, i32 20, i43 %8, i32 21, i32 22, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #5
+  %4 = load i41, ptr %1, align 8, !tbaa !57
+  %5 = load i43, ptr %2, align 8, !tbaa !11
+  %6 = call spir_func i42 @_Z32__spirv_ArbitraryFloatHypotINTELILi41ELi43ELi42EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i41 %4, i32 20, i43 %5, i32 21, i32 22, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_41]] [[Hypot_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 6 Load [[Ty_43]] [[Hypot_BId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 11 ArbitraryFloatHypotINTEL [[Ty_42]] [[#]] [[Hypot_AId]] 20 [[Hypot_BId]] 21 22 0 2 1
 ; CHECK-LLVM: call i42 @intel_arbitrary_float_hypot.i42.i41.i43(i41 %[[#]], i32 20, i43 %[[#]], i32 21, i32 22, i32 0, i32 2, i32 1)
-  store i42 %9, i42* %3, align 8, !tbaa !59
-  %10 = bitcast i42* %3 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %10) #5
-  %11 = bitcast i43* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %11) #5
-  %12 = bitcast i41* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %12) #5
+  store i42 %6, ptr %3, align 8, !tbaa !59
+  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #5
+  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 8, ptr %1) #5
   ret void
 }
 
@@ -1026,20 +932,16 @@ define linkonce_odr dso_local spir_func void @_Z14ap_float_hypotILi20ELi20ELi21E
 define linkonce_odr dso_local spir_func void @_Z13ap_float_sqrtILi7ELi7ELi8ELi8EEvv() #3 {
   %1 = alloca i15, align 2
   %2 = alloca i17, align 4
-  %3 = bitcast i15* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %3) #5
-  %4 = bitcast i17* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %4) #5
-  %5 = load i15, i15* %1, align 2, !tbaa !21
-  %6 = call spir_func signext i17 @_Z31__spirv_ArbitraryFloatSqrtINTELILi15ELi17EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i15 signext %5, i32 7, i32 8, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #5
+  %3 = load i15, ptr %1, align 2, !tbaa !21
+  %4 = call spir_func signext i17 @_Z31__spirv_ArbitraryFloatSqrtINTELILi15ELi17EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i15 signext %3, i32 7, i32 8, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_15]] [[Sqrt_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 9 ArbitraryFloatSqrtINTEL [[Ty_17]] [[#]] [[Sqrt_AId]] 7 8 0 2 1
 ; CHECK-LLVM: call i17 @intel_arbitrary_float_sqrt.i17.i15(i15 %[[#]], i32 7, i32 8, i32 0, i32 2, i32 1)
-  store i17 %6, i17* %2, align 4, !tbaa !61
-  %7 = bitcast i17* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %7) #5
-  %8 = bitcast i15* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %8) #5
+  store i17 %4, ptr %2, align 4, !tbaa !61
+  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 2, ptr %1) #5
   ret void
 }
 
@@ -1047,20 +949,16 @@ define linkonce_odr dso_local spir_func void @_Z13ap_float_sqrtILi7ELi7ELi8ELi8E
 define linkonce_odr dso_local spir_func void @_Z12ap_float_logILi30ELi19ELi19ELi30EEvv() #3 {
   %1 = alloca i50, align 8
   %2 = alloca i50, align 8
-  %3 = bitcast i50* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %3) #5
-  %4 = bitcast i50* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %4) #5
-  %5 = load i50, i50* %1, align 8, !tbaa !63
-  %6 = call spir_func i50 @_Z30__spirv_ArbitraryFloatLogINTELILi50ELi50EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i50 %5, i32 19, i32 30, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #5
+  %3 = load i50, ptr %1, align 8, !tbaa !63
+  %4 = call spir_func i50 @_Z30__spirv_ArbitraryFloatLogINTELILi50ELi50EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i50 %3, i32 19, i32 30, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_50]] [[Log_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 9 ArbitraryFloatLogINTEL [[Ty_50]] [[#]] [[Log_AId]] 19 30 0 2 1
 ; CHECK-LLVM: call i50 @intel_arbitrary_float_log.i50.i50(i50 %[[#]], i32 19, i32 30, i32 0, i32 2, i32 1)
-  store i50 %6, i50* %2, align 8, !tbaa !63
-  %7 = bitcast i50* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %7) #5
-  %8 = bitcast i50* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %8) #5
+  store i50 %4, ptr %2, align 8, !tbaa !63
+  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 8, ptr %1) #5
   ret void
 }
 
@@ -1068,20 +966,16 @@ define linkonce_odr dso_local spir_func void @_Z12ap_float_logILi30ELi19ELi19ELi
 define linkonce_odr dso_local spir_func void @_Z13ap_float_log2ILi17ELi20ELi18ELi19EEvv() #3 {
   %1 = alloca i38, align 8
   %2 = alloca i38, align 8
-  %3 = bitcast i38* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %3) #5
-  %4 = bitcast i38* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %4) #5
-  %5 = load i38, i38* %1, align 8, !tbaa !65
-  %6 = call spir_func i38 @_Z31__spirv_ArbitraryFloatLog2INTELILi38ELi38EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i38 %5, i32 20, i32 19, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #5
+  %3 = load i38, ptr %1, align 8, !tbaa !65
+  %4 = call spir_func i38 @_Z31__spirv_ArbitraryFloatLog2INTELILi38ELi38EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i38 %3, i32 20, i32 19, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_38]] [[Log2_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 9 ArbitraryFloatLog2INTEL [[Ty_38]] [[#]] [[Log2_AId]] 20 19 0 2 1
 ; CHECK-LLVM: call i38 @intel_arbitrary_float_log2.i38.i38(i38 %[[#]], i32 20, i32 19, i32 0, i32 2, i32 1)
-  store i38 %6, i38* %2, align 8, !tbaa !65
-  %7 = bitcast i38* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %7) #5
-  %8 = bitcast i38* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %8) #5
+  store i38 %4, ptr %2, align 8, !tbaa !65
+  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 8, ptr %1) #5
   ret void
 }
 
@@ -1089,18 +983,16 @@ define linkonce_odr dso_local spir_func void @_Z13ap_float_log2ILi17ELi20ELi18EL
 define linkonce_odr dso_local spir_func void @_Z14ap_float_log10ILi4ELi3ELi4ELi5EEvv() #3 {
   %1 = alloca i8, align 1
   %2 = alloca i10, align 2
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %1) #5
-  %3 = bitcast i10* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %3) #5
-  %4 = load i8, i8* %1, align 1, !tbaa !67
-  %5 = call spir_func signext i10 @_Z32__spirv_ArbitraryFloatLog10INTELILi8ELi10EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i8 signext %4, i32 3, i32 5, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 1, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %2) #5
+  %3 = load i8, ptr %1, align 1, !tbaa !67
+  %4 = call spir_func signext i10 @_Z32__spirv_ArbitraryFloatLog10INTELILi8ELi10EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i8 signext %3, i32 3, i32 5, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_8]] [[Log10_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 9 ArbitraryFloatLog10INTEL [[Ty_10]] [[#]] [[Log10_AId]] 3 5 0 2 1
 ; CHECK-LLVM: call i10 @intel_arbitrary_float_log10.i10.i8(i8 %[[#]], i32 3, i32 5, i32 0, i32 2, i32 1)
-  store i10 %5, i10* %2, align 2, !tbaa !69
-  %6 = bitcast i10* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %6) #5
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %1) #5
+  store i10 %4, ptr %2, align 2, !tbaa !69
+  call void @llvm.lifetime.end.p0(i64 2, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 1, ptr %1) #5
   ret void
 }
 
@@ -1108,20 +1000,16 @@ define linkonce_odr dso_local spir_func void @_Z14ap_float_log10ILi4ELi3ELi4ELi5
 define linkonce_odr dso_local spir_func void @_Z14ap_float_log1pILi17ELi30ELi18ELi30EEvv() #3 {
   %1 = alloca i48, align 8
   %2 = alloca i49, align 8
-  %3 = bitcast i48* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %3) #5
-  %4 = bitcast i49* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %4) #5
-  %5 = load i48, i48* %1, align 8, !tbaa !71
-  %6 = call spir_func i49 @_Z32__spirv_ArbitraryFloatLog1pINTELILi48ELi49EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i48 %5, i32 30, i32 30, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #5
+  %3 = load i48, ptr %1, align 8, !tbaa !71
+  %4 = call spir_func i49 @_Z32__spirv_ArbitraryFloatLog1pINTELILi48ELi49EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i48 %3, i32 30, i32 30, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_48]] [[Log1p_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 9 ArbitraryFloatLog1pINTEL [[Ty_49]] [[#]] [[Log1p_AId]] 30 30 0 2 1
 ; CHECK-LLVM: call i49 @intel_arbitrary_float_log1p.i49.i48(i48 %[[#]], i32 30, i32 30, i32 0, i32 2, i32 1)
-  store i49 %6, i49* %2, align 8, !tbaa !73
-  %7 = bitcast i49* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %7) #5
-  %8 = bitcast i48* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %8) #5
+  store i49 %4, ptr %2, align 8, !tbaa !73
+  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 8, ptr %1) #5
   ret void
 }
 
@@ -1129,20 +1017,16 @@ define linkonce_odr dso_local spir_func void @_Z14ap_float_log1pILi17ELi30ELi18E
 define linkonce_odr dso_local spir_func void @_Z12ap_float_expILi16ELi25ELi16ELi25EEvv() #3 {
   %1 = alloca i42, align 8
   %2 = alloca i42, align 8
-  %3 = bitcast i42* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %3) #5
-  %4 = bitcast i42* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %4) #5
-  %5 = load i42, i42* %1, align 8, !tbaa !59
-  %6 = call spir_func i42 @_Z30__spirv_ArbitraryFloatExpINTELILi42ELi42EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i42 %5, i32 25, i32 25, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #5
+  %3 = load i42, ptr %1, align 8, !tbaa !59
+  %4 = call spir_func i42 @_Z30__spirv_ArbitraryFloatExpINTELILi42ELi42EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i42 %3, i32 25, i32 25, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_42]] [[Exp_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 9 ArbitraryFloatExpINTEL [[Ty_42]] [[#]] [[Exp_AId]] 25 25 0 2 1
 ; CHECK-LLVM: call i42 @intel_arbitrary_float_exp.i42.i42(i42 %[[#]], i32 25, i32 25, i32 0, i32 2, i32 1)
-  store i42 %6, i42* %2, align 8, !tbaa !59
-  %7 = bitcast i42* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %7) #5
-  %8 = bitcast i42* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %8) #5
+  store i42 %4, ptr %2, align 8, !tbaa !59
+  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 8, ptr %1) #5
   ret void
 }
 
@@ -1150,20 +1034,16 @@ define linkonce_odr dso_local spir_func void @_Z12ap_float_expILi16ELi25ELi16ELi
 define linkonce_odr dso_local spir_func void @_Z13ap_float_exp2ILi1ELi1ELi2ELi2EEvv() #3 {
   %1 = alloca i3, align 1
   %2 = alloca i5, align 1
-  %3 = bitcast i3* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %3) #5
-  %4 = bitcast i5* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %4) #5
-  %5 = load i3, i3* %1, align 1, !tbaa !75
-  %6 = call spir_func signext i5 @_Z31__spirv_ArbitraryFloatExp2INTELILi3ELi5EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i3 signext %5, i32 1, i32 2, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 1, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 1, ptr %2) #5
+  %3 = load i3, ptr %1, align 1, !tbaa !75
+  %4 = call spir_func signext i5 @_Z31__spirv_ArbitraryFloatExp2INTELILi3ELi5EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i3 signext %3, i32 1, i32 2, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_3]] [[Exp2_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 9 ArbitraryFloatExp2INTEL [[Ty_5]] [[#]] [[Exp2_AId]] 1 2 0 2 1
 ; CHECK-LLVM: call i5 @intel_arbitrary_float_exp2.i5.i3(i3 %[[#]], i32 1, i32 2, i32 0, i32 2, i32 1)
-  store i5 %6, i5* %2, align 1, !tbaa !41
-  %7 = bitcast i5* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %7) #5
-  %8 = bitcast i3* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %8) #5
+  store i5 %4, ptr %2, align 1, !tbaa !41
+  call void @llvm.lifetime.end.p0(i64 1, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 1, ptr %1) #5
   ret void
 }
 
@@ -1171,20 +1051,16 @@ define linkonce_odr dso_local spir_func void @_Z13ap_float_exp2ILi1ELi1ELi2ELi2E
 define linkonce_odr dso_local spir_func void @_Z14ap_float_exp10ILi8ELi16ELi8ELi16EEvv() #3 {
   %1 = alloca i25, align 4
   %2 = alloca i25, align 4
-  %3 = bitcast i25* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %3) #5
-  %4 = bitcast i25* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %4) #5
-  %5 = load i25, i25* %1, align 4, !tbaa !13
-  %6 = call spir_func signext i25 @_Z32__spirv_ArbitraryFloatExp10INTELILi25ELi25EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i25 signext %5, i32 16, i32 16, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #5
+  %3 = load i25, ptr %1, align 4, !tbaa !13
+  %4 = call spir_func signext i25 @_Z32__spirv_ArbitraryFloatExp10INTELILi25ELi25EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i25 signext %3, i32 16, i32 16, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_25]] [[Exp10_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 9 ArbitraryFloatExp10INTEL [[Ty_25]] [[#]] [[Exp10_AId]] 16 16 0 2 1
 ; CHECK-LLVM: call i25 @intel_arbitrary_float_exp10.i25.i25(i25 %[[#]], i32 16, i32 16, i32 0, i32 2, i32 1)
-  store i25 %6, i25* %2, align 4, !tbaa !13
-  %7 = bitcast i25* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %7) #5
-  %8 = bitcast i25* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %8) #5
+  store i25 %4, ptr %2, align 4, !tbaa !13
+  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #5
   ret void
 }
 
@@ -1192,20 +1068,16 @@ define linkonce_odr dso_local spir_func void @_Z14ap_float_exp10ILi8ELi16ELi8ELi
 define linkonce_odr dso_local spir_func void @_Z14ap_float_expm1ILi21ELi42ELi20ELi41EEvv() #3 {
   %1 = alloca i64, align 8
   %2 = alloca i62, align 8
-  %3 = bitcast i64* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %3) #5
-  %4 = bitcast i62* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %4) #5
-  %5 = load i64, i64* %1, align 8, !tbaa !77
-  %6 = call spir_func i62 @_Z32__spirv_ArbitraryFloatExpm1INTELILi64ELi62EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i64 %5, i32 42, i32 41, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #5
+  %3 = load i64, ptr %1, align 8, !tbaa !77
+  %4 = call spir_func i62 @_Z32__spirv_ArbitraryFloatExpm1INTELILi64ELi62EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i64 %3, i32 42, i32 41, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_64]] [[Expm1_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 9 ArbitraryFloatExpm1INTEL [[Ty_62]] [[#]] [[Expm1_AId]] 42 41 0 2 1
 ; CHECK-LLVM: call i62 @intel_arbitrary_float_expm1.i62.i64(i64 %[[#]], i32 42, i32 41, i32 0, i32 2, i32 1)
-  store i62 %6, i62* %2, align 8, !tbaa !79
-  %7 = bitcast i62* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %7) #5
-  %8 = bitcast i64* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %8) #5
+  store i62 %4, ptr %2, align 8, !tbaa !79
+  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 8, ptr %1) #5
   ret void
 }
 
@@ -1213,20 +1085,16 @@ define linkonce_odr dso_local spir_func void @_Z14ap_float_expm1ILi21ELi42ELi20E
 define linkonce_odr dso_local spir_func void @_Z12ap_float_sinILi14ELi15ELi16ELi17EEvv() #3 {
   %1 = alloca i30, align 4
   %2 = alloca i34, align 8
-  %3 = bitcast i30* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %3) #5
-  %4 = bitcast i34* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %4) #5
-  %5 = load i30, i30* %1, align 4, !tbaa !17
-  %6 = call spir_func i34 @_Z30__spirv_ArbitraryFloatSinINTELILi30ELi34EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i30 signext %5, i32 15, i32 17, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #5
+  %3 = load i30, ptr %1, align 4, !tbaa !17
+  %4 = call spir_func i34 @_Z30__spirv_ArbitraryFloatSinINTELILi30ELi34EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i30 signext %3, i32 15, i32 17, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_30]] [[Sin_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 9 ArbitraryFloatSinINTEL [[Ty_34]] [[#]] [[Sin_AId]] 15 17 0 2 1
 ; CHECK-LLVM: call i34 @intel_arbitrary_float_sin.i34.i30(i30 %[[#]], i32 15, i32 17, i32 0, i32 2, i32 1)
-  store i34 %6, i34* %2, align 8, !tbaa !53
-  %7 = bitcast i34* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %7) #5
-  %8 = bitcast i30* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %8) #5
+  store i34 %4, ptr %2, align 8, !tbaa !53
+  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #5
   ret void
 }
 
@@ -1234,20 +1102,16 @@ define linkonce_odr dso_local spir_func void @_Z12ap_float_sinILi14ELi15ELi16ELi
 define linkonce_odr dso_local spir_func void @_Z12ap_float_cosILi1ELi2ELi2ELi1EEvv() #3 {
   %1 = alloca i4, align 1
   %2 = alloca i4, align 1
-  %3 = bitcast i4* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %3) #5
-  %4 = bitcast i4* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %4) #5
-  %5 = load i4, i4* %1, align 1, !tbaa !81
-  %6 = call spir_func signext i4 @_Z30__spirv_ArbitraryFloatCosINTELILi4ELi4EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i4 signext %5, i32 2, i32 1, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 1, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 1, ptr %2) #5
+  %3 = load i4, ptr %1, align 1, !tbaa !81
+  %4 = call spir_func signext i4 @_Z30__spirv_ArbitraryFloatCosINTELILi4ELi4EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i4 signext %3, i32 2, i32 1, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_4]] [[Cos_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 9 ArbitraryFloatCosINTEL [[Ty_4]] [[#]] [[Cos_AId]] 2 1 0 2 1
 ; CHECK-LLVM: call i4 @intel_arbitrary_float_cos.i4.i4(i4 %[[#]], i32 2, i32 1, i32 0, i32 2, i32 1)
-  store i4 %6, i4* %2, align 1, !tbaa !81
-  %7 = bitcast i4* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %7) #5
-  %8 = bitcast i4* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %8) #5
+  store i4 %4, ptr %2, align 1, !tbaa !81
+  call void @llvm.lifetime.end.p0(i64 1, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 1, ptr %1) #5
   ret void
 }
 
@@ -1255,20 +1119,16 @@ define linkonce_odr dso_local spir_func void @_Z12ap_float_cosILi1ELi2ELi2ELi1EE
 define linkonce_odr dso_local spir_func void @_Z15ap_float_sincosILi8ELi18ELi10ELi20EEvv() #3 {
   %1 = alloca i27, align 4
   %2 = alloca i62, align 8
-  %3 = bitcast i27* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %3) #5
-  %4 = bitcast i62* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %4) #5
-  %5 = load i27, i27* %1, align 4, !tbaa !83
-  %6 = call spir_func i62 @_Z33__spirv_ArbitraryFloatSinCosINTELILi27ELi31EEU7_ExtIntIXmlLi2ET0_EEiU7_ExtIntIXT_EEiiiiii(i27 signext %5, i32 18, i32 20, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #5
+  %3 = load i27, ptr %1, align 4, !tbaa !83
+  %4 = call spir_func i62 @_Z33__spirv_ArbitraryFloatSinCosINTELILi27ELi31EEU7_ExtIntIXmlLi2ET0_EEiU7_ExtIntIXT_EEiiiiii(i27 signext %3, i32 18, i32 20, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_27]] [[SinCos_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 9 ArbitraryFloatSinCosINTEL [[Ty_62]] [[#]] [[SinCos_AId]] 18 20 0 2 1
 ; CHECK-LLVM: call i62 @intel_arbitrary_float_sincos.i62.i27(i27 %[[#]], i32 18, i32 20, i32 0, i32 2, i32 1)
-  store i62 %6, i62* %2, align 8, !tbaa !79
-  %7 = bitcast i62* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %7) #5
-  %8 = bitcast i27* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %8) #5
+  store i62 %4, ptr %2, align 8, !tbaa !79
+  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #5
   ret void
 }
 
@@ -1276,20 +1136,16 @@ define linkonce_odr dso_local spir_func void @_Z15ap_float_sincosILi8ELi18ELi10E
 define linkonce_odr dso_local spir_func void @_Z14ap_float_sinpiILi3ELi6ELi6ELi6EEvv() #3 {
   %1 = alloca i10, align 2
   %2 = alloca i13, align 2
-  %3 = bitcast i10* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %3) #5
-  %4 = bitcast i13* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %4) #5
-  %5 = load i10, i10* %1, align 2, !tbaa !69
-  %6 = call spir_func signext i13 @_Z32__spirv_ArbitraryFloatSinPiINTELILi10ELi13EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i10 signext %5, i32 6, i32 6, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %2) #5
+  %3 = load i10, ptr %1, align 2, !tbaa !69
+  %4 = call spir_func signext i13 @_Z32__spirv_ArbitraryFloatSinPiINTELILi10ELi13EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i10 signext %3, i32 6, i32 6, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_10]] [[SinPi_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 9 ArbitraryFloatSinPiINTEL [[Ty_13]] [[#]] [[SinPi_AId]] 6 6 0 2 1
 ; CHECK-LLVM: call i13 @intel_arbitrary_float_sinpi.i13.i10(i10 %[[#]], i32 6, i32 6, i32 0, i32 2, i32 1)
-  store i13 %6, i13* %2, align 2, !tbaa !19
-  %7 = bitcast i13* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %7) #5
-  %8 = bitcast i10* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %8) #5
+  store i13 %4, ptr %2, align 2, !tbaa !19
+  call void @llvm.lifetime.end.p0(i64 2, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 2, ptr %1) #5
   ret void
 }
 
@@ -1297,20 +1153,16 @@ define linkonce_odr dso_local spir_func void @_Z14ap_float_sinpiILi3ELi6ELi6ELi6
 define linkonce_odr dso_local spir_func void @_Z14ap_float_cospiILi18ELi40ELi18ELi40EEvv() #3 {
   %1 = alloca i59, align 8
   %2 = alloca i59, align 8
-  %3 = bitcast i59* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %3) #5
-  %4 = bitcast i59* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %4) #5
-  %5 = load i59, i59* %1, align 8, !tbaa !85
-  %6 = call spir_func i59 @_Z32__spirv_ArbitraryFloatCosPiINTELILi59ELi59EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i59 %5, i32 40, i32 40, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #5
+  %3 = load i59, ptr %1, align 8, !tbaa !85
+  %4 = call spir_func i59 @_Z32__spirv_ArbitraryFloatCosPiINTELILi59ELi59EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i59 %3, i32 40, i32 40, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_59]] [[CosPi_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 9 ArbitraryFloatCosPiINTEL [[Ty_59]] [[#]] [[CosPi_AId]] 40 40 0 2 1
 ; CHECK-LLVM: call i59 @intel_arbitrary_float_cospi.i59.i59(i59 %[[#]], i32 40, i32 40, i32 0, i32 2, i32 1)
-  store i59 %6, i59* %2, align 8, !tbaa !85
-  %7 = bitcast i59* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %7) #5
-  %8 = bitcast i59* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %8) #5
+  store i59 %4, ptr %2, align 8, !tbaa !85
+  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 8, ptr %1) #5
   ret void
 }
 
@@ -1318,20 +1170,16 @@ define linkonce_odr dso_local spir_func void @_Z14ap_float_cospiILi18ELi40ELi18E
 define linkonce_odr dso_local spir_func void @_Z17ap_float_sincospiILi9ELi20ELi11ELi20EEvv() #3 {
   %1 = alloca i30, align 4
   %2 = alloca i64, align 8
-  %3 = bitcast i30* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %3) #5
-  %4 = bitcast i64* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %4) #5
-  %5 = load i30, i30* %1, align 4, !tbaa !17
-  %6 = call spir_func i64 @_Z35__spirv_ArbitraryFloatSinCosPiINTELILi30ELi32EEU7_ExtIntIXmlLi2ET0_EEiU7_ExtIntIXT_EEiiiiii(i30 signext %5, i32 20, i32 20, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #5
+  %3 = load i30, ptr %1, align 4, !tbaa !17
+  %4 = call spir_func i64 @_Z35__spirv_ArbitraryFloatSinCosPiINTELILi30ELi32EEU7_ExtIntIXmlLi2ET0_EEiU7_ExtIntIXT_EEiiiiii(i30 signext %3, i32 20, i32 20, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_30]] [[SinCosPi_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 9 ArbitraryFloatSinCosPiINTEL [[Ty_64]] [[#]] [[SinCosPi_AId]] 20 20 0 2 1
 ; CHECK-LLVM: call i64 @intel_arbitrary_float_sincospi.i64.i30(i30 %[[#]], i32 20, i32 20, i32 0, i32 2, i32 1)
-  store i64 %6, i64* %2, align 8, !tbaa !77
-  %7 = bitcast i64* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %7) #5
-  %8 = bitcast i30* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %8) #5
+  store i64 %4, ptr %2, align 8, !tbaa !77
+  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #5
   ret void
 }
 
@@ -1339,20 +1187,16 @@ define linkonce_odr dso_local spir_func void @_Z17ap_float_sincospiILi9ELi20ELi1
 define linkonce_odr dso_local spir_func void @_Z13ap_float_asinILi2ELi4ELi2ELi8EEvv() #3 {
   %1 = alloca i7, align 1
   %2 = alloca i11, align 2
-  %3 = bitcast i7* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %3) #5
-  %4 = bitcast i11* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %4) #5
-  %5 = load i7, i7* %1, align 1, !tbaa !43
-  %6 = call spir_func signext i11 @_Z31__spirv_ArbitraryFloatASinINTELILi7ELi11EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i7 signext %5, i32 4, i32 8, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 1, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %2) #5
+  %3 = load i7, ptr %1, align 1, !tbaa !43
+  %4 = call spir_func signext i11 @_Z31__spirv_ArbitraryFloatASinINTELILi7ELi11EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i7 signext %3, i32 4, i32 8, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_7]] [[ASin_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 9 ArbitraryFloatASinINTEL [[Ty_11]] [[#]] [[ASin_AId]] 4 8 0 2 1
 ; CHECK-LLVM: call i11 @intel_arbitrary_float_asin.i11.i7(i7 %[[#]], i32 4, i32 8, i32 0, i32 2, i32 1)
-  store i11 %6, i11* %2, align 2, !tbaa !27
-  %7 = bitcast i11* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %7) #5
-  %8 = bitcast i7* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %8) #5
+  store i11 %4, ptr %2, align 2, !tbaa !27
+  call void @llvm.lifetime.end.p0(i64 2, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 1, ptr %1) #5
   ret void
 }
 
@@ -1360,20 +1204,16 @@ define linkonce_odr dso_local spir_func void @_Z13ap_float_asinILi2ELi4ELi2ELi8E
 define linkonce_odr dso_local spir_func void @_Z15ap_float_asinpiILi11ELi23ELi11ELi23EEvv() #3 {
   %1 = alloca i35, align 8
   %2 = alloca i35, align 8
-  %3 = bitcast i35* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %3) #5
-  %4 = bitcast i35* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %4) #5
-  %5 = load i35, i35* %1, align 8, !tbaa !87
-  %6 = call spir_func i35 @_Z33__spirv_ArbitraryFloatASinPiINTELILi35ELi35EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i35 %5, i32 23, i32 23, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #5
+  %3 = load i35, ptr %1, align 8, !tbaa !87
+  %4 = call spir_func i35 @_Z33__spirv_ArbitraryFloatASinPiINTELILi35ELi35EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i35 %3, i32 23, i32 23, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_35]] [[ASinPi_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 9 ArbitraryFloatASinPiINTEL [[Ty_35]] [[#]] [[ASinPi_AId]] 23 23 0 2 1
 ; CHECK-LLVM: call i35 @intel_arbitrary_float_asinpi.i35.i35(i35 %[[#]], i32 23, i32 23, i32 0, i32 2, i32 1)
-  store i35 %6, i35* %2, align 8, !tbaa !87
-  %7 = bitcast i35* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %7) #5
-  %8 = bitcast i35* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %8) #5
+  store i35 %4, ptr %2, align 8, !tbaa !87
+  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 8, ptr %1) #5
   ret void
 }
 
@@ -1381,20 +1221,16 @@ define linkonce_odr dso_local spir_func void @_Z15ap_float_asinpiILi11ELi23ELi11
 define linkonce_odr dso_local spir_func void @_Z13ap_float_acosILi4ELi9ELi3ELi10EEvv() #3 {
   %1 = alloca i14, align 2
   %2 = alloca i14, align 2
-  %3 = bitcast i14* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %3) #5
-  %4 = bitcast i14* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %4) #5
-  %5 = load i14, i14* %1, align 2, !tbaa !23
-  %6 = call spir_func signext i14 @_Z31__spirv_ArbitraryFloatACosINTELILi14ELi14EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i14 signext %5, i32 9, i32 10, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %2) #5
+  %3 = load i14, ptr %1, align 2, !tbaa !23
+  %4 = call spir_func signext i14 @_Z31__spirv_ArbitraryFloatACosINTELILi14ELi14EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i14 signext %3, i32 9, i32 10, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_14]] [[ACos_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 9 ArbitraryFloatACosINTEL [[Ty_14]] [[#]] [[ACos_AId]] 9 10 0 2 1
 ; CHECK-LLVM: call i14 @intel_arbitrary_float_acos.i14.i14(i14 %[[#]], i32 9, i32 10, i32 0, i32 2, i32 1)
-  store i14 %6, i14* %2, align 2, !tbaa !23
-  %7 = bitcast i14* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %7) #5
-  %8 = bitcast i14* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %8) #5
+  store i14 %4, ptr %2, align 2, !tbaa !23
+  call void @llvm.lifetime.end.p0(i64 2, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 2, ptr %1) #5
   ret void
 }
 
@@ -1402,16 +1238,16 @@ define linkonce_odr dso_local spir_func void @_Z13ap_float_acosILi4ELi9ELi3ELi10
 define linkonce_odr dso_local spir_func void @_Z15ap_float_acospiILi2ELi5ELi3ELi4EEvv() #3 {
   %1 = alloca i8, align 1
   %2 = alloca i8, align 1
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %1) #5
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %2) #5
-  %3 = load i8, i8* %1, align 1, !tbaa !67
+  call void @llvm.lifetime.start.p0(i64 1, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 1, ptr %2) #5
+  %3 = load i8, ptr %1, align 1, !tbaa !67
   %4 = call spir_func signext i8 @_Z33__spirv_ArbitraryFloatACosPiINTELILi8ELi8EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i8 signext %3, i32 5, i32 4, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_8]] [[ACosPi_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 9 ArbitraryFloatACosPiINTEL [[Ty_8]] [[#]] [[ACosPi_AId]] 5 4 0 2 1
 ; CHECK-LLVM: call i8 @intel_arbitrary_float_acospi.i8.i8(i8 %[[#]], i32 5, i32 4, i32 0, i32 2, i32 1)
-  store i8 %4, i8* %2, align 1, !tbaa !67
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %2) #5
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %1) #5
+  store i8 %4, ptr %2, align 1, !tbaa !67
+  call void @llvm.lifetime.end.p0(i64 1, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 1, ptr %1) #5
   ret void
 }
 
@@ -1419,20 +1255,16 @@ define linkonce_odr dso_local spir_func void @_Z15ap_float_acospiILi2ELi5ELi3ELi
 define linkonce_odr dso_local spir_func void @_Z13ap_float_atanILi12ELi31ELi12ELi31EEvv() #3 {
   %1 = alloca i44, align 8
   %2 = alloca i44, align 8
-  %3 = bitcast i44* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %3) #5
-  %4 = bitcast i44* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %4) #5
-  %5 = load i44, i44* %1, align 8, !tbaa !89
-  %6 = call spir_func i44 @_Z31__spirv_ArbitraryFloatATanINTELILi44ELi44EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i44 %5, i32 31, i32 31, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #5
+  %3 = load i44, ptr %1, align 8, !tbaa !89
+  %4 = call spir_func i44 @_Z31__spirv_ArbitraryFloatATanINTELILi44ELi44EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i44 %3, i32 31, i32 31, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_44]] [[ATan_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 9 ArbitraryFloatATanINTEL [[Ty_44]] [[#]] [[ATan_AId]] 31 31 0 2 1
 ; CHECK-LLVM: call i44 @intel_arbitrary_float_atan.i44.i44(i44 %[[#]], i32 31, i32 31, i32 0, i32 2, i32 1)
-  store i44 %6, i44* %2, align 8, !tbaa !89
-  %7 = bitcast i44* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %7) #5
-  %8 = bitcast i44* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %8) #5
+  store i44 %4, ptr %2, align 8, !tbaa !89
+  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 8, ptr %1) #5
   ret void
 }
 
@@ -1440,20 +1272,16 @@ define linkonce_odr dso_local spir_func void @_Z13ap_float_atanILi12ELi31ELi12EL
 define linkonce_odr dso_local spir_func void @_Z15ap_float_atanpiILi1ELi38ELi1ELi32EEvv() #3 {
   %1 = alloca i40, align 8
   %2 = alloca i34, align 8
-  %3 = bitcast i40* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %3) #5
-  %4 = bitcast i34* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %4) #5
-  %5 = load i40, i40* %1, align 8, !tbaa !9
-  %6 = call spir_func i34 @_Z33__spirv_ArbitraryFloatATanPiINTELILi40ELi34EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i40 %5, i32 38, i32 32, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #5
+  %3 = load i40, ptr %1, align 8, !tbaa !9
+  %4 = call spir_func i34 @_Z33__spirv_ArbitraryFloatATanPiINTELILi40ELi34EEU7_ExtIntIXT0_EEiU7_ExtIntIXT_EEiiiiii(i40 %3, i32 38, i32 32, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_40]] [[ATanPi_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 9 ArbitraryFloatATanPiINTEL [[Ty_34]] [[#]] [[ATanPi_AId]] 38 32 0 2 1
 ; CHECK-LLVM: call i34 @intel_arbitrary_float_atanpi.i34.i40(i40 %[[#]], i32 38, i32 32, i32 0, i32 2, i32 1)
-  store i34 %6, i34* %2, align 8, !tbaa !53
-  %7 = bitcast i34* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %7) #5
-  %8 = bitcast i40* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %8) #5
+  store i34 %4, ptr %2, align 8, !tbaa !53
+  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 8, ptr %1) #5
   ret void
 }
 
@@ -1462,26 +1290,20 @@ define linkonce_odr dso_local spir_func void @_Z14ap_float_atan2ILi7ELi16ELi7ELi
   %1 = alloca i24, align 4
   %2 = alloca i25, align 4
   %3 = alloca i27, align 4
-  %4 = bitcast i24* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %4) #5
-  %5 = bitcast i25* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %5) #5
-  %6 = bitcast i27* %3 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %6) #5
-  %7 = load i24, i24* %1, align 4, !tbaa !91
-  %8 = load i25, i25* %2, align 4, !tbaa !13
-  %9 = call spir_func signext i27 @_Z32__spirv_ArbitraryFloatATan2INTELILi24ELi25ELi27EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i24 signext %7, i32 16, i25 signext %8, i32 17, i32 18, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #5
+  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #5
+  %4 = load i24, ptr %1, align 4, !tbaa !91
+  %5 = load i25, ptr %2, align 4, !tbaa !13
+  %6 = call spir_func signext i27 @_Z32__spirv_ArbitraryFloatATan2INTELILi24ELi25ELi27EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i24 signext %4, i32 16, i25 signext %5, i32 17, i32 18, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_24]] [[ATan2_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 6 Load [[Ty_25]] [[ATan2_BId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 11 ArbitraryFloatATan2INTEL [[Ty_27]] [[#]] [[ATan2_AId]] 16 [[ATan2_BId]] 17 18 0 2 1
 ; CHECK-LLVM: call i27 @intel_arbitrary_float_atan2.i27.i24.i25(i24 %[[#]], i32 16, i25 %[[#]], i32 17, i32 18, i32 0, i32 2, i32 1)
-  store i27 %9, i27* %3, align 4, !tbaa !83
-  %10 = bitcast i27* %3 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %10) #5
-  %11 = bitcast i25* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %11) #5
-  %12 = bitcast i24* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %12) #5
+  store i27 %6, ptr %3, align 4, !tbaa !83
+  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #5
   ret void
 }
 
@@ -1490,26 +1312,20 @@ define linkonce_odr dso_local spir_func void @_Z12ap_float_powILi8ELi8ELi9ELi9EL
   %1 = alloca i17, align 4
   %2 = alloca i19, align 4
   %3 = alloca i21, align 4
-  %4 = bitcast i17* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %4) #5
-  %5 = bitcast i19* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %5) #5
-  %6 = bitcast i21* %3 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %6) #5
-  %7 = load i17, i17* %1, align 4, !tbaa !61
-  %8 = load i19, i19* %2, align 4, !tbaa !93
-  %9 = call spir_func signext i21 @_Z30__spirv_ArbitraryFloatPowINTELILi17ELi19ELi21EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i17 signext %7, i32 8, i19 signext %8, i32 9, i32 10, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #5
+  call void @llvm.lifetime.start.p0(i64 4, ptr %3) #5
+  %4 = load i17, ptr %1, align 4, !tbaa !61
+  %5 = load i19, ptr %2, align 4, !tbaa !93
+  %6 = call spir_func signext i21 @_Z30__spirv_ArbitraryFloatPowINTELILi17ELi19ELi21EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i17 signext %4, i32 8, i19 signext %5, i32 9, i32 10, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_17]] [[Pow_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 6 Load [[Ty_19]] [[Pow_BId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 11 ArbitraryFloatPowINTEL [[Ty_21]] [[#]] [[Pow_AId]] 8 [[Pow_BId]] 9 10 0 2 1
 ; CHECK-LLVM: call i21 @intel_arbitrary_float_pow.i21.i17.i19(i17 %[[#]], i32 8, i19 %[[#]], i32 9, i32 10, i32 0, i32 2, i32 1)
-  store i21 %9, i21* %3, align 4, !tbaa !95
-  %10 = bitcast i21* %3 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %10) #5
-  %11 = bitcast i19* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %11) #5
-  %12 = bitcast i17* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %12) #5
+  store i21 %6, ptr %3, align 4, !tbaa !95
+  call void @llvm.lifetime.end.p0(i64 4, ptr %3) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #5
   ret void
 }
 
@@ -1518,26 +1334,20 @@ define linkonce_odr dso_local spir_func void @_Z13ap_float_powrILi18ELi35ELi19EL
   %1 = alloca i54, align 8
   %2 = alloca i55, align 8
   %3 = alloca i56, align 8
-  %4 = bitcast i54* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %4) #5
-  %5 = bitcast i55* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %5) #5
-  %6 = bitcast i56* %3 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %6) #5
-  %7 = load i54, i54* %1, align 8, !tbaa !97
-  %8 = load i55, i55* %2, align 8, !tbaa !45
-  %9 = call spir_func i56 @_Z31__spirv_ArbitraryFloatPowRINTELILi54ELi55ELi56EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i54 %7, i32 35, i55 %8, i32 35, i32 35, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %2) #5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %3) #5
+  %4 = load i54, ptr %1, align 8, !tbaa !97
+  %5 = load i55, ptr %2, align 8, !tbaa !45
+  %6 = call spir_func i56 @_Z31__spirv_ArbitraryFloatPowRINTELILi54ELi55ELi56EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i54 %4, i32 35, i55 %5, i32 35, i32 35, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_54]] [[PowR_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 6 Load [[Ty_55]] [[PowR_BId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 11 ArbitraryFloatPowRINTEL [[Ty_56]] [[#]] [[PowR_AId]] 35 [[PowR_BId]] 35 35 0 2 1
 ; CHECK-LLVM: call i56 @intel_arbitrary_float_powr.i56.i54.i55(i54 %[[#]], i32 35, i55 %[[#]], i32 35, i32 35, i32 0, i32 2, i32 1)
-  store i56 %9, i56* %3, align 8, !tbaa !99
-  %10 = bitcast i56* %3 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %10) #5
-  %11 = bitcast i55* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %11) #5
-  %12 = bitcast i54* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %12) #5
+  store i56 %6, ptr %3, align 8, !tbaa !99
+  call void @llvm.lifetime.end.p0(i64 8, ptr %3) #5
+  call void @llvm.lifetime.end.p0(i64 8, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 8, ptr %1) #5
   ret void
 }
 
@@ -1546,51 +1356,41 @@ define linkonce_odr dso_local spir_func void @_Z13ap_float_pownILi4ELi7ELi10ELi5
   %1 = alloca i12, align 2
   %2 = alloca i10, align 2
   %3 = alloca i15, align 2
-  %4 = bitcast i12* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %4) #5
-  %5 = bitcast i10* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %5) #5
-  %6 = bitcast i15* %3 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %6) #5
-  %7 = load i12, i12* %1, align 2, !tbaa !101
-  %8 = load i10, i10* %2, align 2, !tbaa !69
-  %9 = call spir_func signext i15 @_Z31__spirv_ArbitraryFloatPowNINTELILi12ELi10ELi15EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiii(i12 signext %7, i32 7, i10 signext %8, i1 zeroext false, i32 9, i32 0, i32 2, i32 1) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %2) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %3) #5
+  %4 = load i12, ptr %1, align 2, !tbaa !101
+  %5 = load i10, ptr %2, align 2, !tbaa !69
+  %6 = call spir_func signext i15 @_Z31__spirv_ArbitraryFloatPowNINTELILi12ELi10ELi15EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiii(i12 signext %4, i32 7, i10 signext %5, i1 zeroext false, i32 9, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_12]] [[PowN_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 6 Load [[Ty_10]] [[PowN_BId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 11 ArbitraryFloatPowNINTEL [[Ty_15]] [[#]] [[PowN_AId]] 7 [[PowN_BId]] 0 9 0 2 1
 ; CHECK-LLVM: call i15 @intel_arbitrary_float_pown.i15.i12.i10(i12 %[[#]], i32 7, i10 %[[#]], i1 false, i32 9, i32 0, i32 2, i32 1)
-  store i15 %9, i15* %3, align 2, !tbaa !21
-  %10 = bitcast i15* %3 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %10) #5
-  %11 = bitcast i10* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %11) #5
-  %12 = bitcast i12* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %12) #5
+  store i15 %6, ptr %3, align 2, !tbaa !21
+  call void @llvm.lifetime.end.p0(i64 2, ptr %3) #5
+  call void @llvm.lifetime.end.p0(i64 2, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 2, ptr %1) #5
   ret void
 }
 
 ; Function Attrs: norecurse nounwind
 define linkonce_odr dso_local spir_func void @_Z15ap_float_sincosILi8ELi18ELi10ELi20EEvv_() #3 {
   %1 = alloca i34, align 8
-  %2 = addrspacecast i34* %1 to i34 addrspace(4)*
+  %2 = addrspacecast ptr %1 to ptr addrspace(4)
   %3 = alloca i66, align 8
-  %4 = addrspacecast i66* %3 to i66 addrspace(4)*
-  %5 = bitcast i34* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %5)
-  %6 = bitcast i66* %3 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 16, i8* %6)
-  %7 = load i34, i34 addrspace(4)* %2, align 8
-  call spir_func void @_Z33__spirv_ArbitraryFloatSinCosINTELILi34ELi66EEU7_ExtIntIXmlLi2ET0_EEiU7_ExtIntIXT_EEiiiiii(i66 addrspace(4)* sret(i66) align 8 %4, i34 %7, i32 18, i32 20, i32 0, i32 2, i32 1) #5
+  %4 = addrspacecast ptr %3 to ptr addrspace(4)
+  call void @llvm.lifetime.start.p0(i64 8, ptr %1)
+  call void @llvm.lifetime.start.p0(i64 16, ptr %3)
+  %5 = load i34, ptr addrspace(4) %2, align 8
+  call spir_func void @_Z33__spirv_ArbitraryFloatSinCosINTELILi34ELi66EEU7_ExtIntIXmlLi2ET0_EEiU7_ExtIntIXT_EEiiiiii(ptr addrspace(4) sret(i66) align 8 %4, i34 %5, i32 18, i32 20, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_34]] [[SinCos_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 9 ArbitraryFloatSinCosINTEL [[Ty_66]] [[SinCos_ResultId:[0-9]+]] [[SinCos_AId]] 18 20 0 2 1
 ; CHECK-SPIRV: 3 Store [[#]] [[SinCos_ResultId]]
 ; CHECK-LLVM: call void @intel_arbitrary_float_sincos.i66.i34(ptr addrspace(4) sret(i66) %[[#]], i34 %[[#]], i32 18, i32 20, i32 0, i32 2, i32 1)
-  %8 = load i66, i66 addrspace(4)* %4, align 8
-  store i66 %8, i66 addrspace(4)* %4, align 8
-  %9 = bitcast i34* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %9)
-  %10 = bitcast i66* %3 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 16, i8* %10)
+  %6 = load i66, ptr addrspace(4) %4, align 8
+  store i66 %6, ptr addrspace(4) %4, align 8
+  call void @llvm.lifetime.end.p0(i64 8, ptr %1)
+  call void @llvm.lifetime.end.p0(i64 16, ptr %3)
   ret void
 }
 
@@ -1599,29 +1399,23 @@ define linkonce_odr dso_local spir_func void @_Z14ap_float_atan2ILi7ELi16ELi7ELi
   %1 = alloca i24, align 4
   %2 = alloca i25, align 4
   %3 = alloca i66, align 8
-  %4 = addrspacecast i66* %3 to i66 addrspace(4)*
-  %5 = bitcast i24* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %5) #5
-  %6 = bitcast i25* %2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %6) #5
-  %7 = bitcast i66* %3 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 16, i8* %7) #5
-  %8 = load i24, i24* %1, align 4, !tbaa !91
-  %9 = load i25, i25* %2, align 4, !tbaa !13
-  call spir_func void @_Z32__spirv_ArbitraryFloatATan2INTELILi24ELi25ELi66EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i66 addrspace(4)* sret(i66) align 8 %4, i24 signext %8, i32 16, i25 signext %9, i32 17, i32 18, i32 0, i32 2, i32 1) #5
+  %4 = addrspacecast ptr %3 to ptr addrspace(4)
+  call void @llvm.lifetime.start.p0(i64 4, ptr %1) #5
+  call void @llvm.lifetime.start.p0(i64 4, ptr %2) #5
+  call void @llvm.lifetime.start.p0(i64 16, ptr %3) #5
+  %5 = load i24, ptr %1, align 4, !tbaa !91
+  %6 = load i25, ptr %2, align 4, !tbaa !13
+  call spir_func void @_Z32__spirv_ArbitraryFloatATan2INTELILi24ELi25ELi66EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(ptr addrspace(4) sret(i66) align 8 %4, i24 signext %5, i32 16, i25 signext %6, i32 17, i32 18, i32 0, i32 2, i32 1) #5
 ; CHECK-SPIRV: 6 Load [[Ty_24]] [[ATan2_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 6 Load [[Ty_25]] [[ATan2_BId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 11 ArbitraryFloatATan2INTEL [[Ty_66]] [[ATan2_ResultId:[0-9]+]] [[ATan2_AId]] 16 [[ATan2_BId]] 17 18 0 2 1
 ; CHECK-SPIRV: 3 Store [[#]] [[ATan2_ResultId]]
 ; CHECK-LLVM: call void @intel_arbitrary_float_atan2.i66.i24.i25(ptr addrspace(4) sret(i66) %[[#]], i24 %[[#]], i32 16, i25 %[[#]], i32 17, i32 18, i32 0, i32 2, i32 1)
-  %10 = load i66, i66 addrspace(4)* %4, align 8
-  store i66 %10, i66 addrspace(4)* %4, align 8
-  %11 = bitcast i66* %3 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 16, i8* %11) #5
-  %12 = bitcast i25* %2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %12) #5
-  %13 = bitcast i24* %1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %13) #5
+  %7 = load i66, ptr addrspace(4) %4, align 8
+  store i66 %7, ptr addrspace(4) %4, align 8
+  call void @llvm.lifetime.end.p0(i64 16, ptr %3) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %2) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %1) #5
   ret void
 }
 
@@ -1629,35 +1423,29 @@ define linkonce_odr dso_local spir_func void @_Z14ap_float_atan2ILi7ELi16ELi7ELi
 define linkonce_odr dso_local spir_func void @_Z13ap_float_pownILi64ELi7ELi10ELi5ELi9EEvv() #3 {
 entry:
   %A = alloca i72, align 8
-  %A.ascast = addrspacecast i72* %A to i72 addrspace(4)*
+  %A.ascast = addrspacecast ptr %A to ptr addrspace(4)
   %B = alloca i10, align 2
-  %B.ascast = addrspacecast i10* %B to i10 addrspace(4)*
+  %B.ascast = addrspacecast ptr %B to ptr addrspace(4)
   %pown_res = alloca i15, align 2
-  %pown_res.ascast = addrspacecast i15* %pown_res to i15 addrspace(4)*
+  %pown_res.ascast = addrspacecast ptr %pown_res to ptr addrspace(4)
   %indirect-arg-temp = alloca i72, align 8
-  %0 = bitcast i72* %A to i8*
-  call void @llvm.lifetime.start.p0i8(i64 16, i8* %0) #5
-  %1 = bitcast i10* %B to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %1) #5
-  %2 = bitcast i15* %pown_res to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2, i8* %2) #5
-  %3 = load i72, i72 addrspace(4)* %A.ascast, align 8
-  %4 = load i10, i10 addrspace(4)* %B.ascast, align 2
-  store i72 %3, i72* %indirect-arg-temp, align 8
+  call void @llvm.lifetime.start.p0(i64 16, ptr %A) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %B) #5
+  call void @llvm.lifetime.start.p0(i64 2, ptr %pown_res) #5
+  %0 = load i72, ptr addrspace(4) %A.ascast, align 8
+  %1 = load i10, ptr addrspace(4) %B.ascast, align 2
+  store i72 %0, ptr %indirect-arg-temp, align 8
 ; CHECK-SPIRV: 6 Load [[Ty_72]] [[ResAId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 6 Load [[Ty_10]] [[PowN_BId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 5 Store [[PtrId:[0-9]+]] [[ResAId]]
 ; CHECK-SPIRV-NEXT: 4 Load [[Ty_72]] [[PowN_AId:[0-9]+]]
 ; CHECK-SPIRV-NEXT: 11 ArbitraryFloatPowNINTEL [[Ty_15]] [[#]] [[PowN_AId]] 7 [[PowN_BId]] 1 9 0 2 1
 ; CHECK-LLVM: call i15 @intel_arbitrary_float_pown.i15.i72.i10(i72 %[[#]], i32 7, i10 %[[#]], i1 true, i32 9, i32 0, i32 2, i32 1)
-  %call = call spir_func signext i15 @_Z31__spirv_ArbitraryFloatPowNINTELILi72ELi10ELi15EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiii(i72* byval(i72) align 8 %indirect-arg-temp, i32 7, i10 signext %4, i1 zeroext true, i32 9, i32 0, i32 2, i32 1) #4
-  store i15 %call, i15 addrspace(4)* %pown_res.ascast, align 2
-  %5 = bitcast i15* %pown_res to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %5) #5
-  %6 = bitcast i10* %B to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2, i8* %6) #5
-  %7 = bitcast i72* %A to i8*
-  call void @llvm.lifetime.end.p0i8(i64 16, i8* %7) #5
+  %call = call spir_func signext i15 @_Z31__spirv_ArbitraryFloatPowNINTELILi72ELi10ELi15EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiii(ptr byval(i72) align 8 %indirect-arg-temp, i32 7, i10 signext %1, i1 zeroext true, i32 9, i32 0, i32 2, i32 1) #4
+  store i15 %call, ptr addrspace(4) %pown_res.ascast, align 2
+  call void @llvm.lifetime.end.p0(i64 2, ptr %pown_res) #5
+  call void @llvm.lifetime.end.p0(i64 2, ptr %B) #5
+  call void @llvm.lifetime.end.p0(i64 16, ptr %A) #5
   ret void
 }
 
@@ -1788,13 +1576,13 @@ declare dso_local spir_func i56 @_Z31__spirv_ArbitraryFloatPowRINTELILi54ELi55EL
 declare dso_local spir_func signext i15 @_Z31__spirv_ArbitraryFloatPowNINTELILi12ELi10ELi15EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiii(i12 signext, i32, i10 signext, i1 zeroext, i32, i32, i32, i32) #4
 
 ; Function Attrs: nounwind
-declare dso_local spir_func void @_Z33__spirv_ArbitraryFloatSinCosINTELILi34ELi66EEU7_ExtIntIXmlLi2ET0_EEiU7_ExtIntIXT_EEiiiiii(i66 addrspace(4)* sret(i66) align 8, i34, i32, i32, i32, i32, i32) #4
+declare dso_local spir_func void @_Z33__spirv_ArbitraryFloatSinCosINTELILi34ELi66EEU7_ExtIntIXmlLi2ET0_EEiU7_ExtIntIXT_EEiiiiii(ptr addrspace(4) sret(i66) align 8, i34, i32, i32, i32, i32, i32) #4
 
 ; Function Attrs: nounwind
-declare dso_local spir_func void @_Z32__spirv_ArbitraryFloatATan2INTELILi24ELi25ELi66EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(i66 addrspace(4)* sret(i66) align 8, i24 signext, i32, i25 signext, i32, i32, i32, i32, i32) #4
+declare dso_local spir_func void @_Z32__spirv_ArbitraryFloatATan2INTELILi24ELi25ELi66EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiiii(ptr addrspace(4) sret(i66) align 8, i24 signext, i32, i25 signext, i32, i32, i32, i32, i32) #4
 
 ; Function Attrs: nounwind
-declare dso_local spir_func signext i15 @_Z31__spirv_ArbitraryFloatPowNINTELILi72ELi10ELi15EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiii(i72* byval(i72) align 8, i32, i10 signext, i1 zeroext, i32, i32, i32, i32) #4
+declare dso_local spir_func signext i15 @_Z31__spirv_ArbitraryFloatPowNINTELILi72ELi10ELi15EEU7_ExtIntIXT1_EEiU7_ExtIntIXT_EEiiU7_ExtIntIXT0_EEiiiii(ptr byval(i72) align 8, i32, i10 signext, i1 zeroext, i32, i32, i32, i32) #4
 
 attributes #0 = { norecurse "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "uniform-work-group-size"="true" "unsafe-fp-math"="false" "use-soft-float"="false" }
 attributes #1 = { argmemonly nounwind willreturn }
diff --git a/test/extensions/INTEL/SPV_INTEL_arbitrary_precision_integers/capability-arbitrary-precision-integers.ll b/test/extensions/INTEL/SPV_INTEL_arbitrary_precision_integers/capability-arbitrary-precision-integers.ll
index 66e0aaeec2..be719dc0a4 100644
--- a/test/extensions/INTEL/SPV_INTEL_arbitrary_precision_integers/capability-arbitrary-precision-integers.ll
+++ b/test/extensions/INTEL/SPV_INTEL_arbitrary_precision_integers/capability-arbitrary-precision-integers.ll
@@ -54,24 +54,24 @@ entry:
 ; CHECK-LLVM: %a.addr = alloca i30
   %a.addr = alloca i30, align 4
 ; CHECK-LLVM: store i30 %a, ptr %a.addr
-  store i30 %a, i30* %a.addr, align 4
+  store i30 %a, ptr %a.addr, align 4
 ; CHECK-LLVM: store i30 1, ptr %a.addr
-  store i30 1, i30* %a.addr, align 4
+  store i30 1, ptr %a.addr, align 4
 ; CHECK-LLVM: store i48 -4294901761, ptr addrspace(1) @c
-  store i48 -4294901761, i48 addrspace(1)* @c, align 8
-  store i96 18446744073709551620, i96 addrspace(1)* @d, align 8
+  store i48 -4294901761, ptr addrspace(1) @c, align 8
+  store i96 18446744073709551620, ptr addrspace(1) @d, align 8
 ; CHECK-LLVM: store i96 18446744073709551620, ptr addrspace(1) @d
-  store i128 1, i128 addrspace(1)* @e, align 8
+  store i128 1, ptr addrspace(1) @e, align 8
 ; CHECK-LLVM: store i128 1, ptr addrspace(1) @e
-  store i256 1, i256 addrspace(1)* @f, align 8
+  store i256 1, ptr addrspace(1) @f, align 8
 ; CHECK-LLVM: store i256 1, ptr addrspace(1) @f
-  store i2048 1, i2048 addrspace(1)* @g, align 8
+  store i2048 1, ptr addrspace(1) @g, align 8
 ; CHECK-LLVM: store i2048 1, ptr addrspace(1) @g
-  store i65 -18446744073709551615, i65 addrspace(1)* @h, align 8
+  store i65 -18446744073709551615, ptr addrspace(1) @h, align 8
 ; CHECK-LLVM: store i65 -18446744073709551615, ptr addrspace(1) @h
-  store i3000 307557980540279294232889703319188128660178473934208428941529507290014700153668237193840016959648364895607412313512951227128221045224559205896270620516337082808739837588961254353255830027840166730656182059939220104108619578923418753353272689302172594198324164702665735456123372112931626325928229001336686977155925668370229838484203276434155100588186194225960119470912775080602325495872090950732635120621977440871024563485182171283011102215933688567803148117944660987371672127930262890492608195186863705944202116045174275770965453046087141380685048949170655551377961378020138002577512563950397337411482000283436368555178753420853476885694765939958469025338558796061274167510540180157352895375592812002107611796210524652580145104498051665561832180530522128410920976917590052290663417660282734249250542625168875343680999691501456894825180813368722653062533792972293724769977822878099943468044629754557497344, i3000 addrspace(1)* @i, align 8
+  store i3000 307557980540279294232889703319188128660178473934208428941529507290014700153668237193840016959648364895607412313512951227128221045224559205896270620516337082808739837588961254353255830027840166730656182059939220104108619578923418753353272689302172594198324164702665735456123372112931626325928229001336686977155925668370229838484203276434155100588186194225960119470912775080602325495872090950732635120621977440871024563485182171283011102215933688567803148117944660987371672127930262890492608195186863705944202116045174275770965453046087141380685048949170655551377961378020138002577512563950397337411482000283436368555178753420853476885694765939958469025338558796061274167510540180157352895375592812002107611796210524652580145104498051665561832180530522128410920976917590052290663417660282734249250542625168875343680999691501456894825180813368722653062533792972293724769977822878099943468044629754557497344, ptr addrspace(1) @i, align 8
 ; CHECK-LLVM: store i3000 307557980540279294232889703319188128660178473934208428941529507290014700153668237193840016959648364895607412313512951227128221045224559205896270620516337082808739837588961254353255830027840166730656182059939220104108619578923418753353272689302172594198324164702665735456123372112931626325928229001336686977155925668370229838484203276434155100588186194225960119470912775080602325495872090950732635120621977440871024563485182171283011102215933688567803148117944660987371672127930262890492608195186863705944202116045174275770965453046087141380685048949170655551377961378020138002577512563950397337411482000283436368555178753420853476885694765939958469025338558796061274167510540180157352895375592812002107611796210524652580145104498051665561832180530522128410920976917590052290663417660282734249250542625168875343680999691501456894825180813368722653062533792972293724769977822878099943468044629754557497344, ptr addrspace(1) @i
-  store i20970 992999620131750473815229664075489009136335964930601292652448291630426253889216633314826452099385437512108307751385700008210777088198950852416756993106777532452166971180339481547729717472430926120069566708084768721091158483456180132456900166921064170356253710329014516914611602437118898173213450554683520694142351259777117399933202299321503679689921375146697488099391767735791080134857348483573458700239444949262311136074327730798419223282931354923297838070865115058640859020443189736871431666848885704361764831598954379353720610716235683212041262536747812618656776869090886477751144268696746387275480481070273733341504572901196536945414358001340689535511022665895626455268649424970129971928699595698100053229417613888025455042616392920340815983030517269194804400094340999515453007897327144456260394354743034429613166713339137123973767308819222401531165080139144568687881212960880391110973507901613562422904242358448329493367333432769425972765417223309828470149595670732429282106683605248114957719833776122373188338583370107470500960093631639679589741847559679170006182441552798602518461247802661642830666460139382261706062644902753977967459979553648637818374546606230866139876137853455589999819507707410522938829999667429569656413058184842029322964959829437040644892348324494764257561819215995533348729668529399154048635244868451399553902460611091420683800522919216312400775805110546334532970722908861596527134088436136014327185387199228527687414170879905772526402256213353167482570793412642586868457496633680422358894092223787255034053613836385343340190280360426979037228302691741006701850167979161853872928151056147094868400008311828912086041310688248179533145584091385688313869520967104240388792510267724369921724627353452291475193661470971707389385432274204931458700321574817859691637444849580082147241245842853174319528138449525668767346462769124319344353163509886012010194189090355760254199557022645788882845544961846094894372111061499704566163148357912929513840327281346086510158358828958975697204547509208081672900873821102015102352091128030786799223508892856306892709593906677194615582935273382617296960654159018160729791027881681542928438680279155467994455193797132110301150835969667739340187490999745078544061044535501219619336263907224519160245491688310651206349891418737604333558699578058407713400323788346947555441829197879370353777476836128033719245954116886563537434846471242408015557568989292692757450027512940238605693427565283916353185707882380994203825713646501471877339296703437800659102682180128110323288372464518977096260387957014283544930677476177460669380230398535522853515868483978205760693599952466199869950359036408257692541610339759950151444888252847375669894226710917177157553520918586351423121522050917353289820447442041148193767197765453757203200891565578572736262583950538738870290614620043846587149082266906227811164849040955337652091072736093323650717421074550285683025358187690112071480555968958423898139769651011232104091320249470609747717611182659031793642687041057171193040945965739569242093812130363573516802956454906410533892837510882307406475870088297616199357662952903069033353228722808340885383866692706950729775529166300791901511317739529769114086429791803763593109020826173645360272191697910188231254721988860588083235603286423507258317806971197439342302326860136973038494235019233599951320471671918205007482770650439753100595931261962925790178634645194348388099046269264340352107559871610051710660749890998384213725409476780259200166254627061833831014091512137739640955405259827789820868790210473084222543383973142584469735409427537913994446679765216223394350502825587896780323177323917441181314748441358554324827960459881164772394532077206068450507666578334326269624292329781061024537210111973241348334978679579747791892104823817723259025985900583616211845816922050024074939330318288097128373017523049107899795813890717257649866060348158801586759984315303214406662249881873434136550662171046907905379737104762298912160114738652297996132731406380282369135153485923296863113376088488878038562415290168077832523965520690382784352325729174947116218554583262627521343809633554605991363558530224763880161533766700612204738290060810979506210647333379373372404098044439054369711553465896690269173785724406603196667812718557001500061952809159105945925100988092570974549856536192318555264179047173499478846079669941034652326712601791467305227322011739745129130520192298000236846955462995457245632466730164436697631700763262335045657361716729474265386460458351255628635715251381738947652869744237007122773323322431043254413533781899767659625921640741146242472090400003782583170017538858696187104455264870759416545708798821207824013460932298943912580835246308391230249943078821783378821447594334011516728496466640660575749655768199496978412295031864369753580294173373103558007166031243071866373649815104224825990243694161863977165892231007915065027911958375458378663474519360211251966716603108098102847204574867782355078871449626175827486214396795372280651812992299666156773023876906060224603492574733855989567413838656827452784392325786066450846404110696241651777482790410808958110298156840167101761984188081930474928401127998893297421010844774388872386212228607916095256802836526943718673610807590892033348199517440999503413751384910026973859949142900410310432219666429887608798340649632736929369488438140883130393929796137318511826723829705011895649518824169936806874201196747626888019157054741740347337088921803306209541039860546364363157602815527984044429092413172259826220229025200083186128101465525672765636071077992087910080919771611091115246849327399639810892970516405927739739759979841374226532286843694058984801786289265093788882452584647612880335308514900584808553828816333398374886061798409068227357740572096018987837228579915848057471513868983517589677130551416801247458774240533031689624410582091975800679912964843972338074204791554838505958414769053263636041270745087461336596434602594734863374248927126813752469582336977550099794699726060374759922655365434328839441110861505480087225057083396399023402600530721101697571849746417713413569029009286589431293244076177660578611593661713911519855584725363759433174230587338453124268789271156078624738564306355162969836602238170348690419071068546686358815069614202930541174705702037279050014664152407184448847609868, i20970 addrspace(1)* @j, align 8
+  store i20970 992999620131750473815229664075489009136335964930601292652448291630426253889216633314826452099385437512108307751385700008210777088198950852416756993106777532452166971180339481547729717472430926120069566708084768721091158483456180132456900166921064170356253710329014516914611602437118898173213450554683520694142351259777117399933202299321503679689921375146697488099391767735791080134857348483573458700239444949262311136074327730798419223282931354923297838070865115058640859020443189736871431666848885704361764831598954379353720610716235683212041262536747812618656776869090886477751144268696746387275480481070273733341504572901196536945414358001340689535511022665895626455268649424970129971928699595698100053229417613888025455042616392920340815983030517269194804400094340999515453007897327144456260394354743034429613166713339137123973767308819222401531165080139144568687881212960880391110973507901613562422904242358448329493367333432769425972765417223309828470149595670732429282106683605248114957719833776122373188338583370107470500960093631639679589741847559679170006182441552798602518461247802661642830666460139382261706062644902753977967459979553648637818374546606230866139876137853455589999819507707410522938829999667429569656413058184842029322964959829437040644892348324494764257561819215995533348729668529399154048635244868451399553902460611091420683800522919216312400775805110546334532970722908861596527134088436136014327185387199228527687414170879905772526402256213353167482570793412642586868457496633680422358894092223787255034053613836385343340190280360426979037228302691741006701850167979161853872928151056147094868400008311828912086041310688248179533145584091385688313869520967104240388792510267724369921724627353452291475193661470971707389385432274204931458700321574817859691637444849580082147241245842853174319528138449525668767346462769124319344353163509886012010194189090355760254199557022645788882845544961846094894372111061499704566163148357912929513840327281346086510158358828958975697204547509208081672900873821102015102352091128030786799223508892856306892709593906677194615582935273382617296960654159018160729791027881681542928438680279155467994455193797132110301150835969667739340187490999745078544061044535501219619336263907224519160245491688310651206349891418737604333558699578058407713400323788346947555441829197879370353777476836128033719245954116886563537434846471242408015557568989292692757450027512940238605693427565283916353185707882380994203825713646501471877339296703437800659102682180128110323288372464518977096260387957014283544930677476177460669380230398535522853515868483978205760693599952466199869950359036408257692541610339759950151444888252847375669894226710917177157553520918586351423121522050917353289820447442041148193767197765453757203200891565578572736262583950538738870290614620043846587149082266906227811164849040955337652091072736093323650717421074550285683025358187690112071480555968958423898139769651011232104091320249470609747717611182659031793642687041057171193040945965739569242093812130363573516802956454906410533892837510882307406475870088297616199357662952903069033353228722808340885383866692706950729775529166300791901511317739529769114086429791803763593109020826173645360272191697910188231254721988860588083235603286423507258317806971197439342302326860136973038494235019233599951320471671918205007482770650439753100595931261962925790178634645194348388099046269264340352107559871610051710660749890998384213725409476780259200166254627061833831014091512137739640955405259827789820868790210473084222543383973142584469735409427537913994446679765216223394350502825587896780323177323917441181314748441358554324827960459881164772394532077206068450507666578334326269624292329781061024537210111973241348334978679579747791892104823817723259025985900583616211845816922050024074939330318288097128373017523049107899795813890717257649866060348158801586759984315303214406662249881873434136550662171046907905379737104762298912160114738652297996132731406380282369135153485923296863113376088488878038562415290168077832523965520690382784352325729174947116218554583262627521343809633554605991363558530224763880161533766700612204738290060810979506210647333379373372404098044439054369711553465896690269173785724406603196667812718557001500061952809159105945925100988092570974549856536192318555264179047173499478846079669941034652326712601791467305227322011739745129130520192298000236846955462995457245632466730164436697631700763262335045657361716729474265386460458351255628635715251381738947652869744237007122773323322431043254413533781899767659625921640741146242472090400003782583170017538858696187104455264870759416545708798821207824013460932298943912580835246308391230249943078821783378821447594334011516728496466640660575749655768199496978412295031864369753580294173373103558007166031243071866373649815104224825990243694161863977165892231007915065027911958375458378663474519360211251966716603108098102847204574867782355078871449626175827486214396795372280651812992299666156773023876906060224603492574733855989567413838656827452784392325786066450846404110696241651777482790410808958110298156840167101761984188081930474928401127998893297421010844774388872386212228607916095256802836526943718673610807590892033348199517440999503413751384910026973859949142900410310432219666429887608798340649632736929369488438140883130393929796137318511826723829705011895649518824169936806874201196747626888019157054741740347337088921803306209541039860546364363157602815527984044429092413172259826220229025200083186128101465525672765636071077992087910080919771611091115246849327399639810892970516405927739739759979841374226532286843694058984801786289265093788882452584647612880335308514900584808553828816333398374886061798409068227357740572096018987837228579915848057471513868983517589677130551416801247458774240533031689624410582091975800679912964843972338074204791554838505958414769053263636041270745087461336596434602594734863374248927126813752469582336977550099794699726060374759922655365434328839441110861505480087225057083396399023402600530721101697571849746417713413569029009286589431293244076177660578611593661713911519855584725363759433174230587338453124268789271156078624738564306355162969836602238170348690419071068546686358815069614202930541174705702037279050014664152407184448847609868, ptr addrspace(1) @j, align 8
 ; CHECK-LLVM: store i20970 992999620131750473815229664075489009136335964930601292652448291630426253889216633314826452099385437512108307751385700008210777088198950852416756993106777532452166971180339481547729717472430926120069566708084768721091158483456180132456900166921064170356253710329014516914611602437118898173213450554683520694142351259777117399933202299321503679689921375146697488099391767735791080134857348483573458700239444949262311136074327730798419223282931354923297838070865115058640859020443189736871431666848885704361764831598954379353720610716235683212041262536747812618656776869090886477751144268696746387275480481070273733341504572901196536945414358001340689535511022665895626455268649424970129971928699595698100053229417613888025455042616392920340815983030517269194804400094340999515453007897327144456260394354743034429613166713339137123973767308819222401531165080139144568687881212960880391110973507901613562422904242358448329493367333432769425972765417223309828470149595670732429282106683605248114957719833776122373188338583370107470500960093631639679589741847559679170006182441552798602518461247802661642830666460139382261706062644902753977967459979553648637818374546606230866139876137853455589999819507707410522938829999667429569656413058184842029322964959829437040644892348324494764257561819215995533348729668529399154048635244868451399553902460611091420683800522919216312400775805110546334532970722908861596527134088436136014327185387199228527687414170879905772526402256213353167482570793412642586868457496633680422358894092223787255034053613836385343340190280360426979037228302691741006701850167979161853872928151056147094868400008311828912086041310688248179533145584091385688313869520967104240388792510267724369921724627353452291475193661470971707389385432274204931458700321574817859691637444849580082147241245842853174319528138449525668767346462769124319344353163509886012010194189090355760254199557022645788882845544961846094894372111061499704566163148357912929513840327281346086510158358828958975697204547509208081672900873821102015102352091128030786799223508892856306892709593906677194615582935273382617296960654159018160729791027881681542928438680279155467994455193797132110301150835969667739340187490999745078544061044535501219619336263907224519160245491688310651206349891418737604333558699578058407713400323788346947555441829197879370353777476836128033719245954116886563537434846471242408015557568989292692757450027512940238605693427565283916353185707882380994203825713646501471877339296703437800659102682180128110323288372464518977096260387957014283544930677476177460669380230398535522853515868483978205760693599952466199869950359036408257692541610339759950151444888252847375669894226710917177157553520918586351423121522050917353289820447442041148193767197765453757203200891565578572736262583950538738870290614620043846587149082266906227811164849040955337652091072736093323650717421074550285683025358187690112071480555968958423898139769651011232104091320249470609747717611182659031793642687041057171193040945965739569242093812130363573516802956454906410533892837510882307406475870088297616199357662952903069033353228722808340885383866692706950729775529166300791901511317739529769114086429791803763593109020826173645360272191697910188231254721988860588083235603286423507258317806971197439342302326860136973038494235019233599951320471671918205007482770650439753100595931261962925790178634645194348388099046269264340352107559871610051710660749890998384213725409476780259200166254627061833831014091512137739640955405259827789820868790210473084222543383973142584469735409427537913994446679765216223394350502825587896780323177323917441181314748441358554324827960459881164772394532077206068450507666578334326269624292329781061024537210111973241348334978679579747791892104823817723259025985900583616211845816922050024074939330318288097128373017523049107899795813890717257649866060348158801586759984315303214406662249881873434136550662171046907905379737104762298912160114738652297996132731406380282369135153485923296863113376088488878038562415290168077832523965520690382784352325729174947116218554583262627521343809633554605991363558530224763880161533766700612204738290060810979506210647333379373372404098044439054369711553465896690269173785724406603196667812718557001500061952809159105945925100988092570974549856536192318555264179047173499478846079669941034652326712601791467305227322011739745129130520192298000236846955462995457245632466730164436697631700763262335045657361716729474265386460458351255628635715251381738947652869744237007122773323322431043254413533781899767659625921640741146242472090400003782583170017538858696187104455264870759416545708798821207824013460932298943912580835246308391230249943078821783378821447594334011516728496466640660575749655768199496978412295031864369753580294173373103558007166031243071866373649815104224825990243694161863977165892231007915065027911958375458378663474519360211251966716603108098102847204574867782355078871449626175827486214396795372280651812992299666156773023876906060224603492574733855989567413838656827452784392325786066450846404110696241651777482790410808958110298156840167101761984188081930474928401127998893297421010844774388872386212228607916095256802836526943718673610807590892033348199517440999503413751384910026973859949142900410310432219666429887608798340649632736929369488438140883130393929796137318511826723829705011895649518824169936806874201196747626888019157054741740347337088921803306209541039860546364363157602815527984044429092413172259826220229025200083186128101465525672765636071077992087910080919771611091115246849327399639810892970516405927739739759979841374226532286843694058984801786289265093788882452584647612880335308514900584808553828816333398374886061798409068227357740572096018987837228579915848057471513868983517589677130551416801247458774240533031689624410582091975800679912964843972338074204791554838505958414769053263636041270745087461336596434602594734863374248927126813752469582336977550099794699726060374759922655365434328839441110861505480087225057083396399023402600530721101697571849746417713413569029009286589431293244076177660578611593661713911519855584725363759433174230587338453124268789271156078624738564306355162969836602238170348690419071068546686358815069614202930541174705702037279050014664152407184448847609868, ptr addrspace(1) @j
   ret void
 }
diff --git a/test/extensions/INTEL/SPV_INTEL_blocking_pipes/PipeBlocking.ll b/test/extensions/INTEL/SPV_INTEL_blocking_pipes/PipeBlocking.ll
index 6dcfe84086..2e4b3dbd8d 100644
--- a/test/extensions/INTEL/SPV_INTEL_blocking_pipes/PipeBlocking.ll
+++ b/test/extensions/INTEL/SPV_INTEL_blocking_pipes/PipeBlocking.ll
@@ -40,88 +40,88 @@ target triple = "spir64-unknown-unknown"
 ; CHECK-SPV-IR: call spir_func void @_Z30__spirv_WritePipeBlockingINTEL{{.*}}(target("spirv.Pipe", 1){{.*}}, ptr addrspace(4){{.*}}, i32 2, i32 2)
 
 ; Function Attrs: convergent noinline nounwind optnone
-define spir_func void @foo(target("spirv.Pipe", 0) %p, i32 addrspace(1)* %ptr) #0 {
+define spir_func void @foo(target("spirv.Pipe", 0) %p, ptr addrspace(1) %ptr) #0 {
 entry:
   %p.addr = alloca target("spirv.Pipe", 0), align 8
-  %ptr.addr = alloca i32 addrspace(1)*, align 8
+  %ptr.addr = alloca ptr addrspace(1), align 8
   store target("spirv.Pipe", 0) %p, target("spirv.Pipe", 0)* %p.addr, align 8
-  store i32 addrspace(1)* %ptr, i32 addrspace(1)** %ptr.addr, align 8
+  store ptr addrspace(1) %ptr, ptr %ptr.addr, align 8
   %0 = load target("spirv.Pipe", 0), target("spirv.Pipe", 0)* %p.addr, align 8
-  %1 = load i32 addrspace(1)*, i32 addrspace(1)** %ptr.addr, align 8
-  %2 = addrspacecast i32 addrspace(1)* %1 to i32 addrspace(4)*
-  call spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePiii(target("spirv.Pipe", 0) %0, i32 addrspace(4)* %2, i32 4, i32 4)
+  %1 = load ptr addrspace(1), ptr %ptr.addr, align 8
+  %2 = addrspacecast ptr addrspace(1) %1 to ptr addrspace(4)
+  call spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePiii(target("spirv.Pipe", 0) %0, ptr addrspace(4) %2, i32 4, i32 4)
   ret void
 }
 
-declare dso_local spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePiii(target("spirv.Pipe", 0), i32 addrspace(4)*, i32, i32)
+declare dso_local spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePiii(target("spirv.Pipe", 0), ptr addrspace(4), i32, i32)
 
 ; Function Attrs: convergent noinline nounwind optnone
-define spir_func void @bar(target("spirv.Pipe", 0) %p, i32 addrspace(1)* %ptr) #0 {
+define spir_func void @bar(target("spirv.Pipe", 0) %p, ptr addrspace(1) %ptr) #0 {
 entry:
   %p.addr = alloca target("spirv.Pipe", 0), align 8
-  %ptr.addr = alloca i32 addrspace(1)*, align 8
+  %ptr.addr = alloca ptr addrspace(1), align 8
   store target("spirv.Pipe", 0) %p, target("spirv.Pipe", 0)* %p.addr, align 8
-  store i32 addrspace(1)* %ptr, i32 addrspace(1)** %ptr.addr, align 8
+  store ptr addrspace(1) %ptr, ptr %ptr.addr, align 8
   %0 = load target("spirv.Pipe", 0), target("spirv.Pipe", 0)* %p.addr, align 8
-  %1 = load i32 addrspace(1)*, i32 addrspace(1)** %ptr.addr, align 8
-  %2 = addrspacecast i32 addrspace(1)* %1 to i8 addrspace(4)*
-  call spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePvii(target("spirv.Pipe", 0) %0, i8 addrspace(4)* %2, i32 4, i32 4)
+  %1 = load ptr addrspace(1), ptr %ptr.addr, align 8
+  %2 = addrspacecast ptr addrspace(1) %1 to ptr addrspace(4)
+  call spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePvii(target("spirv.Pipe", 0) %0, ptr addrspace(4) %2, i32 4, i32 4)
   ret void
 }
 
-declare dso_local spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePvii(target("spirv.Pipe", 0), i8 addrspace(4)*, i32, i32)
+declare dso_local spir_func void @_Z29__spirv_ReadPipeBlockingINTELIiEv8ocl_pipePvii(target("spirv.Pipe", 0), ptr addrspace(4), i32, i32)
 
 ; Function Attrs: convergent noinline nounwind optnone
-define spir_func void @boo(target("spirv.Pipe", 1) %p, i32 addrspace(1)* %ptr) #0 {
+define spir_func void @boo(target("spirv.Pipe", 1) %p, ptr addrspace(1) %ptr) #0 {
 entry:
   %p.addr = alloca target("spirv.Pipe", 1), align 8
-  %ptr.addr = alloca i32 addrspace(1)*, align 8
+  %ptr.addr = alloca ptr addrspace(1), align 8
   store target("spirv.Pipe", 1) %p, target("spirv.Pipe", 1)* %p.addr, align 8
-  store i32 addrspace(1)* %ptr, i32 addrspace(1)** %ptr.addr, align 8
+  store ptr addrspace(1) %ptr, ptr %ptr.addr, align 8
   %0 = load target("spirv.Pipe", 1), target("spirv.Pipe", 1)* %p.addr, align 8
-  %1 = load i32 addrspace(1)*, i32 addrspace(1)** %ptr.addr, align 8
-  %2 = addrspacecast i32 addrspace(1)* %1 to i32 addrspace(4)*
-  call spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pipePiii(target("spirv.Pipe", 1) %0, i32 addrspace(4)* %2, i32 4, i32 4)
+  %1 = load ptr addrspace(1), ptr %ptr.addr, align 8
+  %2 = addrspacecast ptr addrspace(1) %1 to ptr addrspace(4)
+  call spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pipePiii(target("spirv.Pipe", 1) %0, ptr addrspace(4) %2, i32 4, i32 4)
   ret void
 }
 
-declare dso_local spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pipePiii(target("spirv.Pipe", 1), i32 addrspace(4)*, i32, i32)
+declare dso_local spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pipePiii(target("spirv.Pipe", 1), ptr addrspace(4), i32, i32)
 
 ; Function Attrs: convergent noinline nounwind optnone
-define spir_func void @baz(target("spirv.Pipe", 1) %p, i32 addrspace(1)* %ptr) #0 {
+define spir_func void @baz(target("spirv.Pipe", 1) %p, ptr addrspace(1) %ptr) #0 {
 entry:
   %p.addr = alloca target("spirv.Pipe", 1), align 8
-  %ptr.addr = alloca i32 addrspace(1)*, align 8
+  %ptr.addr = alloca ptr addrspace(1), align 8
   store target("spirv.Pipe", 1) %p, target("spirv.Pipe", 1)* %p.addr, align 8
-  store i32 addrspace(1)* %ptr, i32 addrspace(1)** %ptr.addr, align 8
+  store ptr addrspace(1) %ptr, ptr %ptr.addr, align 8
   %0 = load target("spirv.Pipe", 1), target("spirv.Pipe", 1)* %p.addr, align 8
-  %1 = load i32 addrspace(1)*, i32 addrspace(1)** %ptr.addr, align 8
-  %2 = addrspacecast i32 addrspace(1)* %1 to i8 addrspace(4)*
-  call spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pipePvii(target("spirv.Pipe", 1) %0, i8 addrspace(4)* %2, i32 4, i32 4)
+  %1 = load ptr addrspace(1), ptr %ptr.addr, align 8
+  %2 = addrspacecast ptr addrspace(1) %1 to ptr addrspace(4)
+  call spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pipePvii(target("spirv.Pipe", 1) %0, ptr addrspace(4) %2, i32 4, i32 4)
   ret void
 }
 
-declare dso_local spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pipePvii(target("spirv.Pipe", 1), i8 addrspace(4)*, i32, i32)
+declare dso_local spir_func void @_Z30__spirv_WritePipeBlockingINTELIKiEv8ocl_pipePvii(target("spirv.Pipe", 1), ptr addrspace(4), i32, i32)
 
 ; CHECK-LLVM: declare spir_func void @__read_pipe_2_bl(ptr addrspace(1), ptr addrspace(4), i32, i32)
 ; CHECK-LLVM: declare spir_func void @__write_pipe_2_bl(ptr addrspace(1), ptr addrspace(4), i32, i32)
 
 ; Function Attrs: convergent mustprogress norecurse nounwind
-define linkonce_odr dso_local spir_func void @WritePipeBLockingi9Pointer(i9 addrspace(4)* align 2 dereferenceable(2) %_Data) {
+define linkonce_odr dso_local spir_func void @WritePipeBLockingi9Pointer(ptr addrspace(4) align 2 dereferenceable(2) %_Data) {
 entry:
-  %_Data.addr = alloca i9 addrspace(4)*, align 8
+  %_Data.addr = alloca ptr addrspace(4), align 8
   %_WPipe = alloca target("spirv.Pipe", 1), align 8
-  %_Data.addr.ascast = addrspacecast i9 addrspace(4)** %_Data.addr to i9 addrspace(4)* addrspace(4)*
+  %_Data.addr.ascast = addrspacecast ptr %_Data.addr to ptr addrspace(4)
   %_WPipe.ascast = addrspacecast target("spirv.Pipe", 1)* %_WPipe to target("spirv.Pipe", 1) addrspace(4)*
-  store i9 addrspace(4)* %_Data, i9 addrspace(4)* addrspace(4)* %_Data.addr.ascast, align 8
-  %0 = bitcast target("spirv.Pipe", 1)* %_WPipe to i8*
+  store ptr addrspace(4) %_Data, ptr addrspace(4) %_Data.addr.ascast, align 8
+  %0 = bitcast target("spirv.Pipe", 1)* %_WPipe to ptr
   %1 = load target("spirv.Pipe", 1), target("spirv.Pipe", 1) addrspace(4)* %_WPipe.ascast, align 8
-  %2 = load i9 addrspace(4)*, i9 addrspace(4)* addrspace(4)* %_Data.addr.ascast, align 8
-  call spir_func void @_Z30__spirv_WritePipeBlockingINTELIDU9_Ev8ocl_pipePKT_ii(target("spirv.Pipe", 1) %1, i9 addrspace(4)* %2, i32 2, i32 2)
+  %2 = load ptr addrspace(4), ptr addrspace(4) %_Data.addr.ascast, align 8
+  call spir_func void @_Z30__spirv_WritePipeBlockingINTELIDU9_Ev8ocl_pipePKT_ii(target("spirv.Pipe", 1) %1, ptr addrspace(4) %2, i32 2, i32 2)
   ret void
 }
 
-declare dso_local spir_func void @_Z30__spirv_WritePipeBlockingINTELIDU9_Ev8ocl_pipePKT_ii(target("spirv.Pipe", 1), i9 addrspace(4)*, i32, i32)
+declare dso_local spir_func void @_Z30__spirv_WritePipeBlockingINTELIDU9_Ev8ocl_pipePKT_ii(target("spirv.Pipe", 1), ptr addrspace(4), i32, i32)
 
 attributes #0 = { convergent noinline nounwind optnone "correctly-rounded-divide-sqrt-fp-math"="false" "denorms-are-zero"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
 
diff --git a/test/extensions/INTEL/SPV_INTEL_complex_float_mul_div/complex-operations.ll b/test/extensions/INTEL/SPV_INTEL_complex_float_mul_div/complex-operations.ll
index 261cd1929e..b8490f2861 100644
--- a/test/extensions/INTEL/SPV_INTEL_complex_float_mul_div/complex-operations.ll
+++ b/test/extensions/INTEL/SPV_INTEL_complex_float_mul_div/complex-operations.ll
@@ -30,17 +30,14 @@ target triple = "spir-unknown-unknown"
 %structtype = type { float, float }
 
 ; Function Attrs: nounwind
-define spir_func void @_Z19cmul_kernel_complexPSt7complexIfES1_S1_(%"struct.std::complex"* noalias nocapture readonly %a, %"struct.std::complex"* noalias nocapture readonly %b, %"struct.std::complex"* noalias nocapture %c) #0 {
+define spir_func void @_Z19cmul_kernel_complexPSt7complexIfES1_S1_(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %b, ptr noalias nocapture %c) #0 {
 entry:
-  %0 = bitcast %"struct.std::complex"* %a to <2 x float>*
-  %1 = load <2 x float>, <2 x float>* %0, align 4
-  %2 = bitcast %"struct.std::complex"* %b to <2 x float>*
-  %3 = load <2 x float>, <2 x float>* %2, align 4
-  %4 = call spir_func <2 x float> @_Z24__spirv_ComplexFDivINTELDv2_fS_(<2 x float> %1, <2 x float> %3) #0
-  %ref.tmp.sroa.0.0..sroa_cast5 = bitcast %"struct.std::complex"* %c to <2 x float>*
-  store <2 x float> %4, <2 x float>* %ref.tmp.sroa.0.0..sroa_cast5, align 4
-  %5 = call spir_func <2 x float> @_Z24__spirv_ComplexFMulINTELDv2_fS_(<2 x float> %1, <2 x float> %3) #0
-  store <2 x float> %5, <2 x float>* %ref.tmp.sroa.0.0..sroa_cast5, align 4
+  %0 = load <2 x float>, ptr %a, align 4
+  %1 = load <2 x float>, ptr %b, align 4
+  %2 = call spir_func <2 x float> @_Z24__spirv_ComplexFDivINTELDv2_fS_(<2 x float> %0, <2 x float> %1) #0
+  store <2 x float> %2, ptr %c, align 4
+  %3 = call spir_func <2 x float> @_Z24__spirv_ComplexFMulINTELDv2_fS_(<2 x float> %0, <2 x float> %1) #0
+  store <2 x float> %3, ptr %c, align 4
   ret void
 }
 
diff --git a/test/extensions/INTEL/SPV_INTEL_float_controls2/exec_mode_float_control_intel.ll b/test/extensions/INTEL/SPV_INTEL_float_controls2/exec_mode_float_control_intel.ll
index bebbb38f04..44a01c5812 100644
--- a/test/extensions/INTEL/SPV_INTEL_float_controls2/exec_mode_float_control_intel.ll
+++ b/test/extensions/INTEL/SPV_INTEL_float_controls2/exec_mode_float_control_intel.ll
@@ -42,7 +42,7 @@ entry:
 ; SPV-DAG: EntryPoint {{[0-9]+}} [[KERNEL1:[0-9]+]] "k_float_controls_1"
 ; SPV-DAG: EntryPoint {{[0-9]+}} [[KERNEL2:[0-9]+]] "k_float_controls_2"
 ; SPV-DAG: EntryPoint {{[0-9]+}} [[KERNEL3:[0-9]+]] "k_float_controls_3"
-!0 = !{void (i32, i32)* @k_float_controls_0, !"k_float_controls_0", !1, i32 0, !2, !3, !4, i32 0, i32 0}
+!0 = !{ptr @k_float_controls_0, !"k_float_controls_0", !1, i32 0, !2, !3, !4, i32 0, i32 0}
 !1 = !{i32 2, i32 2}
 !2 = !{i32 32, i32 36}
 !3 = !{i32 0, i32 0}
@@ -52,29 +52,29 @@ entry:
 !14 = !{i32 1, i32 0}
 
 ; SPV-DAG: ExecutionMode [[KERNEL0]] 5620 64
-!15 = !{void (i32, i32)* @k_float_controls_0, i32 5620, i32 64}
+!15 = !{ptr @k_float_controls_0, i32 5620, i32 64}
 ; SPV-DAG: ExecutionMode [[KERNEL0]] 5620 32
-!16 = !{void (i32, i32)* @k_float_controls_0, i32 5620, i32 32}
+!16 = !{ptr @k_float_controls_0, i32 5620, i32 32}
 ; SPV-DAG: ExecutionMode [[KERNEL0]] 5620 16
-!17 = !{void (i32, i32)* @k_float_controls_0, i32 5620, i32 16}
+!17 = !{ptr @k_float_controls_0, i32 5620, i32 16}
 
 ; SPV-DAG: ExecutionMode [[KERNEL1]] 5621 64
-!18 = !{void (i32, i32)* @k_float_controls_1, i32 5621, i32 64}
+!18 = !{ptr @k_float_controls_1, i32 5621, i32 64}
 ; SPV-DAG: ExecutionMode [[KERNEL1]] 5621 32
-!19 = !{void (i32, i32)* @k_float_controls_1, i32 5621, i32 32}
+!19 = !{ptr @k_float_controls_1, i32 5621, i32 32}
 ; SPV-DAG: ExecutionMode [[KERNEL1]] 5621 16
-!20 = !{void (i32, i32)* @k_float_controls_1, i32 5621, i32 16}
+!20 = !{ptr @k_float_controls_1, i32 5621, i32 16}
 
 ; SPV-DAG: ExecutionMode [[KERNEL2]] 5622 64
-!21 = !{void (i32, i32)* @k_float_controls_2, i32 5622, i32 64}
+!21 = !{ptr @k_float_controls_2, i32 5622, i32 64}
 ; SPV-DAG: ExecutionMode [[KERNEL2]] 5622 32
-!22 = !{void (i32, i32)* @k_float_controls_2, i32 5622, i32 32}
+!22 = !{ptr @k_float_controls_2, i32 5622, i32 32}
 ; SPV-DAG: ExecutionMode [[KERNEL2]] 5622 16
-!23 = !{void (i32, i32)* @k_float_controls_2, i32 5622, i32 16}
+!23 = !{ptr @k_float_controls_2, i32 5622, i32 16}
 
 ; SPV-DAG: ExecutionMode [[KERNEL3]] 5623 64
-!24 = !{void (i32, i32)* @k_float_controls_3, i32 5623, i32 64}
+!24 = !{ptr @k_float_controls_3, i32 5623, i32 64}
 ; SPV-DAG: ExecutionMode [[KERNEL3]] 5623 32
-!25 = !{void (i32, i32)* @k_float_controls_3, i32 5623, i32 32}
+!25 = !{ptr @k_float_controls_3, i32 5623, i32 32}
 ; SPV-DAG: ExecutionMode [[KERNEL3]] 5623 16
-!26 = !{void (i32, i32)* @k_float_controls_3, i32 5623, i32 16}
+!26 = !{ptr @k_float_controls_3, i32 5623, i32 16}
diff --git a/test/extensions/INTEL/SPV_INTEL_fp_fast_math_mode/fp_contract_reassoc_fast_mode.ll b/test/extensions/INTEL/SPV_INTEL_fp_fast_math_mode/fp_contract_reassoc_fast_mode.ll
index 997bcd87a4..665e88a50f 100644
--- a/test/extensions/INTEL/SPV_INTEL_fp_fast_math_mode/fp_contract_reassoc_fast_mode.ll
+++ b/test/extensions/INTEL/SPV_INTEL_fp_fast_math_mode/fp_contract_reassoc_fast_mode.ll
@@ -27,16 +27,16 @@ define spir_kernel void @test(float %a, float %b) #0 !kernel_arg_addr_space !3 !
 entry:
   %a.addr = alloca float, align 4
   %b.addr = alloca float, align 4
-  store float %a, float* %a.addr, align 4
-  store float %b, float* %b.addr, align 4
-  %0 = load float, float* %a.addr, align 4
-  %1 = load float, float* %a.addr, align 4
+  store float %a, ptr %a.addr, align 4
+  store float %b, ptr %b.addr, align 4
+  %0 = load float, ptr %a.addr, align 4
+  %1 = load float, ptr %a.addr, align 4
   %mul = fmul contract float %0, %1
-  store float %mul, float* %b.addr, align 4
-  %2 = load float, float* %b.addr, align 4
-  %3 = load float, float* %b.addr, align 4
+  store float %mul, ptr %b.addr, align 4
+  %2 = load float, ptr %b.addr, align 4
+  %3 = load float, ptr %b.addr, align 4
   %sub = fsub reassoc float %2, %3
-  store float %sub, float* %b.addr, align 4
+  store float %sub, ptr %b.addr, align 4
   ret void
 }
 
diff --git a/test/extensions/INTEL/SPV_INTEL_fpga_argument_interfaces/sycl-kernel-arg-annotation.ll b/test/extensions/INTEL/SPV_INTEL_fpga_argument_interfaces/sycl-kernel-arg-annotation.ll
index 0ff500a50d..4001bd8ebf 100644
--- a/test/extensions/INTEL/SPV_INTEL_fpga_argument_interfaces/sycl-kernel-arg-annotation.ll
+++ b/test/extensions/INTEL/SPV_INTEL_fpga_argument_interfaces/sycl-kernel-arg-annotation.ll
@@ -10,7 +10,7 @@ target triple = "spir64-unknown-unknown"
 $_ZTS4MyIP = comdat any
 
 ; Function Attrs: convergent mustprogress norecurse
-define weak_odr dso_local spir_kernel void @_ZTS4MyIP(i32 addrspace(4)* noundef %_arg_p) #0 comdat !kernel_arg_buffer_location !1587 !spirv.ParameterDecorations !1588
+define weak_odr dso_local spir_kernel void @_ZTS4MyIP(ptr addrspace(4) noundef %_arg_p) #0 comdat !kernel_arg_buffer_location !1587 !spirv.ParameterDecorations !1588
 ; CHECK-LLVM-DAG:  !spirv.ParameterDecorations ![[PARMDECOR:[0-9]+]]
 {
 entry:
diff --git a/test/extensions/INTEL/SPV_INTEL_fpga_dsp_control/prefer_dsp.ll b/test/extensions/INTEL/SPV_INTEL_fpga_dsp_control/prefer_dsp.ll
index 1ae533727f..1ff24fdb65 100644
--- a/test/extensions/INTEL/SPV_INTEL_fpga_dsp_control/prefer_dsp.ll
+++ b/test/extensions/INTEL/SPV_INTEL_fpga_dsp_control/prefer_dsp.ll
@@ -57,29 +57,29 @@ define dso_local i32 @main() #0 {
 entry:
   %retval = alloca i32, align 4
   %agg.tmp = alloca %class.anon, align 1
-  store i32 0, i32* %retval, align 4
-  call spir_func void @"_Z25math_prefer_dsp_propagateIZ4mainE3$_0EvT_"(%class.anon* byval(%class.anon) align 1 %agg.tmp)
+  store i32 0, ptr %retval, align 4
+  call spir_func void @"_Z25math_prefer_dsp_propagateIZ4mainE3$_0EvT_"(ptr byval(%class.anon) align 1 %agg.tmp)
   ret i32 0
 }
 
 ; Function Attrs: noinline optnone mustprogress
-define internal spir_func void @"_Z25math_prefer_dsp_propagateIZ4mainE3$_0EvT_"(%class.anon* byval(%class.anon) align 1 %f) #1 !prefer_dsp !3 {
+define internal spir_func void @"_Z25math_prefer_dsp_propagateIZ4mainE3$_0EvT_"(ptr byval(%class.anon) align 1 %f) #1 !prefer_dsp !3 {
 entry:
-  call spir_func void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull dereferenceable(1) %f)
+  call spir_func void @"_ZZ4mainENK3$_0clEv"(ptr nonnull dereferenceable(1) %f)
   ret void
 }
 
 ; Function Attrs: noinline nounwind optnone mustprogress
-define internal spir_func void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull dereferenceable(1) %this) #2 align 2 {
+define internal spir_func void @"_ZZ4mainENK3$_0clEv"(ptr nonnull dereferenceable(1) %this) #2 align 2 {
 entry:
-  %this.addr = alloca %class.anon*, align 8
+  %this.addr = alloca ptr, align 8
   %a = alloca i32, align 4
-  store %class.anon* %this, %class.anon** %this.addr, align 8
-  %this1 = load %class.anon*, %class.anon** %this.addr, align 8
-  store i32 0, i32* %a, align 4
-  %0 = load i32, i32* %a, align 4
+  store ptr %this, ptr %this.addr, align 8
+  %this1 = load ptr, ptr %this.addr, align 8
+  store i32 0, ptr %a, align 4
+  %0 = load i32, ptr %a, align 4
   %add = add nsw i32 %0, 1
-  store i32 %add, i32* %a, align 4
+  store i32 %add, ptr %a, align 4
   ret void
 }
 
diff --git a/test/extensions/INTEL/SPV_INTEL_fpga_dsp_control/prefer_dsp_propagate.ll b/test/extensions/INTEL/SPV_INTEL_fpga_dsp_control/prefer_dsp_propagate.ll
index df1de97595..418f7005a4 100644
--- a/test/extensions/INTEL/SPV_INTEL_fpga_dsp_control/prefer_dsp_propagate.ll
+++ b/test/extensions/INTEL/SPV_INTEL_fpga_dsp_control/prefer_dsp_propagate.ll
@@ -59,29 +59,29 @@ define dso_local i32 @main() #0 {
 entry:
   %retval = alloca i32, align 4
   %agg.tmp = alloca %class.anon, align 1
-  store i32 0, i32* %retval, align 4
-  call spir_func void @"_Z25math_prefer_dsp_propagateIZ4mainE3$_0EvT_"(%class.anon* byval(%class.anon) align 1 %agg.tmp)
+  store i32 0, ptr %retval, align 4
+  call spir_func void @"_Z25math_prefer_dsp_propagateIZ4mainE3$_0EvT_"(ptr byval(%class.anon) align 1 %agg.tmp)
   ret i32 0
 }
 
 ; Function Attrs: noinline optnone mustprogress
-define internal spir_func void @"_Z25math_prefer_dsp_propagateIZ4mainE3$_0EvT_"(%class.anon* byval(%class.anon) align 1 %f) #1 !prefer_dsp !3 !propagate_dsp_preference !3 {
+define internal spir_func void @"_Z25math_prefer_dsp_propagateIZ4mainE3$_0EvT_"(ptr byval(%class.anon) align 1 %f) #1 !prefer_dsp !3 !propagate_dsp_preference !3 {
 entry:
-  call spir_func void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull dereferenceable(1) %f)
+  call spir_func void @"_ZZ4mainENK3$_0clEv"(ptr nonnull dereferenceable(1) %f)
   ret void
 }
 
 ; Function Attrs: noinline nounwind optnone mustprogress
-define internal spir_func void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull dereferenceable(1) %this) #2 align 2 {
+define internal spir_func void @"_ZZ4mainENK3$_0clEv"(ptr nonnull dereferenceable(1) %this) #2 align 2 {
 entry:
-  %this.addr = alloca %class.anon*, align 8
+  %this.addr = alloca ptr, align 8
   %a = alloca i32, align 4
-  store %class.anon* %this, %class.anon** %this.addr, align 8
-  %this1 = load %class.anon*, %class.anon** %this.addr, align 8
-  store i32 0, i32* %a, align 4
-  %0 = load i32, i32* %a, align 4
+  store ptr %this, ptr %this.addr, align 8
+  %this1 = load ptr, ptr %this.addr, align 8
+  store i32 0, ptr %a, align 4
+  %0 = load i32, ptr %a, align 4
   %add = add nsw i32 %0, 1
-  store i32 %add, i32* %a, align 4
+  store i32 %add, ptr %a, align 4
   ret void
 }
 
diff --git a/test/extensions/INTEL/SPV_INTEL_fpga_loop_controls/FPGALoopAttr.ll b/test/extensions/INTEL/SPV_INTEL_fpga_loop_controls/FPGALoopAttr.ll
index 46d56f4019..4721ddd575 100644
--- a/test/extensions/INTEL/SPV_INTEL_fpga_loop_controls/FPGALoopAttr.ll
+++ b/test/extensions/INTEL/SPV_INTEL_fpga_loop_controls/FPGALoopAttr.ll
@@ -31,7 +31,7 @@ entry:
   %i10 = alloca i32, align 4
   %i19 = alloca i32, align 4
   %i28 = alloca i32, align 4
-  store i32 0, i32* %i, align 4
+  store i32 0, ptr %i, align 4
   br label %for.cond
 ; Per SPIR-V spec, LoopControlDependencyInfiniteMask = 0x00000004
 ; CHECK-SPIRV: 4 LoopMerge {{[0-9]+}} {{[0-9]+}} 4
@@ -39,25 +39,25 @@ entry:
 ; CHECK-SPIRV-NEGATIVE: 4 LoopMerge {{[0-9]+}} {{[0-9]+}} 4
 ; CHECK-SPIRV-NEGATIVE-NEXT: 4 BranchConditional {{[0-9]+}} {{[0-9]+}} {{[0-9]+}}
 for.cond:                                         ; preds = %for.inc, %entry
-  %0 = load i32, i32* %i, align 4
+  %0 = load i32, ptr %i, align 4
   %cmp = icmp ne i32 %0, 10
   br i1 %cmp, label %for.body, label %for.end
 
 for.body:                                         ; preds = %for.cond
-  %1 = load i32, i32* %i, align 4
+  %1 = load i32, ptr %i, align 4
   %idxprom = sext i32 %1 to i64
-  %arrayidx = getelementptr inbounds [10 x i32], [10 x i32]* %a, i64 0, i64 %idxprom
-  store i32 0, i32* %arrayidx, align 4
+  %arrayidx = getelementptr inbounds [10 x i32], ptr %a, i64 0, i64 %idxprom
+  store i32 0, ptr %arrayidx, align 4
   br label %for.inc
 
 for.inc:                                          ; preds = %for.body
-  %2 = load i32, i32* %i, align 4
+  %2 = load i32, ptr %i, align 4
   %inc = add nsw i32 %2, 1
-  store i32 %inc, i32* %i, align 4
+  store i32 %inc, ptr %i, align 4
   br label %for.cond, !llvm.loop !3
 
 for.end:                                          ; preds = %for.cond
-  store i32 0, i32* %i1, align 4
+  store i32 0, ptr %i1, align 4
   br label %for.cond2
 
 ; Per SPIR-V spec, LoopControlDependencyLengthMask = 0x00000008
@@ -66,25 +66,25 @@ for.end:                                          ; preds = %for.cond
 ; CHECK-SPIRV-NEGATIVE: 5 LoopMerge {{[0-9]+}} {{[0-9]+}} 8 2
 ; CHECK-SPIRV-NEGATIVE-NEXT: 4 BranchConditional {{[0-9]+}} {{[0-9]+}} {{[0-9]+}}
 for.cond2:                                        ; preds = %for.inc7, %for.end
-  %3 = load i32, i32* %i1, align 4
+  %3 = load i32, ptr %i1, align 4
   %cmp3 = icmp ne i32 %3, 10
   br i1 %cmp3, label %for.body4, label %for.end9
 
 for.body4:                                        ; preds = %for.cond2
-  %4 = load i32, i32* %i1, align 4
+  %4 = load i32, ptr %i1, align 4
   %idxprom5 = sext i32 %4 to i64
-  %arrayidx6 = getelementptr inbounds [10 x i32], [10 x i32]* %a, i64 0, i64 %idxprom5
-  store i32 0, i32* %arrayidx6, align 4
+  %arrayidx6 = getelementptr inbounds [10 x i32], ptr %a, i64 0, i64 %idxprom5
+  store i32 0, ptr %arrayidx6, align 4
   br label %for.inc7
 
 for.inc7:                                         ; preds = %for.body4
-  %5 = load i32, i32* %i1, align 4
+  %5 = load i32, ptr %i1, align 4
   %inc8 = add nsw i32 %5, 1
-  store i32 %inc8, i32* %i1, align 4
+  store i32 %inc8, ptr %i1, align 4
   br label %for.cond2, !llvm.loop !5
 
 for.end9:                                         ; preds = %for.cond2
-  store i32 0, i32* %i10, align 4
+  store i32 0, ptr %i10, align 4
   br label %for.cond11
 
 ; Per SPIR-V spec extension INTEL/SPV_INTEL_fpga_loop_controls,
@@ -93,25 +93,25 @@ for.end9:                                         ; preds = %for.cond2
 ; CHECK-SPIRV-NEXT: 4 BranchConditional {{[0-9]+}} {{[0-9]+}} {{[0-9]+}}
 ; CHECK-SPIRV-NEGATIVE-NOT: 5 LoopMerge {{[0-9]+}} {{[0-9]+}} 65536 2
 for.cond11:                                       ; preds = %for.inc16, %for.end9
-  %6 = load i32, i32* %i10, align 4
+  %6 = load i32, ptr %i10, align 4
   %cmp12 = icmp ne i32 %6, 10
   br i1 %cmp12, label %for.body13, label %for.end18
 
 for.body13:                                       ; preds = %for.cond11
-  %7 = load i32, i32* %i10, align 4
+  %7 = load i32, ptr %i10, align 4
   %idxprom14 = sext i32 %7 to i64
-  %arrayidx15 = getelementptr inbounds [10 x i32], [10 x i32]* %a, i64 0, i64 %idxprom14
-  store i32 0, i32* %arrayidx15, align 4
+  %arrayidx15 = getelementptr inbounds [10 x i32], ptr %a, i64 0, i64 %idxprom14
+  store i32 0, ptr %arrayidx15, align 4
   br label %for.inc16
 
 for.inc16:                                        ; preds = %for.body13
-  %8 = load i32, i32* %i10, align 4
+  %8 = load i32, ptr %i10, align 4
   %inc17 = add nsw i32 %8, 1
-  store i32 %inc17, i32* %i10, align 4
+  store i32 %inc17, ptr %i10, align 4
   br label %for.cond11, !llvm.loop !7
 
 for.end18:                                        ; preds = %for.cond11
-  store i32 0, i32* %i19, align 4
+  store i32 0, ptr %i19, align 4
   br label %for.cond20
 
 ; Per SPIR-V spec extension INTEL/SPV_INTEL_fpga_loop_controls,
@@ -120,25 +120,25 @@ for.end18:                                        ; preds = %for.cond11
 ; CHECK-SPIRV-NEXT: 4 BranchConditional {{[0-9]+}} {{[0-9]+}} {{[0-9]+}}
 ; CHECK-SPIRV-NEGATIVE-NOT: 5 LoopMerge {{[0-9]+}} {{[0-9]+}} 131072 2
 for.cond20:                                       ; preds = %for.inc25, %for.end18
-  %9 = load i32, i32* %i19, align 4
+  %9 = load i32, ptr %i19, align 4
   %cmp21 = icmp ne i32 %9, 10
   br i1 %cmp21, label %for.body22, label %for.end27
 
 for.body22:                                       ; preds = %for.cond20
-  %10 = load i32, i32* %i19, align 4
+  %10 = load i32, ptr %i19, align 4
   %idxprom23 = sext i32 %10 to i64
-  %arrayidx24 = getelementptr inbounds [10 x i32], [10 x i32]* %a, i64 0, i64 %idxprom23
-  store i32 0, i32* %arrayidx24, align 4
+  %arrayidx24 = getelementptr inbounds [10 x i32], ptr %a, i64 0, i64 %idxprom23
+  store i32 0, ptr %arrayidx24, align 4
   br label %for.inc25
 
 for.inc25:                                        ; preds = %for.body22
-  %11 = load i32, i32* %i19, align 4
+  %11 = load i32, ptr %i19, align 4
   %inc26 = add nsw i32 %11, 1
-  store i32 %inc26, i32* %i19, align 4
+  store i32 %inc26, ptr %i19, align 4
   br label %for.cond20, !llvm.loop !9
 
 for.end27:                                        ; preds = %for.cond20
-  store i32 0, i32* %i28, align 4
+  store i32 0, ptr %i28, align 4
   br label %for.cond29
 
 ; Per SPIR-V spec extension INTEL/SPV_INTEL_fpga_loop_controls,
@@ -147,21 +147,21 @@ for.end27:                                        ; preds = %for.cond20
 ; CHECK-SPIRV: 4 BranchConditional {{[0-9]+}} {{[0-9]+}} {{[0-9]+}}
 ; CHECK-SPIRV-NEGATIVE-NOT: 6 LoopMerge {{[0-9]+}} {{[0-9]+}} 196608 2 2
 for.cond29:                                       ; preds = %for.inc34, %for.end27
-  %12 = load i32, i32* %i28, align 4
+  %12 = load i32, ptr %i28, align 4
   %cmp30 = icmp ne i32 %12, 10
   br i1 %cmp30, label %for.body31, label %for.end36
 
 for.body31:                                       ; preds = %for.cond29
-  %13 = load i32, i32* %i28, align 4
+  %13 = load i32, ptr %i28, align 4
   %idxprom32 = sext i32 %13 to i64
-  %arrayidx33 = getelementptr inbounds [10 x i32], [10 x i32]* %a, i64 0, i64 %idxprom32
-  store i32 0, i32* %arrayidx33, align 4
+  %arrayidx33 = getelementptr inbounds [10 x i32], ptr %a, i64 0, i64 %idxprom32
+  store i32 0, ptr %arrayidx33, align 4
   br label %for.inc34
 
 for.inc34:                                        ; preds = %for.body31
-  %14 = load i32, i32* %i28, align 4
+  %14 = load i32, ptr %i28, align 4
   %inc35 = add nsw i32 %14, 1
-  store i32 %inc35, i32* %i28, align 4
+  store i32 %inc35, ptr %i28, align 4
   br label %for.cond29, !llvm.loop !11
 
 for.end36:                                        ; preds = %for.cond29
@@ -172,18 +172,16 @@ for.end36:                                        ; preds = %for.cond29
 define linkonce_odr dso_local spir_func void @_Z18loop_count_controlILi12EEvv() #0 {
 entry:
   %a = alloca [10 x i32], align 4
-  %a.ascast = addrspacecast [10 x i32]* %a to [10 x i32] addrspace(4)*
+  %a.ascast = addrspacecast ptr %a to ptr addrspace(4)
   %i = alloca i32, align 4
-  %i.ascast = addrspacecast i32* %i to i32 addrspace(4)*
+  %i.ascast = addrspacecast ptr %i to ptr addrspace(4)
   %cleanup.dest.slot = alloca i32, align 4
   %i1 = alloca i32, align 4
-  %i1.ascast = addrspacecast i32* %i1 to i32 addrspace(4)*
+  %i1.ascast = addrspacecast ptr %i1 to ptr addrspace(4)
   %cleanup.dest.slot5 = alloca i32, align 4
-  %0 = bitcast [10 x i32]* %a to i8*
-  call void @llvm.lifetime.start.p0i8(i64 40, i8* %0)
-  %1 = bitcast i32* %i to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %1)
-  store i32 0, i32 addrspace(4)* %i.ascast, align 4
+  call void @llvm.lifetime.start.p0(i64 40, ptr %a)
+  call void @llvm.lifetime.start.p0(i64 4, ptr %i)
+  store i32 0, ptr addrspace(4) %i.ascast, align 4
   br label %for.cond
 ; Per SPIR-V spec extension INTEL/SPV_INTEL_fpga_loop_controls,
 ; LoopControlLoopCountINTELMask = 0x1000000 (16777216)
@@ -191,32 +189,30 @@ entry:
 ; CHECK-SPIRV-NEXT: BranchConditional [[#]] [[#]] [[#]]
 ; CHECK-SPIRV-NEGATIVE-NOT: LoopMerge [[#]] [[#]] 16777216
 for.cond:                                         ; preds = %for.inc, %entry
-  %2 = load i32, i32 addrspace(4)* %i.ascast, align 4
-  %cmp = icmp ne i32 %2, 10
+  %0 = load i32, ptr addrspace(4) %i.ascast, align 4
+  %cmp = icmp ne i32 %0, 10
   br i1 %cmp, label %for.body, label %for.cond.cleanup
 
 for.cond.cleanup:                                 ; preds = %for.cond
-  %3 = bitcast i32* %i to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %3)
+  call void @llvm.lifetime.end.p0(i64 4, ptr %i)
   br label %for.end
 
 for.body:                                         ; preds = %for.cond
-  %4 = load i32, i32 addrspace(4)* %i.ascast, align 4
-  %idxprom = sext i32 %4 to i64
-  %arrayidx = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %a.ascast, i64 0, i64 %idxprom
-  store i32 0, i32 addrspace(4)* %arrayidx, align 4
+  %1 = load i32, ptr addrspace(4) %i.ascast, align 4
+  %idxprom = sext i32 %1 to i64
+  %arrayidx = getelementptr inbounds [10 x i32], ptr addrspace(4) %a.ascast, i64 0, i64 %idxprom
+  store i32 0, ptr addrspace(4) %arrayidx, align 4
   br label %for.inc
 
 for.inc:                                          ; preds = %for.body
-  %5 = load i32, i32 addrspace(4)* %i.ascast, align 4
-  %inc = add nsw i32 %5, 1
-  store i32 %inc, i32 addrspace(4)* %i.ascast, align 4
+  %2 = load i32, ptr addrspace(4) %i.ascast, align 4
+  %inc = add nsw i32 %2, 1
+  store i32 %inc, ptr addrspace(4) %i.ascast, align 4
   br label %for.cond, !llvm.loop !12
 
 for.end:                                          ; preds = %for.cond.cleanup
-  %6 = bitcast i32* %i1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %6)
-  store i32 0, i32 addrspace(4)* %i1.ascast, align 4
+  call void @llvm.lifetime.start.p0(i64 4, ptr %i1)
+  store i32 0, ptr addrspace(4) %i1.ascast, align 4
   br label %for.cond2
 
 ; Per SPIR-V spec extension INTEL/SPV_INTEL_fpga_loop_controls,
@@ -226,37 +222,35 @@ for.end:                                          ; preds = %for.cond.cleanup
 ; CHECK-SPIRV-NEXT: BranchConditional [[#]] [[#]] [[#]]
 ; CHECK-SPIRV-NEGATIVE-NOT: LoopMerge [[#]] [[#]] 16777216
 for.cond2:                                        ; preds = %for.inc9, %for.end
-  %7 = load i32, i32 addrspace(4)* %i1.ascast, align 4
-  %cmp3 = icmp ne i32 %7, 10
+  %3 = load i32, ptr addrspace(4) %i1.ascast, align 4
+  %cmp3 = icmp ne i32 %3, 10
   br i1 %cmp3, label %for.body6, label %for.cond.cleanup4
 
 for.cond.cleanup4:                                ; preds = %for.cond2
-  %8 = bitcast i32* %i1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %8)
+  call void @llvm.lifetime.end.p0(i64 4, ptr %i1)
   br label %for.end11
 
 for.body6:                                        ; preds = %for.cond2
-  %9 = load i32, i32 addrspace(4)* %i1.ascast, align 4
-  %idxprom7 = sext i32 %9 to i64
-  %arrayidx8 = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %a.ascast, i64 0, i64 %idxprom7
-  store i32 0, i32 addrspace(4)* %arrayidx8, align 4
+  %4 = load i32, ptr addrspace(4) %i1.ascast, align 4
+  %idxprom7 = sext i32 %4 to i64
+  %arrayidx8 = getelementptr inbounds [10 x i32], ptr addrspace(4) %a.ascast, i64 0, i64 %idxprom7
+  store i32 0, ptr addrspace(4) %arrayidx8, align 4
   br label %for.inc9
 
 for.inc9:                                         ; preds = %for.body6
-  %10 = load i32, i32 addrspace(4)* %i1.ascast, align 4
-  %inc10 = add nsw i32 %10, 1
-  store i32 %inc10, i32 addrspace(4)* %i1.ascast, align 4
+  %5 = load i32, ptr addrspace(4) %i1.ascast, align 4
+  %inc10 = add nsw i32 %5, 1
+  store i32 %inc10, ptr addrspace(4) %i1.ascast, align 4
   br label %for.cond2, !llvm.loop !15
 
 for.end11:                                        ; preds = %for.cond.cleanup4
-  %11 = bitcast [10 x i32]* %a to i8*
-  call void @llvm.lifetime.end.p0i8(i64 40, i8* %11) 
+  call void @llvm.lifetime.end.p0(i64 40, ptr %a) 
   ret void
 }
 
-declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture)
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
 
-declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture)
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)
 
 attributes #0 = { convergent noinline nounwind optnone "correctly-rounded-divide-sqrt-fp-math"="false" "denorms-are-zero"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "uniform-work-group-size"="true" "unsafe-fp-math"="false" "use-soft-float"="false" }
 
diff --git a/test/extensions/INTEL/SPV_INTEL_fpga_loop_controls/FPGALoopMergeInst.ll b/test/extensions/INTEL/SPV_INTEL_fpga_loop_controls/FPGALoopMergeInst.ll
index 1ff500473a..f749a39932 100644
--- a/test/extensions/INTEL/SPV_INTEL_fpga_loop_controls/FPGALoopMergeInst.ll
+++ b/test/extensions/INTEL/SPV_INTEL_fpga_loop_controls/FPGALoopMergeInst.ll
@@ -129,61 +129,57 @@ target triple = "spir64-unknown-linux"
 define dso_local spir_kernel void @_ZTSZ4mainE15kernel_function() #0 !kernel_arg_addr_space !4 !kernel_arg_access_qual !4 !kernel_arg_type !4 !kernel_arg_base_type !4 !kernel_arg_type_qual !4 {
 entry:
   %0 = alloca %"class._ZTSZ4mainE3$_0.anon", align 1
-  %1 = bitcast %"class._ZTSZ4mainE3$_0.anon"* %0 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %1) #4
-  %2 = addrspacecast %"class._ZTSZ4mainE3$_0.anon"* %0 to %"class._ZTSZ4mainE3$_0.anon" addrspace(4)*
-  call spir_func void @"_ZZ4mainENK3$_0clEv"(%"class._ZTSZ4mainE3$_0.anon" addrspace(4)* %2)
-  %3 = bitcast %"class._ZTSZ4mainE3$_0.anon"* %0 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %3) #4
+  call void @llvm.lifetime.start.p0(i64 1, ptr %0) #4
+  %1 = addrspacecast ptr %0 to ptr addrspace(4)
+  call spir_func void @"_ZZ4mainENK3$_0clEv"(ptr addrspace(4) %1)
+  call void @llvm.lifetime.end.p0(i64 1, ptr %0) #4
   ret void
 }
 
 ; Function Attrs: argmemonly nounwind willreturn
-declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #1
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
 
 ; Function Attrs: inlinehint nounwind
-define internal spir_func void @"_ZZ4mainENK3$_0clEv"(%"class._ZTSZ4mainE3$_0.anon" addrspace(4)* %this) #2 align 2 {
+define internal spir_func void @"_ZZ4mainENK3$_0clEv"(ptr addrspace(4) %this) #2 align 2 {
 entry:
-  %this.addr = alloca %"class._ZTSZ4mainE3$_0.anon" addrspace(4)*, align 8
-    store %"class._ZTSZ4mainE3$_0.anon" addrspace(4)* %this, %"class._ZTSZ4mainE3$_0.anon" addrspace(4)** %this.addr, align 8, !tbaa !5
-  %this1 = load %"class._ZTSZ4mainE3$_0.anon" addrspace(4)*, %"class._ZTSZ4mainE3$_0.anon" addrspace(4)** %this.addr, align 8
+  %this.addr = alloca ptr addrspace(4), align 8
+    store ptr addrspace(4) %this, ptr %this.addr, align 8, !tbaa !5
+  %this1 = load ptr addrspace(4), ptr %this.addr, align 8
   call spir_func void @_Z3foov()
   ret void
 }
 
 ; Function Attrs: argmemonly nounwind willreturn
-declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #1
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
 
 ; Function Attrs: nounwind
 define dso_local spir_func void @_Z3foov() #3 {
 entry:
   %i = alloca i32, align 4
   %m = alloca i32, align 4
-  %0 = bitcast i32* %i to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #4
-  store i32 0, i32* %i, align 4, !tbaa !9
-  %1 = bitcast i32* %m to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %1) #4
-  store i32 42, i32* %m, align 4, !tbaa !9
+  call void @llvm.lifetime.start.p0(i64 4, ptr %i) #4
+  store i32 0, ptr %i, align 4, !tbaa !9
+  call void @llvm.lifetime.start.p0(i64 4, ptr %m) #4
+  store i32 42, ptr %m, align 4, !tbaa !9
   br label %while.cond
 ; CHECK-SPIRV: 4 LoopMerge {{[0-9]+}} {{[0-9]+}} 4
 ; CHECK-SPIRV-NEXT: 4 BranchConditional {{[0-9]+}} {{[0-9]+}} {{[0-9]+}}
 while.cond:                                       ; preds = %if.end, %if.then, %entry
-  %2 = load i32, i32* %i, align 4, !tbaa !9
-  %3 = load i32, i32* %m, align 4, !tbaa !9
-  %cmp = icmp slt i32 %2, %3
+  %0 = load i32, ptr %i, align 4, !tbaa !9
+  %1 = load i32, ptr %m, align 4, !tbaa !9
+  %cmp = icmp slt i32 %0, %1
   br i1 %cmp, label %while.body, label %while.end
 
 while.body:                                       ; preds = %while.cond
-  %4 = load i32, i32* %i, align 4, !tbaa !9
-  %rem = srem i32 %4, 2
+  %2 = load i32, ptr %i, align 4, !tbaa !9
+  %rem = srem i32 %2, 2
   %tobool = icmp ne i32 %rem, 0
   br i1 %tobool, label %if.then, label %if.end
 
 if.then:                                          ; preds = %while.body
-  %5 = load i32, i32* %i, align 4, !tbaa !9
-  %inc = add nsw i32 %5, 1
-  store i32 %inc, i32* %i, align 4, !tbaa !9
+  %3 = load i32, ptr %i, align 4, !tbaa !9
+  %inc = add nsw i32 %3, 1
+  store i32 %inc, ptr %i, align 4, !tbaa !9
   br label %while.cond, !llvm.loop !11
 
 if.end:                                           ; preds = %while.body
@@ -196,21 +192,21 @@ while.end:                                        ; preds = %while.cond
 ; CHECK-SPIRV: 5 LoopMerge {{[0-9]+}} {{[0-9]+}} 65536 2
 ; CHECK-SPIRV-NEXT: 4 BranchConditional {{[0-9]+}} {{[0-9]+}} {{[0-9]+}}
 while.cond1:                                      ; preds = %if.end8, %if.then6, %while.end
-  %6 = load i32, i32* %i, align 4, !tbaa !9
-  %7 = load i32, i32* %m, align 4, !tbaa !9
-  %cmp2 = icmp slt i32 %6, %7
+  %4 = load i32, ptr %i, align 4, !tbaa !9
+  %5 = load i32, ptr %m, align 4, !tbaa !9
+  %cmp2 = icmp slt i32 %4, %5
   br i1 %cmp2, label %while.body3, label %while.end9
 
 while.body3:                                      ; preds = %while.cond1
-  %8 = load i32, i32* %i, align 4, !tbaa !9
-  %rem4 = srem i32 %8, 3
+  %6 = load i32, ptr %i, align 4, !tbaa !9
+  %rem4 = srem i32 %6, 3
   %tobool5 = icmp ne i32 %rem4, 0
   br i1 %tobool5, label %if.then6, label %if.end8
 
 if.then6:                                         ; preds = %while.body3
-  %9 = load i32, i32* %i, align 4, !tbaa !9
-  %inc7 = add nsw i32 %9, 1
-  store i32 %inc7, i32* %i, align 4, !tbaa !9
+  %7 = load i32, ptr %i, align 4, !tbaa !9
+  %inc7 = add nsw i32 %7, 1
+  store i32 %inc7, ptr %i, align 4, !tbaa !9
   br label %while.cond1, !llvm.loop !13
 
 if.end8:                                          ; preds = %while.body3
@@ -223,28 +219,28 @@ while.end9:                                       ; preds = %while.cond1
 ; CHECK-SPIRV: 5 LoopMerge {{[0-9]+}} {{[0-9]+}} 131072 4
 ; CHECK-SPIRV-NEXT: 4 BranchConditional {{[0-9]+}} {{[0-9]+}} {{[0-9]+}}
 while.cond10:                                     ; preds = %if.end17, %if.then15, %while.end9
-  %10 = load i32, i32* %i, align 4, !tbaa !9
-  %11 = load i32, i32* %m, align 4, !tbaa !9
-  %cmp11 = icmp slt i32 %10, %11
+  %8 = load i32, ptr %i, align 4, !tbaa !9
+  %9 = load i32, ptr %m, align 4, !tbaa !9
+  %cmp11 = icmp slt i32 %8, %9
   br i1 %cmp11, label %while.body12, label %while.end18
 
 while.body12:                                     ; preds = %while.cond10
-  %12 = load i32, i32* %i, align 4, !tbaa !9
-  %rem13 = srem i32 %12, 5
+  %10 = load i32, ptr %i, align 4, !tbaa !9
+  %rem13 = srem i32 %10, 5
   %tobool14 = icmp ne i32 %rem13, 0
   br i1 %tobool14, label %if.then15, label %if.end17
 
 if.then15:                                        ; preds = %while.body12
-  %13 = load i32, i32* %i, align 4, !tbaa !9
-  %inc16 = add nsw i32 %13, 1
-  store i32 %inc16, i32* %i, align 4, !tbaa !9
+  %11 = load i32, ptr %i, align 4, !tbaa !9
+  %inc16 = add nsw i32 %11, 1
+  store i32 %inc16, ptr %i, align 4, !tbaa !9
   br label %while.cond10, !llvm.loop !15
 
 if.end17:                                         ; preds = %while.body12
   br label %while.cond10, !llvm.loop !15
 
 while.end18:                                      ; preds = %while.cond10
-  store i32 0, i32* %i, align 4, !tbaa !9
+  store i32 0, ptr %i, align 4, !tbaa !9
   br label %while.cond19
 ; CHECK-SPIRV: 3 LoopControlINTEL 8 2
 ; CHECK-SPIRV-NEXT: 2 Branch [[FOR]]
@@ -252,20 +248,20 @@ while.cond19:                                     ; preds = %if.end29, %if.then2
   br label %while.body20
 
 while.body20:                                     ; preds = %while.cond19
-  %14 = load i32, i32* %i, align 4, !tbaa !9
-  %rem21 = srem i32 %14, 2
+  %12 = load i32, ptr %i, align 4, !tbaa !9
+  %rem21 = srem i32 %12, 2
   %tobool22 = icmp ne i32 %rem21, 0
   br i1 %tobool22, label %if.then23, label %if.end25
 
 if.then23:                                        ; preds = %while.body20
-  %15 = load i32, i32* %i, align 4, !tbaa !9
-  %inc24 = add nsw i32 %15, 1
-  store i32 %inc24, i32* %i, align 4, !tbaa !9
+  %13 = load i32, ptr %i, align 4, !tbaa !9
+  %inc24 = add nsw i32 %13, 1
+  store i32 %inc24, ptr %i, align 4, !tbaa !9
   br label %while.cond19, !llvm.loop !17
 
 if.end25:                                         ; preds = %while.body20
-  %16 = load i32, i32* %i, align 4, !tbaa !9
-  %rem26 = srem i32 %16, 2
+  %14 = load i32, ptr %i, align 4, !tbaa !9
+  %rem26 = srem i32 %14, 2
   %cmp27 = icmp ne i32 %rem26, 0
   br i1 %cmp27, label %if.then28, label %if.end29
 
@@ -276,10 +272,8 @@ if.end29:                                         ; preds = %if.end25
   br label %while.cond19, !llvm.loop !17
 
 while.end30:                                      ; preds = %if.then28
-  %17 = bitcast i32* %m to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %17) #4
-  %18 = bitcast i32* %i to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %18) #4
+  call void @llvm.lifetime.end.p0(i64 4, ptr %m) #4
+  call void @llvm.lifetime.end.p0(i64 4, ptr %i) #4
   ret void
 }
 
@@ -288,7 +282,7 @@ define spir_func void @loop_pipelining() #3 {
 entry:
   %a = alloca [10 x i32], align 4
   %i = alloca i32, align 4
-  store i32 0, i32* %i, align 4
+  store i32 0, ptr %i, align 4
   br label %for.cond
 
 ; Per SPIR-V spec, LoopControlPipelineEnableINTELMask = 0x80000 (524288)
@@ -296,21 +290,21 @@ entry:
 ; CHECK-SPIRV-NEXT: 4 BranchConditional {{[0-9]+}} {{[0-9]+}} {{[0-9]+}}
 ; CHECK-SPIRV-NEGATIVE-NOT: 5 LoopMerge {{[0-9]+}} {{[0-9]+}} 524288 1
 for.cond:                                         ; preds = %for.inc, %entry
-  %0 = load i32, i32* %i, align 4
+  %0 = load i32, ptr %i, align 4
   %cmp = icmp ne i32 %0, 10
   br i1 %cmp, label %for.body, label %for.end
 
 for.body:                                         ; preds = %for.cond
-  %1 = load i32, i32* %i, align 4
+  %1 = load i32, ptr %i, align 4
   %idxprom = sext i32 %1 to i64
-  %arrayidx = getelementptr inbounds [10 x i32], [10 x i32]* %a, i64 0, i64 %idxprom
-  store i32 0, i32* %arrayidx, align 4
+  %arrayidx = getelementptr inbounds [10 x i32], ptr %a, i64 0, i64 %idxprom
+  store i32 0, ptr %arrayidx, align 4
   br label %for.inc
 
 for.inc:                                          ; preds = %for.body
-  %2 = load i32, i32* %i, align 4
+  %2 = load i32, ptr %i, align 4
   %inc = add nsw i32 %2, 1
-  store i32 %inc, i32* %i, align 4
+  store i32 %inc, ptr %i, align 4
   br label %for.cond, !llvm.loop !19
 
 for.end:                                          ; preds = %for.cond
@@ -322,8 +316,8 @@ define spir_func void @loop_coalesce() #3 {
 entry:
   %i = alloca i32, align 4
   %m = alloca i32, align 4
-  store i32 0, i32* %i, align 4
-  store i32 42, i32* %m, align 4
+  store i32 0, ptr %i, align 4
+  store i32 42, ptr %m, align 4
   br label %while.cond
 
 ; Per SPIR-V spec, LoopControlLoopCoalesceINTELMask = 0x100000 (1048576)
@@ -331,28 +325,28 @@ entry:
 ; CHECK-SPIRV-NEXT: 4 BranchConditional {{[0-9]+}} {{[0-9]+}} {{[0-9]+}}
 ; CHECK-SPIRV-NEGATIVE-NOT: 5 LoopMerge {{[0-9]+}} {{[0-9]+}} 1048576 4
 while.cond:                                       ; preds = %if.end, %if.then, %entry
-  %0 = load i32, i32* %i, align 4
-  %1 = load i32, i32* %m, align 4
+  %0 = load i32, ptr %i, align 4
+  %1 = load i32, ptr %m, align 4
   %cmp = icmp slt i32 %0, %1
   br i1 %cmp, label %while.body, label %while.end
 
 while.body:                                       ; preds = %while.cond
-  %2 = load i32, i32* %i, align 4
+  %2 = load i32, ptr %i, align 4
   %rem = srem i32 %2, 2
   %tobool = icmp ne i32 %rem, 0
   br i1 %tobool, label %if.then, label %if.end
 
 if.then:                                          ; preds = %while.body
-  %3 = load i32, i32* %i, align 4
+  %3 = load i32, ptr %i, align 4
   %inc = add nsw i32 %3, 1
-  store i32 %inc, i32* %i, align 4
+  store i32 %inc, ptr %i, align 4
   br label %while.cond, !llvm.loop !21
 
 if.end:                                           ; preds = %while.body
   br label %while.cond, !llvm.loop !21
 
 while.end:                                        ; preds = %while.cond
-  store i32 0, i32* %i, align 4
+  store i32 0, ptr %i, align 4
   br label %while.cond1
 
 ; Per SPIR-V spec, LoopControlLoopCoalesceINTELMask = 0x100000 (1048576)
@@ -360,21 +354,21 @@ while.end:                                        ; preds = %while.cond
 ; CHECK-SPIRV-NEXT: 4 BranchConditional {{[0-9]+}} {{[0-9]+}} {{[0-9]+}}
 ; CHECK-SPIRV-NEGATIVE-NOT: 5 LoopMerge {{[0-9]+}} {{[0-9]+}} 1048576 0
 while.cond1:                                      ; preds = %if.end8, %if.then6, %while.end
-  %4 = load i32, i32* %i, align 4
-  %5 = load i32, i32* %m, align 4
+  %4 = load i32, ptr %i, align 4
+  %5 = load i32, ptr %m, align 4
   %cmp2 = icmp slt i32 %4, %5
   br i1 %cmp2, label %while.body3, label %while.end9
 
 while.body3:                                      ; preds = %while.cond1
-  %6 = load i32, i32* %i, align 4
+  %6 = load i32, ptr %i, align 4
   %rem4 = srem i32 %6, 3
   %tobool5 = icmp ne i32 %rem4, 0
   br i1 %tobool5, label %if.then6, label %if.end8
 
 if.then6:                                         ; preds = %while.body3
-  %7 = load i32, i32* %i, align 4
+  %7 = load i32, ptr %i, align 4
   %inc7 = add nsw i32 %7, 1
-  store i32 %inc7, i32* %i, align 4
+  store i32 %inc7, ptr %i, align 4
   br label %while.cond1, !llvm.loop !23
 
 if.end8:                                          ; preds = %while.body3
@@ -389,7 +383,7 @@ define spir_func void @max_interleaving() #3 {
 entry:
   %a = alloca [10 x i32], align 4
   %i = alloca i32, align 4
-  store i32 0, i32* %i, align 4
+  store i32 0, ptr %i, align 4
   br label %for.cond
 
 ; Per SPIR-V spec, LoopControlMaxInterleavingINTELMask = 0x200000 (2097152)
@@ -397,21 +391,21 @@ entry:
 ; CHECK-SPIRV-NEXT: 4 BranchConditional {{[0-9]+}} {{[0-9]+}} {{[0-9]+}}
 ; CHECK-SPIRV-NEGATIVE-NOT: 5 LoopMerge {{[0-9]+}} {{[0-9]+}} 2097152 3
 for.cond:                                         ; preds = %for.inc, %entry
-  %0 = load i32, i32* %i, align 4
+  %0 = load i32, ptr %i, align 4
   %cmp = icmp ne i32 %0, 10
   br i1 %cmp, label %for.body, label %for.end
 
 for.body:                                         ; preds = %for.cond
-  %1 = load i32, i32* %i, align 4
+  %1 = load i32, ptr %i, align 4
   %idxprom = sext i32 %1 to i64
-  %arrayidx = getelementptr inbounds [10 x i32], [10 x i32]* %a, i64 0, i64 %idxprom
-  store i32 0, i32* %arrayidx, align 4
+  %arrayidx = getelementptr inbounds [10 x i32], ptr %a, i64 0, i64 %idxprom
+  store i32 0, ptr %arrayidx, align 4
   br label %for.inc
 
 for.inc:                                          ; preds = %for.body
-  %2 = load i32, i32* %i, align 4
+  %2 = load i32, ptr %i, align 4
   %inc = add nsw i32 %2, 1
-  store i32 %inc, i32* %i, align 4
+  store i32 %inc, ptr %i, align 4
   br label %for.cond, !llvm.loop !25
 
 for.end:                                          ; preds = %for.cond
@@ -423,7 +417,7 @@ define spir_func void @speculated_iterations() #3 {
 entry:
   %a = alloca [10 x i32], align 4
   %i = alloca i32, align 4
-  store i32 0, i32* %i, align 4
+  store i32 0, ptr %i, align 4
   br label %for.cond
 
 ; Per SPIR-V spec, LoopControlSpeculatedIterationsINTELMask = 0x400000 (4194304)
@@ -431,21 +425,21 @@ entry:
 ; CHECK-SPIRV-NEXT: 4 BranchConditional {{[0-9]+}} {{[0-9]+}} {{[0-9]+}}
 ; CHECK-SPIRV-NEGATIVE-NOT: 5 LoopMerge {{[0-9]+}} {{[0-9]+}} 4194304 4
 for.cond:                                         ; preds = %for.inc, %entry
-  %0 = load i32, i32* %i, align 4
+  %0 = load i32, ptr %i, align 4
   %cmp = icmp ne i32 %0, 10
   br i1 %cmp, label %for.body, label %for.end
 
 for.body:                                         ; preds = %for.cond
-  %1 = load i32, i32* %i, align 4
+  %1 = load i32, ptr %i, align 4
   %idxprom = sext i32 %1 to i64
-  %arrayidx = getelementptr inbounds [10 x i32], [10 x i32]* %a, i64 0, i64 %idxprom
-  store i32 0, i32* %arrayidx, align 4
+  %arrayidx = getelementptr inbounds [10 x i32], ptr %a, i64 0, i64 %idxprom
+  store i32 0, ptr %arrayidx, align 4
   br label %for.inc
 
 for.inc:                                          ; preds = %for.body
-  %2 = load i32, i32* %i, align 4
+  %2 = load i32, ptr %i, align 4
   %inc = add nsw i32 %2, 1
-  store i32 %inc, i32* %i, align 4
+  store i32 %inc, ptr %i, align 4
   br label %for.cond, !llvm.loop !27
 
 for.end:                                          ; preds = %for.cond
@@ -457,7 +451,7 @@ define spir_func void @nofusion() #3 {
 entry:
   %a = alloca [10 x i32], align 4
   %i = alloca i32, align 4
-  store i32 0, i32* %i, align 4
+  store i32 0, ptr %i, align 4
   br label %for.cond
 
 ; Per SPIR-V spec, LoopControlNoFusionINTELMask = 0x800000 (8388608)
@@ -465,21 +459,21 @@ entry:
 ; CHECK-SPIRV-NEXT: 4 BranchConditional {{[0-9]+}} {{[0-9]+}} {{[0-9]+}}
 ; CHECK-SPIRV-NEGATIVE-NOT: 4 LoopMerge {{[0-9]+}} {{[0-9]+}} 8388608
 for.cond:                                         ; preds = %for.inc, %entry
-  %0 = load i32, i32* %i, align 4
+  %0 = load i32, ptr %i, align 4
   %cmp = icmp ne i32 %0, 10
   br i1 %cmp, label %for.body, label %for.end
 
 for.body:                                         ; preds = %for.cond
-  %1 = load i32, i32* %i, align 4
+  %1 = load i32, ptr %i, align 4
   %idxprom = sext i32 %1 to i64
-  %arrayidx = getelementptr inbounds [10 x i32], [10 x i32]* %a, i64 0, i64 %idxprom
-  store i32 0, i32* %arrayidx, align 4
+  %arrayidx = getelementptr inbounds [10 x i32], ptr %a, i64 0, i64 %idxprom
+  store i32 0, ptr %arrayidx, align 4
   br label %for.inc
 
 for.inc:                                          ; preds = %for.body
-  %2 = load i32, i32* %i, align 4
+  %2 = load i32, ptr %i, align 4
   %inc = add nsw i32 %2, 1
-  store i32 %inc, i32* %i, align 4
+  store i32 %inc, ptr %i, align 4
   br label %for.cond, !llvm.loop !29
 
 for.end:                                          ; preds = %for.cond
@@ -491,7 +485,7 @@ define spir_func void @max_reinvocation_delay() #3 {
 entry:
   %a = alloca [10 x i32], align 4
   %i = alloca i32, align 4
-  store i32 0, i32* %i, align 4
+  store i32 0, ptr %i, align 4
   br label %for.cond
 
 ; Per SPIR-V spec, LoopControlMaxReinvocationDelayINTELMask = 0x2000000 (33554432)
@@ -499,21 +493,21 @@ entry:
 ; CHECK-SPIRV-NEXT: 4 BranchConditional {{[0-9]+}} {{[0-9]+}} {{[0-9]+}}
 ; CHECK-SPIRV-NEGATIVE-NOT: 5 LoopMerge {{[0-9]+}} {{[0-9]+}} 33554432 2
 for.cond:                                         ; preds = %for.inc, %entry
-  %0 = load i32, i32* %i, align 4
+  %0 = load i32, ptr %i, align 4
   %cmp = icmp ne i32 %0, 10
   br i1 %cmp, label %for.body, label %for.end
 
 for.body:                                         ; preds = %for.cond
-  %1 = load i32, i32* %i, align 4
+  %1 = load i32, ptr %i, align 4
   %idxprom = sext i32 %1 to i64
-  %arrayidx = getelementptr inbounds [10 x i32], [10 x i32]* %a, i64 0, i64 %idxprom
-  store i32 0, i32* %arrayidx, align 4
+  %arrayidx = getelementptr inbounds [10 x i32], ptr %a, i64 0, i64 %idxprom
+  store i32 0, ptr %arrayidx, align 4
   br label %for.inc
 
 for.inc:                                          ; preds = %for.body
-  %2 = load i32, i32* %i, align 4
+  %2 = load i32, ptr %i, align 4
   %inc = add nsw i32 %2, 1
-  store i32 %inc, i32* %i, align 4
+  store i32 %inc, ptr %i, align 4
   br label %for.cond, !llvm.loop !31
 
 for.end:                                          ; preds = %for.cond
diff --git a/test/extensions/INTEL/SPV_INTEL_fpga_loop_controls/intel_multiple_fpga_loop_attrs.ll b/test/extensions/INTEL/SPV_INTEL_fpga_loop_controls/intel_multiple_fpga_loop_attrs.ll
index 4edb2f8b74..4e86c6d499 100644
--- a/test/extensions/INTEL/SPV_INTEL_fpga_loop_controls/intel_multiple_fpga_loop_attrs.ll
+++ b/test/extensions/INTEL/SPV_INTEL_fpga_loop_controls/intel_multiple_fpga_loop_attrs.ll
@@ -43,72 +43,68 @@ define spir_func void @_Z4testv() #0 {
 entry:
   %a = alloca [10 x i32], align 4
   %i = alloca i32, align 4
-  %0 = bitcast [10 x i32]* %a to i8*
-  call void @llvm.lifetime.start.p0i8(i64 40, i8* %0) #4
-  %1 = bitcast i32* %i to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %1) #4
-  store i32 0, i32* %i, align 4, !tbaa !2
+  call void @llvm.lifetime.start.p0(i64 40, ptr %a) #4
+  call void @llvm.lifetime.start.p0(i64 4, ptr %i) #4
+  store i32 0, ptr %i, align 4, !tbaa !2
   br label %for.cond
 
 for.cond:                                         ; preds = %for.inc, %entry
-  %2 = load i32, i32* %i, align 4, !tbaa !2
-  %cmp = icmp ne i32 %2, 10
+  %0 = load i32, ptr %i, align 4, !tbaa !2
+  %cmp = icmp ne i32 %0, 10
   br i1 %cmp, label %for.body, label %for.cond.cleanup
 
 for.cond.cleanup:                                 ; preds = %for.cond
-  %3 = bitcast i32* %i to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %3) #4
+  call void @llvm.lifetime.end.p0(i64 4, ptr %i) #4
   br label %for.end
 
 for.body:                                         ; preds = %for.cond
-  %4 = load i32, i32* %i, align 4, !tbaa !2
-  %idxprom = sext i32 %4 to i64
-  %arrayidx = getelementptr inbounds [10 x i32], [10 x i32]* %a, i64 0, i64 %idxprom, !llvm.index.group !6
-  store i32 0, i32* %arrayidx, align 4, !tbaa !2
+  %1 = load i32, ptr %i, align 4, !tbaa !2
+  %idxprom = sext i32 %1 to i64
+  %arrayidx = getelementptr inbounds [10 x i32], ptr %a, i64 0, i64 %idxprom, !llvm.index.group !6
+  store i32 0, ptr %arrayidx, align 4, !tbaa !2
   br label %for.inc
 
 for.inc:                                          ; preds = %for.body
-  %5 = load i32, i32* %i, align 4, !tbaa !2
-  %inc = add nsw i32 %5, 1
-  store i32 %inc, i32* %i, align 4, !tbaa !2
+  %2 = load i32, ptr %i, align 4, !tbaa !2
+  %inc = add nsw i32 %2, 1
+  store i32 %inc, ptr %i, align 4, !tbaa !2
   br label %for.cond, !llvm.loop !7
 
 for.end:                                          ; preds = %for.cond.cleanup
-  %6 = bitcast [10 x i32]* %a to i8*
-  call void @llvm.lifetime.end.p0i8(i64 40, i8* %6) #4
+  call void @llvm.lifetime.end.p0(i64 40, ptr %a) #4
   ret void
 }
 
 ; Function Attrs: argmemonly nounwind willreturn
-declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #1
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
 
 ; Function Attrs: argmemonly nounwind willreturn
-declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #1
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
 
 ; Function Attrs: norecurse nounwind
 define i32 @main() #2 {
 entry:
   %retval = alloca i32, align 4
   %agg.tmp = alloca %class.anon, align 1
-  store i32 0, i32* %retval, align 4
-  call spir_func void @"_Z18kernel_single_taskIZ4mainE15kernel_functionZ4mainE3$_0EvT0_"(%class.anon* byval(%class.anon) align 1 %agg.tmp)
+  store i32 0, ptr %retval, align 4
+  call spir_func void @"_Z18kernel_single_taskIZ4mainE15kernel_functionZ4mainE3$_0EvT0_"(ptr byval(%class.anon) align 1 %agg.tmp)
   ret i32 0
 }
 
 ; Function Attrs: nounwind
-define internal spir_func void @"_Z18kernel_single_taskIZ4mainE15kernel_functionZ4mainE3$_0EvT0_"(%class.anon* byval(%class.anon) align 1 %kernelFunc) #0 {
+define internal spir_func void @"_Z18kernel_single_taskIZ4mainE15kernel_functionZ4mainE3$_0EvT0_"(ptr byval(%class.anon) align 1 %kernelFunc) #0 {
 entry:
-  %0 = addrspacecast %class.anon* %kernelFunc to %class.anon addrspace(4)*
-  call spir_func void @"_ZZ4mainENK3$_0clEv"(%class.anon addrspace(4)* %0)
+  %0 = addrspacecast ptr %kernelFunc to ptr addrspace(4)
+  call spir_func void @"_ZZ4mainENK3$_0clEv"(ptr addrspace(4) %0)
   ret void
 }
 
 ; Function Attrs: inlinehint nounwind
-define internal spir_func void @"_ZZ4mainENK3$_0clEv"(%class.anon addrspace(4)* %this) #3 align 2 {
+define internal spir_func void @"_ZZ4mainENK3$_0clEv"(ptr addrspace(4) %this) #3 align 2 {
 entry:
-  %this.addr = alloca %class.anon addrspace(4)*, align 8
-  store %class.anon addrspace(4)* %this, %class.anon addrspace(4)** %this.addr, align 8, !tbaa !13
-  %this1 = load %class.anon addrspace(4)*, %class.anon addrspace(4)** %this.addr, align 8
+  %this.addr = alloca ptr addrspace(4), align 8
+  store ptr addrspace(4) %this, ptr %this.addr, align 8, !tbaa !13
+  %this1 = load ptr addrspace(4), ptr %this.addr, align 8
   call spir_func void @_Z4testv()
   ret void
 }
diff --git a/test/extensions/INTEL/SPV_INTEL_fpga_memory_attributes/IntelFPGAMemoryAttributes.ll b/test/extensions/INTEL/SPV_INTEL_fpga_memory_attributes/IntelFPGAMemoryAttributes.ll
index 1183c4c13f..b62a27ed7e 100644
--- a/test/extensions/INTEL/SPV_INTEL_fpga_memory_attributes/IntelFPGAMemoryAttributes.ll
+++ b/test/extensions/INTEL/SPV_INTEL_fpga_memory_attributes/IntelFPGAMemoryAttributes.ll
@@ -334,23 +334,21 @@ target triple = "spir"
 define spir_kernel void @_ZTSZ4mainE15kernel_function() #0 !kernel_arg_addr_space !4 !kernel_arg_access_qual !4 !kernel_arg_type !4 !kernel_arg_base_type !4 !kernel_arg_type_qual !4 {
 entry:
   %0 = alloca %class.anon, align 1
-  %1 = bitcast %class.anon* %0 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %1) #5
-  call spir_func void @"_ZZ4mainENK3$_0clEv"(%class.anon* %0)
-  %2 = bitcast %class.anon* %0 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %2) #5
+  call void @llvm.lifetime.start.p0(i64 1, ptr %0) #5
+  call spir_func void @"_ZZ4mainENK3$_0clEv"(ptr %0)
+  call void @llvm.lifetime.end.p0(i64 1, ptr %0) #5
   ret void
 }
 
 ; Function Attrs: argmemonly nounwind willreturn
-declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #1
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
 
 ; Function Attrs: inlinehint norecurse nounwind
-define internal spir_func void @"_ZZ4mainENK3$_0clEv"(%class.anon* %this) #2 align 2 {
+define internal spir_func void @"_ZZ4mainENK3$_0clEv"(ptr %this) #2 align 2 {
 entry:
-  %this.addr = alloca %class.anon*, align 4
-  store %class.anon* %this, %class.anon** %this.addr, align 4, !tbaa !5
-  %this1 = load %class.anon*, %class.anon** %this.addr, align 4
+  %this.addr = alloca ptr, align 4
+  store ptr %this, ptr %this.addr, align 4, !tbaa !5
+  %this1 = load ptr, ptr %this.addr, align 4
   call spir_func void @_Z13numbanks_attrv()
   call spir_func void @_Z19templ_numbanks_attrILi4EEvv()
   call spir_func void @_Z13register_attrv()
@@ -374,32 +372,25 @@ entry:
 }
 
 ; Function Attrs: argmemonly nounwind willreturn
-declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #1
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
 
 ; Function Attrs: nounwind willreturn
-declare void @llvm.var.annotation(i8*, i8*, i8*, i32, i8*) #4
+declare void @llvm.var.annotation(ptr, ptr, ptr, i32, ptr) #4
 
 ; Function Attrs: norecurse nounwind
 define spir_func void @_Z13numbanks_attrv() #3 {
 entry:
   %numbanks_var = alloca i32, align 4
   %s = alloca %struct.numbanks_st, align 4
-  %0 = bitcast i32* %numbanks_var to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #5
-  %numbanks_var1 = bitcast i32* %numbanks_var to i8*
+  call void @llvm.lifetime.start.p0(i64 4, ptr %numbanks_var) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_NMB_VAR]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %numbanks_var1, i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 2, i8* null)
-  %1 = bitcast %struct.numbanks_st* %s to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %1) #5
-  %s2 = bitcast %struct.numbanks_st* %s to i8*
+  call void @llvm.var.annotation(ptr %numbanks_var, ptr @.str, ptr @.str.1, i32 2, ptr null)
+  call void @llvm.lifetime.start.p0(i64 4, ptr %s) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_NMB_SCT]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %s2, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str.2, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 6, i8* null)
-  %field = getelementptr inbounds %struct.numbanks_st, %struct.numbanks_st* %s, i32 0, i32 0
-  store i32 0, i32* %field, align 4, !tbaa !9
-  %2 = bitcast %struct.numbanks_st* %s to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %2) #5
-  %3 = bitcast i32* %numbanks_var to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %3) #5
+  call void @llvm.var.annotation(ptr %s, ptr @.str.2, ptr @.str.1, i32 6, ptr null)
+  store i32 0, ptr %s, align 4, !tbaa !9
+  call void @llvm.lifetime.end.p0(i64 4, ptr %s) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %numbanks_var) #5
   ret void
 }
 
@@ -408,22 +399,15 @@ define linkonce_odr spir_func void @_Z19templ_numbanks_attrILi4EEvv() #3 {
 entry:
   %templ_numbanks_var = alloca i32, align 4
   %s = alloca %struct.templ_numbanks_st, align 4
-  %0 = bitcast i32* %templ_numbanks_var to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #5
-  %templ_numbanks_var1 = bitcast i32* %templ_numbanks_var to i8*
+  call void @llvm.lifetime.start.p0(i64 4, ptr %templ_numbanks_var) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_NMB_TE]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %templ_numbanks_var1, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str.3, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 12, i8* null)
-  %1 = bitcast %struct.templ_numbanks_st* %s to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %1) #5
-  %s2 = bitcast %struct.templ_numbanks_st* %s to i8*
+  call void @llvm.var.annotation(ptr %templ_numbanks_var, ptr @.str.3, ptr @.str.1, i32 12, ptr null)
+  call void @llvm.lifetime.start.p0(i64 4, ptr %s) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_NMB_TE]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %s2, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str.3, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 16, i8* null)
-  %field = getelementptr inbounds %struct.templ_numbanks_st, %struct.templ_numbanks_st* %s, i32 0, i32 0
-  store i32 0, i32* %field, align 4, !tbaa !12
-  %2 = bitcast %struct.templ_numbanks_st* %s to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %2) #5
-  %3 = bitcast i32* %templ_numbanks_var to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %3) #5
+  call void @llvm.var.annotation(ptr %s, ptr @.str.3, ptr @.str.1, i32 16, ptr null)
+  store i32 0, ptr %s, align 4, !tbaa !12
+  call void @llvm.lifetime.end.p0(i64 4, ptr %s) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %templ_numbanks_var) #5
   ret void
 }
 
@@ -432,22 +416,15 @@ define spir_func void @_Z13register_attrv() #3 {
 entry:
   %register_var = alloca i32, align 4
   %s = alloca %struct.register_st, align 4
-  %0 = bitcast i32* %register_var to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #5
-  %register_var1 = bitcast i32* %register_var to i8*
+  call void @llvm.lifetime.start.p0(i64 4, ptr %register_var) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_REG_VAR]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %register_var1, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.4, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 21, i8* null)
-  %1 = bitcast %struct.register_st* %s to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %1) #5
-  %s2 = bitcast %struct.register_st* %s to i8*
+  call void @llvm.var.annotation(ptr %register_var, ptr @.str.4, ptr @.str.1, i32 21, ptr null)
+  call void @llvm.lifetime.start.p0(i64 4, ptr %s) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_REG_VAR]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %s2, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.4, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 25, i8* null)
-  %field = getelementptr inbounds %struct.register_st, %struct.register_st* %s, i32 0, i32 0
-  store i32 0, i32* %field, align 4, !tbaa !14
-  %2 = bitcast %struct.register_st* %s to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %2) #5
-  %3 = bitcast i32* %register_var to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %3) #5
+  call void @llvm.var.annotation(ptr %s, ptr @.str.4, ptr @.str.1, i32 25, ptr null)
+  store i32 0, ptr %s, align 4, !tbaa !14
+  call void @llvm.lifetime.end.p0(i64 4, ptr %s) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %register_var) #5
   ret void
 }
 
@@ -456,24 +433,15 @@ define spir_func void @_Z11memory_attrv() #3 {
 entry:
   %memory_var = alloca [500 x i32], align 4
   %s = alloca %struct.memory_st, align 4
-  %0 = bitcast [500 x i32]* %memory_var to i8*
-  call void @llvm.lifetime.start.p0i8(i64 2000, i8* %0) #5
-  %memory_var1 = bitcast [500 x i32]* %memory_var to i8*
+  call void @llvm.lifetime.start.p0(i64 2000, ptr %memory_var) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_MEM_VAR]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %memory_var1, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.5, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 30, i8* null)
-  %1 = bitcast %struct.memory_st* %s to i8*
-  call void @llvm.lifetime.start.p0i8(i64 80, i8* %1) #5
-  %s2 = bitcast %struct.memory_st* %s to i8*
+  call void @llvm.var.annotation(ptr %memory_var, ptr @.str.5, ptr @.str.1, i32 30, ptr null)
+  call void @llvm.lifetime.start.p0(i64 80, ptr %s) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_MEM_SCT]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %s2, i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str.6, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 34, i8* null)
-  %field = getelementptr inbounds %struct.memory_st, %struct.memory_st* %s, i32 0, i32 0
-  %arrayidx = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* %field, i64 0, i64 0
-  %arrayidx3 = getelementptr inbounds [2 x i32], [2 x i32]* %arrayidx, i64 0, i64 0
-  store i32 0, i32* %arrayidx3, align 4, !tbaa !16
-  %2 = bitcast %struct.memory_st* %s to i8*
-  call void @llvm.lifetime.end.p0i8(i64 80, i8* %2) #5
-  %3 = bitcast [500 x i32]* %memory_var to i8*
-  call void @llvm.lifetime.end.p0i8(i64 2000, i8* %3) #5
+  call void @llvm.var.annotation(ptr %s, ptr @.str.6, ptr @.str.1, i32 34, ptr null)
+  store i32 0, ptr %s, align 4, !tbaa !16
+  call void @llvm.lifetime.end.p0(i64 80, ptr %s) #5
+  call void @llvm.lifetime.end.p0(i64 2000, ptr %memory_var) #5
   ret void
 }
 
@@ -482,22 +450,15 @@ define spir_func void @_Z14bankwidth_attrv() #3 {
 entry:
   %bankwidth_var = alloca i32, align 4
   %s = alloca %struct.bankwidth_st, align 4
-  %0 = bitcast i32* %bankwidth_var to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #5
-  %bankwidth_var1 = bitcast i32* %bankwidth_var to i8*
+  call void @llvm.lifetime.start.p0(i64 4, ptr %bankwidth_var) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_BWD_VAR]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %bankwidth_var1, i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str.7, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 39, i8* null)
-  %1 = bitcast %struct.bankwidth_st* %s to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %1) #5
-  %s2 = bitcast %struct.bankwidth_st* %s to i8*
+  call void @llvm.var.annotation(ptr %bankwidth_var, ptr @.str.7, ptr @.str.1, i32 39, ptr null)
+  call void @llvm.lifetime.start.p0(i64 4, ptr %s) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_BWD_SCT]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %s2, i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str.8, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 43, i8* null)
-  %field = getelementptr inbounds %struct.bankwidth_st, %struct.bankwidth_st* %s, i32 0, i32 0
-  store i32 0, i32* %field, align 4, !tbaa !17
-  %2 = bitcast %struct.bankwidth_st* %s to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %2) #5
-  %3 = bitcast i32* %bankwidth_var to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %3) #5
+  call void @llvm.var.annotation(ptr %s, ptr @.str.8, ptr @.str.1, i32 43, ptr null)
+  store i32 0, ptr %s, align 4, !tbaa !17
+  call void @llvm.lifetime.end.p0(i64 4, ptr %s) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %bankwidth_var) #5
   ret void
 }
 
@@ -506,22 +467,15 @@ define linkonce_odr spir_func void @_Z20templ_bankwidth_attrILi16EEvv() #3 {
 entry:
   %templ_bankwidth_var = alloca i32, align 4
   %s = alloca %struct.templ_bankwidth_st, align 4
-  %0 = bitcast i32* %templ_bankwidth_var to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #5
-  %templ_bankwidth_var1 = bitcast i32* %templ_bankwidth_var to i8*
+  call void @llvm.lifetime.start.p0(i64 4, ptr %templ_bankwidth_var) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_BWD_TE]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %templ_bankwidth_var1, i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str.9, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 49, i8* null)
-  %1 = bitcast %struct.templ_bankwidth_st* %s to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %1) #5
-  %s2 = bitcast %struct.templ_bankwidth_st* %s to i8*
+  call void @llvm.var.annotation(ptr %templ_bankwidth_var, ptr @.str.9, ptr @.str.1, i32 49, ptr null)
+  call void @llvm.lifetime.start.p0(i64 4, ptr %s) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_BWD_TE]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %s2, i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str.9, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 53, i8* null)
-  %field = getelementptr inbounds %struct.templ_bankwidth_st, %struct.templ_bankwidth_st* %s, i32 0, i32 0
-  store i32 0, i32* %field, align 4, !tbaa !19
-  %2 = bitcast %struct.templ_bankwidth_st* %s to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %2) #5
-  %3 = bitcast i32* %templ_bankwidth_var to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %3) #5
+  call void @llvm.var.annotation(ptr %s, ptr @.str.9, ptr @.str.1, i32 53, ptr null)
+  store i32 0, ptr %s, align 4, !tbaa !19
+  call void @llvm.lifetime.end.p0(i64 4, ptr %s) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %templ_bankwidth_var) #5
   ret void
 }
 
@@ -530,22 +484,15 @@ define spir_func void @_Z19private_copies_attrv() #3 {
 entry:
   %priv_copies_var = alloca i32, align 4
   %s = alloca %struct.priv_copies_st, align 4
-  %0 = bitcast i32* %priv_copies_var to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #5
-  %priv_copies_var1 = bitcast i32* %priv_copies_var to i8*
+  call void @llvm.lifetime.start.p0(i64 4, ptr %priv_copies_var) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_PRC_VAR]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %priv_copies_var1, i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str.10, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 58, i8* null)
-  %1 = bitcast %struct.priv_copies_st* %s to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %1) #5
-  %s2 = bitcast %struct.priv_copies_st* %s to i8*
+  call void @llvm.var.annotation(ptr %priv_copies_var, ptr @.str.10, ptr @.str.1, i32 58, ptr null)
+  call void @llvm.lifetime.start.p0(i64 4, ptr %s) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_PRC_SCT]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %s2, i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str.11, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 62, i8* null)
-  %field = getelementptr inbounds %struct.priv_copies_st, %struct.priv_copies_st* %s, i32 0, i32 0
-  store i32 0, i32* %field, align 4, !tbaa !21
-  %2 = bitcast %struct.priv_copies_st* %s to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %2) #5
-  %3 = bitcast i32* %priv_copies_var to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %3) #5
+  call void @llvm.var.annotation(ptr %s, ptr @.str.11, ptr @.str.1, i32 62, ptr null)
+  store i32 0, ptr %s, align 4, !tbaa !21
+  call void @llvm.lifetime.end.p0(i64 4, ptr %s) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %priv_copies_var) #5
   ret void
 }
 
@@ -554,22 +501,15 @@ define linkonce_odr spir_func void @_Z25templ_private_copies_attrILi8EEvv() #3 {
 entry:
   %templ_priv_copies_var = alloca i32, align 4
   %s = alloca %struct.templ_priv_copies_st, align 4
-  %0 = bitcast i32* %templ_priv_copies_var to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #5
-  %templ_priv_copies_var1 = bitcast i32* %templ_priv_copies_var to i8*
+  call void @llvm.lifetime.start.p0(i64 4, ptr %templ_priv_copies_var) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_PRC_TE]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %templ_priv_copies_var1, i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str.12, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 68, i8* null)
-  %1 = bitcast %struct.templ_priv_copies_st* %s to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %1) #5
-  %s2 = bitcast %struct.templ_priv_copies_st* %s to i8*
+  call void @llvm.var.annotation(ptr %templ_priv_copies_var, ptr @.str.12, ptr @.str.1, i32 68, ptr null)
+  call void @llvm.lifetime.start.p0(i64 4, ptr %s) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_PRC_TE]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %s2, i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str.12, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 72, i8* null)
-  %field = getelementptr inbounds %struct.templ_priv_copies_st, %struct.templ_priv_copies_st* %s, i32 0, i32 0
-  store i32 0, i32* %field, align 4, !tbaa !23
-  %2 = bitcast %struct.templ_priv_copies_st* %s to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %2) #5
-  %3 = bitcast i32* %templ_priv_copies_var to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %3) #5
+  call void @llvm.var.annotation(ptr %s, ptr @.str.12, ptr @.str.1, i32 72, ptr null)
+  store i32 0, ptr %s, align 4, !tbaa !23
+  call void @llvm.lifetime.end.p0(i64 4, ptr %s) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %templ_priv_copies_var) #5
   ret void
 }
 
@@ -578,22 +518,15 @@ define spir_func void @_Z15singlepump_attrv() #3 {
 entry:
   %singlepump_var = alloca i32, align 4
   %s = alloca %struct.singlepump_st, align 4
-  %0 = bitcast i32* %singlepump_var to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #5
-  %singlepump_var1 = bitcast i32* %singlepump_var to i8*
+  call void @llvm.lifetime.start.p0(i64 4, ptr %singlepump_var) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_SNP_VAR]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %singlepump_var1, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str.13, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 77, i8* null)
-  %1 = bitcast %struct.singlepump_st* %s to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %1) #5
-  %s2 = bitcast %struct.singlepump_st* %s to i8*
+  call void @llvm.var.annotation(ptr %singlepump_var, ptr @.str.13, ptr @.str.1, i32 77, ptr null)
+  call void @llvm.lifetime.start.p0(i64 4, ptr %s) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_SNP_VAR]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %s2, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str.13, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 81, i8* null)
-  %field = getelementptr inbounds %struct.singlepump_st, %struct.singlepump_st* %s, i32 0, i32 0
-  store i32 0, i32* %field, align 4, !tbaa !25
-  %2 = bitcast %struct.singlepump_st* %s to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %2) #5
-  %3 = bitcast i32* %singlepump_var to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %3) #5
+  call void @llvm.var.annotation(ptr %s, ptr @.str.13, ptr @.str.1, i32 81, ptr null)
+  store i32 0, ptr %s, align 4, !tbaa !25
+  call void @llvm.lifetime.end.p0(i64 4, ptr %s) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %singlepump_var) #5
   ret void
 }
 
@@ -602,22 +535,15 @@ define spir_func void @_Z15doublepump_attrv() #3 {
 entry:
   %doublepump_var = alloca i32, align 4
   %s = alloca %struct.doublepump_st, align 4
-  %0 = bitcast i32* %doublepump_var to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #5
-  %doublepump_var1 = bitcast i32* %doublepump_var to i8*
+  call void @llvm.lifetime.start.p0(i64 4, ptr %doublepump_var) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_DBP_VAR]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %doublepump_var1, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str.14, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 86, i8* null)
-  %1 = bitcast %struct.doublepump_st* %s to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %1) #5
-  %s2 = bitcast %struct.doublepump_st* %s to i8*
+  call void @llvm.var.annotation(ptr %doublepump_var, ptr @.str.14, ptr @.str.1, i32 86, ptr null)
+  call void @llvm.lifetime.start.p0(i64 4, ptr %s) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_DBP_VAR]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %s2, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str.14, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 90, i8* null)
-  %field = getelementptr inbounds %struct.doublepump_st, %struct.doublepump_st* %s, i32 0, i32 0
-  store i32 0, i32* %field, align 4, !tbaa !27
-  %2 = bitcast %struct.doublepump_st* %s to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %2) #5
-  %3 = bitcast i32* %doublepump_var to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %3) #5
+  call void @llvm.var.annotation(ptr %s, ptr @.str.14, ptr @.str.1, i32 90, ptr null)
+  store i32 0, ptr %s, align 4, !tbaa !27
+  call void @llvm.lifetime.end.p0(i64 4, ptr %s) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %doublepump_var) #5
   ret void
 }
 
@@ -626,22 +552,15 @@ define spir_func void @_Z10merge_attrv() #3 {
 entry:
   %merge_var = alloca i32, align 4
   %s = alloca %struct.merge_st, align 4
-  %0 = bitcast i32* %merge_var to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #5
-  %merge_var1 = bitcast i32* %merge_var to i8*
+  call void @llvm.lifetime.start.p0(i64 4, ptr %merge_var) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_MRG_VAR]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %merge_var1, i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str.15, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 95, i8* null)
-  %1 = bitcast %struct.merge_st* %s to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %1) #5
-  %s2 = bitcast %struct.merge_st* %s to i8*
+  call void @llvm.var.annotation(ptr %merge_var, ptr @.str.15, ptr @.str.1, i32 95, ptr null)
+  call void @llvm.lifetime.start.p0(i64 4, ptr %s) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_MRG_SCT]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %s2, i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str.16, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 99, i8* null)
-  %field = getelementptr inbounds %struct.merge_st, %struct.merge_st* %s, i32 0, i32 0
-  store i32 0, i32* %field, align 4, !tbaa !29
-  %2 = bitcast %struct.merge_st* %s to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %2) #5
-  %3 = bitcast i32* %merge_var to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %3) #5
+  call void @llvm.var.annotation(ptr %s, ptr @.str.16, ptr @.str.1, i32 99, ptr null)
+  store i32 0, ptr %s, align 4, !tbaa !29
+  call void @llvm.lifetime.end.p0(i64 4, ptr %s) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %merge_var) #5
   ret void
 }
 
@@ -650,22 +569,15 @@ define spir_func void @_Z19max_replicates_attrv() #3 {
 entry:
   %max_repl_var = alloca i32, align 4
   %s = alloca %struct.max_repl_st, align 4
-  %0 = bitcast i32* %max_repl_var to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #5
-  %max_repl_var1 = bitcast i32* %max_repl_var to i8*
+  call void @llvm.lifetime.start.p0(i64 4, ptr %max_repl_var) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_MXR_VAR]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %max_repl_var1, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.17, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 104, i8* null)
-  %1 = bitcast %struct.max_repl_st* %s to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %1) #5
-  %s2 = bitcast %struct.max_repl_st* %s to i8*
+  call void @llvm.var.annotation(ptr %max_repl_var, ptr @.str.17, ptr @.str.1, i32 104, ptr null)
+  call void @llvm.lifetime.start.p0(i64 4, ptr %s) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_MXR_SCT]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %s2, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.18, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 108, i8* null)
-  %field = getelementptr inbounds %struct.max_repl_st, %struct.max_repl_st* %s, i32 0, i32 0
-  store i32 0, i32* %field, align 4, !tbaa !31
-  %2 = bitcast %struct.max_repl_st* %s to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %2) #5
-  %3 = bitcast i32* %max_repl_var to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %3) #5
+  call void @llvm.var.annotation(ptr %s, ptr @.str.18, ptr @.str.1, i32 108, ptr null)
+  store i32 0, ptr %s, align 4, !tbaa !31
+  call void @llvm.lifetime.end.p0(i64 4, ptr %s) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %max_repl_var) #5
   ret void
 }
 
@@ -674,22 +586,15 @@ define linkonce_odr spir_func void @_Z25templ_max_replicates_attrILi8EEvv() #3 {
 entry:
   %templ_max_repl_var = alloca i32, align 4
   %s = alloca %struct.templ_max_repl_st, align 4
-  %0 = bitcast i32* %templ_max_repl_var to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #5
-  %templ_max_repl_var1 = bitcast i32* %templ_max_repl_var to i8*
+  call void @llvm.lifetime.start.p0(i64 4, ptr %templ_max_repl_var) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_MXR_TE]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %templ_max_repl_var1, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.19, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 114, i8* null)
-  %1 = bitcast %struct.templ_max_repl_st* %s to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %1) #5
-  %s2 = bitcast %struct.templ_max_repl_st* %s to i8*
+  call void @llvm.var.annotation(ptr %templ_max_repl_var, ptr @.str.19, ptr @.str.1, i32 114, ptr null)
+  call void @llvm.lifetime.start.p0(i64 4, ptr %s) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_MXR_TE]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %s2, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.19, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 118, i8* null)
-  %field = getelementptr inbounds %struct.templ_max_repl_st, %struct.templ_max_repl_st* %s, i32 0, i32 0
-  store i32 0, i32* %field, align 4, !tbaa !33
-  %2 = bitcast %struct.templ_max_repl_st* %s to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %2) #5
-  %3 = bitcast i32* %templ_max_repl_var to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %3) #5
+  call void @llvm.var.annotation(ptr %s, ptr @.str.19, ptr @.str.1, i32 118, ptr null)
+  store i32 0, ptr %s, align 4, !tbaa !33
+  call void @llvm.lifetime.end.p0(i64 4, ptr %s) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %templ_max_repl_var) #5
   ret void
 }
 
@@ -698,22 +603,15 @@ define spir_func void @_Z21simple_dual_port_attrv() #3 {
 entry:
   %simple_dual_port_var = alloca i32, align 4
   %s = alloca %struct.simple_dual_port_st, align 4
-  %0 = bitcast i32* %simple_dual_port_var to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #5
-  %simple_dual_port_var1 = bitcast i32* %simple_dual_port_var to i8*
+  call void @llvm.lifetime.start.p0(i64 4, ptr %simple_dual_port_var) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_SDP_VAR]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %simple_dual_port_var1, i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str.20, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 123, i8* null)
-  %1 = bitcast %struct.simple_dual_port_st* %s to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %1) #5
-  %s2 = bitcast %struct.simple_dual_port_st* %s to i8*
+  call void @llvm.var.annotation(ptr %simple_dual_port_var, ptr @.str.20, ptr @.str.1, i32 123, ptr null)
+  call void @llvm.lifetime.start.p0(i64 4, ptr %s) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_SDP_VAR]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %s2, i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str.20, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 127, i8* null)
-  %field = getelementptr inbounds %struct.simple_dual_port_st, %struct.simple_dual_port_st* %s, i32 0, i32 0
-  store i32 0, i32* %field, align 4, !tbaa !35
-  %2 = bitcast %struct.simple_dual_port_st* %s to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %2) #5
-  %3 = bitcast i32* %simple_dual_port_var to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %3) #5
+  call void @llvm.var.annotation(ptr %s, ptr @.str.20, ptr @.str.1, i32 127, ptr null)
+  store i32 0, ptr %s, align 4, !tbaa !35
+  call void @llvm.lifetime.end.p0(i64 4, ptr %s) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %simple_dual_port_var) #5
   ret void
 }
 
@@ -722,22 +620,15 @@ define spir_func void @_Z14bank_bits_attrv() #3 {
 entry:
   %bank_bits_var = alloca i32, align 4
   %s = alloca %struct.bank_bits_st, align 4
-  %0 = bitcast i32* %bank_bits_var to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #5
-  %bank_bits_var1 = bitcast i32* %bank_bits_var to i8*
+  call void @llvm.lifetime.start.p0(i64 4, ptr %bank_bits_var) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_BBT_VAR]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %bank_bits_var1, i8* getelementptr inbounds ([58 x i8], [58 x i8]* @.str.21, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 132, i8* null)
-  %1 = bitcast %struct.bank_bits_st* %s to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %1) #5
-  %s2 = bitcast %struct.bank_bits_st* %s to i8*
+  call void @llvm.var.annotation(ptr %bank_bits_var, ptr @.str.21, ptr @.str.1, i32 132, ptr null)
+  call void @llvm.lifetime.start.p0(i64 4, ptr %s) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_BBT_SCT]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %s2, i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str.22, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 136, i8* null)
-  %field = getelementptr inbounds %struct.bank_bits_st, %struct.bank_bits_st* %s, i32 0, i32 0
-  store i32 0, i32* %field, align 4, !tbaa !37
-  %2 = bitcast %struct.bank_bits_st* %s to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %2) #5
-  %3 = bitcast i32* %bank_bits_var to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %3) #5
+  call void @llvm.var.annotation(ptr %s, ptr @.str.22, ptr @.str.1, i32 136, ptr null)
+  store i32 0, ptr %s, align 4, !tbaa !37
+  call void @llvm.lifetime.end.p0(i64 4, ptr %s) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %bank_bits_var) #5
   ret void
 }
 
@@ -746,22 +637,15 @@ define linkonce_odr spir_func void @_Z20templ_bank_bits_attrILi4ELi5EEvv() #3 {
 entry:
   %templ_bank_bits_var = alloca i32, align 4
   %s = alloca %struct.templ_bank_bits_st, align 4
-  %0 = bitcast i32* %templ_bank_bits_var to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #5
-  %templ_bank_bits_var1 = bitcast i32* %templ_bank_bits_var to i8*
+  call void @llvm.lifetime.start.p0(i64 4, ptr %templ_bank_bits_var) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_BBT_TE1]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %templ_bank_bits_var1, i8* getelementptr inbounds ([56 x i8], [56 x i8]* @.str.23, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 142, i8* null)
-  %1 = bitcast %struct.templ_bank_bits_st* %s to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %1) #5
-  %s2 = bitcast %struct.templ_bank_bits_st* %s to i8*
+  call void @llvm.var.annotation(ptr %templ_bank_bits_var, ptr @.str.23, ptr @.str.1, i32 142, ptr null)
+  call void @llvm.lifetime.start.p0(i64 4, ptr %s) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_BBT_TE2]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %s2, i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str.24, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 146, i8* null)
-  %field = getelementptr inbounds %struct.templ_bank_bits_st, %struct.templ_bank_bits_st* %s, i32 0, i32 0
-  store i32 0, i32* %field, align 4, !tbaa !39
-  %2 = bitcast %struct.templ_bank_bits_st* %s to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %2) #5
-  %3 = bitcast i32* %templ_bank_bits_var to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %3) #5
+  call void @llvm.var.annotation(ptr %s, ptr @.str.24, ptr @.str.1, i32 146, ptr null)
+  store i32 0, ptr %s, align 4, !tbaa !39
+  call void @llvm.lifetime.end.p0(i64 4, ptr %s) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %templ_bank_bits_var) #5
   ret void
 }
 
@@ -770,22 +654,15 @@ define spir_func void @_Z21force_pow2_depth_attrv() #3 {
 entry:
   %fp2d_var = alloca i32, align 4
   %s = alloca %struct.fp2d_st, align 4
-  %0 = bitcast i32* %fp2d_var to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #5
-  %fp2d_var1 = bitcast i32* %fp2d_var to i8*
+  call void @llvm.lifetime.start.p0(i64 4, ptr %fp2d_var) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_FP2_VAR]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %fp2d_var1, i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str.25, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 151, i8* null)
-  %1 = bitcast %struct.fp2d_st* %s to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %1) #5
-  %s2 = bitcast %struct.fp2d_st* %s to i8*
+  call void @llvm.var.annotation(ptr %fp2d_var, ptr @.str.25, ptr @.str.1, i32 151, ptr null)
+  call void @llvm.lifetime.start.p0(i64 4, ptr %s) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_FP2_SCT]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %s2, i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str.26, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 155, i8* null)
-  %field = getelementptr inbounds %struct.fp2d_st, %struct.fp2d_st* %s, i32 0, i32 0
-  store i32 0, i32* %field, align 4, !tbaa !41
-  %2 = bitcast %struct.fp2d_st* %s to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %2) #5
-  %3 = bitcast i32* %fp2d_var to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %3) #5
+  call void @llvm.var.annotation(ptr %s, ptr @.str.26, ptr @.str.1, i32 155, ptr null)
+  store i32 0, ptr %s, align 4, !tbaa !41
+  call void @llvm.lifetime.end.p0(i64 4, ptr %s) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %fp2d_var) #5
   ret void
 }
 
@@ -794,22 +671,15 @@ define linkonce_odr spir_func void @_Z27templ_force_pow2_depth_attrILi1EEvv() #3
 entry:
   %templ_fp2d_var = alloca i32, align 4
   %s = alloca %struct.templ_fp2d_st, align 4
-  %0 = bitcast i32* %templ_fp2d_var to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #5
-  %templ_fp2d_var1 = bitcast i32* %templ_fp2d_var to i8*
+  call void @llvm.lifetime.start.p0(i64 4, ptr %templ_fp2d_var) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_FP2_SCT]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %templ_fp2d_var1, i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str.26, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 161, i8* null)
-  %1 = bitcast %struct.templ_fp2d_st* %s to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %1) #5
-  %s2 = bitcast %struct.templ_fp2d_st* %s to i8*
+  call void @llvm.var.annotation(ptr %templ_fp2d_var, ptr @.str.26, ptr @.str.1, i32 161, ptr null)
+  call void @llvm.lifetime.start.p0(i64 4, ptr %s) #5
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_]+}}, ptr [[STR_FP2_SCT]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %s2, i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str.26, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 165, i8* null)
-  %field = getelementptr inbounds %struct.templ_fp2d_st, %struct.templ_fp2d_st* %s, i32 0, i32 0
-  store i32 0, i32* %field, align 4, !tbaa !43
-  %2 = bitcast %struct.templ_fp2d_st* %s to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %2) #5
-  %3 = bitcast i32* %templ_fp2d_var to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %3) #5
+  call void @llvm.var.annotation(ptr %s, ptr @.str.26, ptr @.str.1, i32 165, ptr null)
+  store i32 0, ptr %s, align 4, !tbaa !43
+  call void @llvm.lifetime.end.p0(i64 4, ptr %s) #5
+  call void @llvm.lifetime.end.p0(i64 4, ptr %templ_fp2d_var) #5
   ret void
 }
 
@@ -817,11 +687,10 @@ entry:
 define dso_local spir_func void @_Z25memory_attribute_on_arrayv() #2 {
 entry:
   %register_var = alloca [32 x i32], align 4
-  %register_var.ascast = addrspacecast [32 x i32]* %register_var to [32 x i32] addrspace(4)*
-  %register_var.ascast1 = bitcast [32 x i32] addrspace(4)* %register_var.ascast to i8 addrspace(4)*
-  %register_var.ascast2 = addrspacecast i8 addrspace(4)* %register_var.ascast1 to i8*
+  %register_var.ascast = addrspacecast ptr %register_var to ptr addrspace(4)
+  %register_var.ascast2 = addrspacecast ptr addrspace(4) %register_var.ascast to ptr
   ; CHECK-LLVM: call void @llvm.var.annotation.p0.p0(ptr %{{[a-zA-Z0-9_.]+}}, ptr [[STR_REG_VAR]], ptr undef, i32 undef, ptr undef)
-  call void @llvm.var.annotation(i8* %register_var.ascast2, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.4, i32 0, i32 0), i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i32 0, i32 0), i32 2, i8* null)
+  call void @llvm.var.annotation(ptr %register_var.ascast2, ptr @.str.4, ptr @.str.1, i32 2, ptr null)
   ret void
 }
 
diff --git a/test/extensions/INTEL/SPV_INTEL_fpga_memory_attributes/IntelFPGAMemoryAttributesForStaticVar.ll b/test/extensions/INTEL/SPV_INTEL_fpga_memory_attributes/IntelFPGAMemoryAttributesForStaticVar.ll
index 9c465e0c86..f236b5e3d4 100644
--- a/test/extensions/INTEL/SPV_INTEL_fpga_memory_attributes/IntelFPGAMemoryAttributesForStaticVar.ll
+++ b/test/extensions/INTEL/SPV_INTEL_fpga_memory_attributes/IntelFPGAMemoryAttributesForStaticVar.ll
@@ -74,29 +74,27 @@ target triple = "spir"
 @.str.3 = private unnamed_addr constant [10 x i8] c"foobarbaz\00", section "llvm.metadata"
 @_ZZ21force_pow2_depth_statiE9fp2d_stat = internal addrspace(1) constant i32 4, align 4
 @.str.4 = private unnamed_addr constant [49 x i8] c"{memory:DEFAULT}{sizeinfo:4}{force_pow2_depth:0}\00", section "llvm.metadata"
-@llvm.global.annotations = appending global [4 x { i8*, i8*, i8*, i32 }] [{ i8*, i8*, i8*, i32 } { i8* addrspacecast (i8 addrspace(1)* bitcast (i32 addrspace(1)* @_ZZ13numbanks_statiE5a_one to i8 addrspace(1)*) to i8*), i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str.1, i32 0, i32 0), i32 2 }, { i8*, i8*, i8*, i32 } { i8* addrspacecast (i8 addrspace(1)* @_ZZ11memory_statcE5b_one to i8*), i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.2, i32 0, i32 0), i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str.1, i32 0, i32 0), i32 7 }, { i8*, i8*, i8*, i32 } { i8* addrspacecast (i8 addrspace(1)* bitcast (i32 addrspace(1)* @_ZZ13annotate_statiE5c_one to i8 addrspace(1)*) to i8*), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.3, i32 0, i32 0), i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str.1, i32 0, i32 0), i32 12 }, { i8*, i8*, i8*, i32 } { i8* addrspacecast (i8 addrspace(1)* bitcast (i32 addrspace(1)* @_ZZ21force_pow2_depth_statiE9fp2d_stat to i8 addrspace(1)*) to i8*), i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str.4, i32 0, i32 0), i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str.1, i32 0, i32 0), i32 17 }], section "llvm.metadata"
+@llvm.global.annotations = appending global [4 x { ptr, ptr, ptr, i32 }] [{ ptr, ptr, ptr, i32 } { ptr addrspacecast (ptr addrspace(1) @_ZZ13numbanks_statiE5a_one to ptr), ptr @.str, ptr @.str.1, i32 2 }, { ptr, ptr, ptr, i32 } { ptr addrspacecast (ptr addrspace(1) @_ZZ11memory_statcE5b_one to ptr), ptr @.str.2, ptr @.str.1, i32 7 }, { ptr, ptr, ptr, i32 } { ptr addrspacecast (ptr addrspace(1) @_ZZ13annotate_statiE5c_one to ptr), ptr @.str.3, ptr @.str.1, i32 12 }, { ptr, ptr, ptr, i32 } { ptr addrspacecast (ptr addrspace(1) @_ZZ21force_pow2_depth_statiE9fp2d_stat to ptr), ptr @.str.4, ptr @.str.1, i32 17 }], section "llvm.metadata"
 
 ; Function Attrs: norecurse nounwind
 define spir_kernel void @_ZTSZ4mainE15kernel_function() #0 !kernel_arg_addr_space !4 !kernel_arg_access_qual !4 !kernel_arg_type !4 !kernel_arg_base_type !4 !kernel_arg_type_qual !4 {
 entry:
   %0 = alloca %class.anon, align 1
-  %1 = bitcast %class.anon* %0 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %1) #4
-  call spir_func void @"_ZZ4mainENK3$_0clEv"(%class.anon* %0)
-  %2 = bitcast %class.anon* %0 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %2) #4
+  call void @llvm.lifetime.start.p0(i64 1, ptr %0) #4
+  call spir_func void @"_ZZ4mainENK3$_0clEv"(ptr %0)
+  call void @llvm.lifetime.end.p0(i64 1, ptr %0) #4
   ret void
 }
 
 ; Function Attrs: argmemonly nounwind willreturn
-declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #1
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
 
 ; Function Attrs: inlinehint norecurse nounwind
-define internal spir_func void @"_ZZ4mainENK3$_0clEv"(%class.anon* %this) #2 align 2 {
+define internal spir_func void @"_ZZ4mainENK3$_0clEv"(ptr %this) #2 align 2 {
 entry:
-  %this.addr = alloca %class.anon*, align 4
-  store %class.anon* %this, %class.anon** %this.addr, align 4, !tbaa !5
-  %this1 = load %class.anon*, %class.anon** %this.addr, align 4
+  %this.addr = alloca ptr, align 4
+  store ptr %this, ptr %this.addr, align 4, !tbaa !5
+  %this1 = load ptr, ptr %this.addr, align 4
   call spir_func void @_Z13numbanks_stati(i32 128)
   call spir_func void @_Z11memory_statc(i8 signext 42)
   call spir_func void @_Z13annotate_stati(i32 16)
@@ -105,7 +103,7 @@ entry:
 }
 
 ; Function Attrs: argmemonly nounwind willreturn
-declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #1
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
 
 ; CHECK-LLVM: void @_Z13numbanks_stati(i32 %a)
 ; Function Attrs: norecurse nounwind
@@ -113,14 +111,12 @@ define spir_func void @_Z13numbanks_stati(i32 %a) #3 {
 entry:
   %a.addr = alloca i32, align 4
   %a_two = alloca i32, align 4
-  store i32 %a, i32* %a.addr, align 4, !tbaa !9
-  %0 = bitcast i32* %a_two to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #4
-  %1 = load i32, i32* %a.addr, align 4, !tbaa !9
-  %add = add nsw i32 1, %1
-  store i32 %add, i32* %a_two, align 4, !tbaa !9
-  %2 = bitcast i32* %a_two to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %2) #4
+  store i32 %a, ptr %a.addr, align 4, !tbaa !9
+  call void @llvm.lifetime.start.p0(i64 4, ptr %a_two) #4
+  %0 = load i32, ptr %a.addr, align 4, !tbaa !9
+  %add = add nsw i32 1, %0
+  store i32 %add, ptr %a_two, align 4, !tbaa !9
+  call void @llvm.lifetime.end.p0(i64 4, ptr %a_two) #4
   ret void
 }
 
@@ -130,14 +126,14 @@ define spir_func void @_Z11memory_statc(i8 signext %b) #3 {
 entry:
   %b.addr = alloca i8, align 1
   %b_two = alloca i8, align 1
-  store i8 %b, i8* %b.addr, align 1, !tbaa !11
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %b_two) #4
-  %0 = load i8, i8* %b.addr, align 1, !tbaa !11
+  store i8 %b, ptr %b.addr, align 1, !tbaa !11
+  call void @llvm.lifetime.start.p0(i64 1, ptr %b_two) #4
+  %0 = load i8, ptr %b.addr, align 1, !tbaa !11
   %conv = sext i8 %0 to i32
   %add = add nsw i32 2, %conv
   %conv1 = trunc i32 %add to i8
-  store i8 %conv1, i8* %b_two, align 1, !tbaa !11
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %b_two) #4
+  store i8 %conv1, ptr %b_two, align 1, !tbaa !11
+  call void @llvm.lifetime.end.p0(i64 1, ptr %b_two) #4
   ret void
 }
 
@@ -147,14 +143,12 @@ define spir_func void @_Z13annotate_stati(i32 %c) #3 {
 entry:
   %c.addr = alloca i32, align 4
   %c_two = alloca i32, align 4
-  store i32 %c, i32* %c.addr, align 4, !tbaa !9
-  %0 = bitcast i32* %c_two to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #4
-  %1 = load i32, i32* %c.addr, align 4, !tbaa !9
-  %add = add nsw i32 3, %1
-  store i32 %add, i32* %c_two, align 4, !tbaa !9
-  %2 = bitcast i32* %c_two to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %2) #4
+  store i32 %c, ptr %c.addr, align 4, !tbaa !9
+  call void @llvm.lifetime.start.p0(i64 4, ptr %c_two) #4
+  %0 = load i32, ptr %c.addr, align 4, !tbaa !9
+  %add = add nsw i32 3, %0
+  store i32 %add, ptr %c_two, align 4, !tbaa !9
+  call void @llvm.lifetime.end.p0(i64 4, ptr %c_two) #4
   ret void
 }
 
@@ -164,14 +158,12 @@ define spir_func void @_Z21force_pow2_depth_stati(i32 %fp2d) #3 {
 entry:
   %fp2d.addr = alloca i32, align 4
   %fp2d_loc = alloca i32, align 4
-  store i32 %fp2d, i32* %fp2d.addr, align 4, !tbaa !9
-  %0 = bitcast i32* %fp2d_loc to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #4
-  %1 = load i32, i32* %fp2d.addr, align 4, !tbaa !9
-  %add = add nsw i32 4, %1
-  store i32 %add, i32* %fp2d_loc, align 4, !tbaa !9
-  %2 = bitcast i32* %fp2d_loc to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %2) #4
+  store i32 %fp2d, ptr %fp2d.addr, align 4, !tbaa !9
+  call void @llvm.lifetime.start.p0(i64 4, ptr %fp2d_loc) #4
+  %0 = load i32, ptr %fp2d.addr, align 4, !tbaa !9
+  %add = add nsw i32 4, %0
+  store i32 %add, ptr %fp2d_loc, align 4, !tbaa !9
+  call void @llvm.lifetime.end.p0(i64 4, ptr %fp2d_loc) #4
   ret void
 }
 
diff --git a/test/extensions/INTEL/SPV_INTEL_fpga_reg/IntelFPGAReg.ll b/test/extensions/INTEL/SPV_INTEL_fpga_reg/IntelFPGAReg.ll
index 6eaf65db60..5c08ec0039 100644
--- a/test/extensions/INTEL/SPV_INTEL_fpga_reg/IntelFPGAReg.ll
+++ b/test/extensions/INTEL/SPV_INTEL_fpga_reg/IntelFPGAReg.ll
@@ -108,30 +108,28 @@ $_ZN1AC2Ei = comdat any
 define spir_kernel void @_ZTSZ4mainE11fake_kernel() #0 !kernel_arg_addr_space !4 !kernel_arg_access_qual !4 !kernel_arg_type !4 !kernel_arg_base_type !4 !kernel_arg_type_qual !4 {
 entry:
   %0 = alloca %"class._ZTSZ4mainE3$_0.anon", align 1
-  %1 = bitcast %"class._ZTSZ4mainE3$_0.anon"* %0 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %1) #4
-  %2 = addrspacecast %"class._ZTSZ4mainE3$_0.anon"* %0 to %"class._ZTSZ4mainE3$_0.anon" addrspace(4)*
-  call spir_func void @"_ZZ4mainENK3$_0clEv"(%"class._ZTSZ4mainE3$_0.anon" addrspace(4)* %2)
-  %3 = bitcast %"class._ZTSZ4mainE3$_0.anon"* %0 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %3) #4
+  call void @llvm.lifetime.start.p0(i64 1, ptr %0) #4
+  %1 = addrspacecast ptr %0 to ptr addrspace(4)
+  call spir_func void @"_ZZ4mainENK3$_0clEv"(ptr addrspace(4) %1)
+  call void @llvm.lifetime.end.p0(i64 1, ptr %0) #4
   ret void
 }
 
 ; Function Attrs: argmemonly nounwind
-declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #1
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
 
 ; Function Attrs: inlinehint nounwind
-define internal spir_func void @"_ZZ4mainENK3$_0clEv"(%"class._ZTSZ4mainE3$_0.anon" addrspace(4)* %this) #2 align 2 {
+define internal spir_func void @"_ZZ4mainENK3$_0clEv"(ptr addrspace(4) %this) #2 align 2 {
 entry:
-  %this.addr = alloca %"class._ZTSZ4mainE3$_0.anon" addrspace(4)*, align 8
-  store %"class._ZTSZ4mainE3$_0.anon" addrspace(4)* %this, %"class._ZTSZ4mainE3$_0.anon" addrspace(4)** %this.addr, align 8, !tbaa !5
-  %this1 = load %"class._ZTSZ4mainE3$_0.anon" addrspace(4)*, %"class._ZTSZ4mainE3$_0.anon" addrspace(4)** %this.addr, align 8
+  %this.addr = alloca ptr addrspace(4), align 8
+  store ptr addrspace(4) %this, ptr %this.addr, align 8, !tbaa !5
+  %this1 = load ptr addrspace(4), ptr %this.addr, align 8
   call spir_func void @_Z3foov()
   ret void
 }
 
 ; Function Attrs: argmemonly nounwind
-declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #1
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
 
 ; Function Attrs: nounwind
 define spir_func void @_Z3foov() #3 {
@@ -151,272 +149,191 @@ entry:
   %iii = alloca %struct._ZTS2st.st, align 4
   %ref.tmp = alloca %struct._ZTS2st.st, align 4
   %agg-temp2 = alloca %struct._ZTS2st.st, align 4
-  %iiii = alloca %struct._ZTS2st.st addrspace(4)*, align 8
+  %iiii = alloca ptr addrspace(4), align 8
   %u1 = alloca %union._ZTS2un.un, align 4
   %u2 = alloca %union._ZTS2un.un, align 4
-  %u3 = alloca %union._ZTS2un.un addrspace(4)*, align 8
+  %u3 = alloca ptr addrspace(4), align 8
   %ref.tmp3 = alloca %union._ZTS2un.un, align 4
   %agg-temp4 = alloca %union._ZTS2un.un, align 4
   %ca = alloca %class._ZTS1A.A, align 4
   %cb = alloca %class._ZTS1A.A, align 4
   %agg-temp5 = alloca %class._ZTS1A.A, align 4
-  %ap = alloca i32 addrspace(4)*, align 8
-  %bp = alloca i32 addrspace(4)*, align 8
-  %0 = bitcast i32* %a to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #4
-  store i32 123, i32* %a, align 4, !tbaa !9
-  %1 = bitcast i32* %myA to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %1) #4
-  store i32 321, i32* %myA, align 4, !tbaa !9
-  %2 = bitcast i32* %b to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %2) #4
-  %3 = load i32, i32* %a, align 4, !tbaa !9
+  %ap = alloca ptr addrspace(4), align 8
+  %bp = alloca ptr addrspace(4), align 8
+  call void @llvm.lifetime.start.p0(i64 4, ptr %a) #4
+  store i32 123, ptr %a, align 4, !tbaa !9
+  call void @llvm.lifetime.start.p0(i64 4, ptr %myA) #4
+  store i32 321, ptr %myA, align 4, !tbaa !9
+  call void @llvm.lifetime.start.p0(i64 4, ptr %b) #4
+  %0 = load i32, ptr %a, align 4, !tbaa !9
   ; CHECK-SPIRV: FPGARegINTEL [[TYPE_INT32]] {{[0-9]+}} {{[0-9]+}}{{ *$}}
   ; CHECK-LLVM-DAG: %{{[0-9]+}} = call i32 @llvm.annotation.i32.p0(i32 {{[%a-z0-9]+}}, ptr @[[STR]]
-  %4 = call i32 @llvm.annotation.i32(i32 %3, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i32 0, i32 0), i32 35)
-  store i32 %4, i32* %b, align 4, !tbaa !9
-  %5 = bitcast i32* %myB to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %5) #4
-  %6 = load i32, i32* %myA, align 4, !tbaa !9
+  %1 = call i32 @llvm.annotation.i32(i32 %0, ptr @.str, ptr @.str.1, i32 35)
+  store i32 %1, ptr %b, align 4, !tbaa !9
+  call void @llvm.lifetime.start.p0(i64 4, ptr %myB) #4
+  %2 = load i32, ptr %myA, align 4, !tbaa !9
   ; CHECK-SPIRV: FPGARegINTEL [[TYPE_INT32]] {{[0-9]+}} {{[0-9]+}}{{ *$}}
   ; CHECK-LLVM-DAG: %{{[0-9]+}} = call i32 @llvm.annotation.i32.p0(i32 {{[%a-z0-9]+}}, ptr @[[STR1]]
-  %7 = call i32 @llvm.annotation.i32(i32 %6, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i32 0, i32 0), i32 39)
-  store i32 %7, i32* %myB, align 4, !tbaa !9
-  %8 = bitcast i32* %c to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %8) #4
+  %3 = call i32 @llvm.annotation.i32(i32 %2, ptr @.str, ptr @.str.1, i32 39)
+  store i32 %3, ptr %myB, align 4, !tbaa !9
+  call void @llvm.lifetime.start.p0(i64 4, ptr %c) #4
   ; CHECK-SPIRV: FPGARegINTEL [[TYPE_INT32]] {{[0-9]+}} {{[0-9]+}}{{ *$}}
   ; CHECK-LLVM-DAG: %{{[0-9]+}} = call i32 @llvm.annotation.i32.p0(i32 {{[%a-z0-9]+}}, ptr @[[STR2]]
-  %9 = call i32 @llvm.annotation.i32(i32 1073741824, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i32 0, i32 0), i32 43)
-  %10 = bitcast i32 %9 to float
-  %conv = fptosi float %10 to i32
-  store i32 %conv, i32* %c, align 4, !tbaa !9
-  %11 = bitcast i32* %d to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %11) #4
-  %12 = load i32, i32* %b, align 4, !tbaa !9
-  %add = add nsw i32 %12, 12
+  %4 = call i32 @llvm.annotation.i32(i32 1073741824, ptr @.str, ptr @.str.1, i32 43)
+  %5 = bitcast i32 %4 to float
+  %conv = fptosi float %5 to i32
+  store i32 %conv, ptr %c, align 4, !tbaa !9
+  call void @llvm.lifetime.start.p0(i64 4, ptr %d) #4
+  %6 = load i32, ptr %b, align 4, !tbaa !9
+  %add = add nsw i32 %6, 12
   ; CHECK-SPIRV: FPGARegINTEL [[TYPE_INT32]] {{[0-9]+}} {{[0-9]+}}{{ *$}}
   ; CHECK-LLVM-DAG: %{{[0-9]+}} = call i32 @llvm.annotation.i32.p0(i32 {{[%a-z0-9]+}}, ptr @[[STR3]]
-  %13 = call i32 @llvm.annotation.i32(i32 %add, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i32 0, i32 0), i32 48)
+  %7 = call i32 @llvm.annotation.i32(i32 %add, ptr @.str, ptr @.str.1, i32 48)
   ; CHECK-SPIRV: FPGARegINTEL [[TYPE_INT32]] {{[0-9]+}} {{[0-9]+}}{{ *$}}
   ; CHECK-LLVM-DAG: %{{[0-9]+}} = call i32 @llvm.annotation.i32.p0(i32 {{[%a-z0-9]+}}, ptr @[[STR4]]
-  %14 = call i32 @llvm.annotation.i32(i32 %13, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i32 0, i32 0), i32 48)
-  store i32 %14, i32* %d, align 4, !tbaa !9
-  %15 = bitcast i32* %e to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %15) #4
-  %16 = load i32, i32* %a, align 4, !tbaa !9
-  %17 = load i32, i32* %b, align 4, !tbaa !9
-  %add1 = add nsw i32 %16, %17
+  %8 = call i32 @llvm.annotation.i32(i32 %7, ptr @.str, ptr @.str.1, i32 48)
+  store i32 %8, ptr %d, align 4, !tbaa !9
+  call void @llvm.lifetime.start.p0(i64 4, ptr %e) #4
+  %9 = load i32, ptr %a, align 4, !tbaa !9
+  %10 = load i32, ptr %b, align 4, !tbaa !9
+  %add1 = add nsw i32 %9, %10
   ; CHECK-SPIRV: FPGARegINTEL [[TYPE_INT32]] {{[0-9]+}} {{[0-9]+}}{{ *$}}
   ; CHECK-LLVM-DAG: %{{[0-9]+}} = call i32 @llvm.annotation.i32.p0(i32 {{[%a-z0-9]+}}, ptr @[[STR5]]
-  %18 = call i32 @llvm.annotation.i32(i32 %add1, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i32 0, i32 0), i32 54)
+  %11 = call i32 @llvm.annotation.i32(i32 %add1, ptr @.str, ptr @.str.1, i32 54)
   ; CHECK-SPIRV: FPGARegINTEL [[TYPE_INT32]] {{[0-9]+}} {{[0-9]+}}{{ *$}}
   ; CHECK-LLVM-DAG: %{{[0-9]+}} = call i32 @llvm.annotation.i32.p0(i32 {{[%a-z0-9]+}}, ptr @[[STR6]]
-  %19 = call i32 @llvm.annotation.i32(i32 %18, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i32 0, i32 0), i32 54)
-  store i32 %19, i32* %e, align 4, !tbaa !9
-  %20 = bitcast i32* %f to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %20) #4
-  %21 = load i32, i32* %a, align 4, !tbaa !9
+  %12 = call i32 @llvm.annotation.i32(i32 %11, ptr @.str, ptr @.str.1, i32 54)
+  store i32 %12, ptr %e, align 4, !tbaa !9
+  call void @llvm.lifetime.start.p0(i64 4, ptr %f) #4
+  %13 = load i32, ptr %a, align 4, !tbaa !9
   ; CHECK-SPIRV: FPGARegINTEL [[TYPE_INT32]] {{[0-9]+}} {{[0-9]+}}{{ *$}}
   ; CHECK-LLVM-DAG: %{{[0-9]+}} = call i32 @llvm.annotation.i32.p0(i32 {{[%a-z0-9]+}}, ptr @[[STR7]]
-  %22 = call i32 @llvm.annotation.i32(i32 %21, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i32 0, i32 0), i32 62)
-  store i32 %22, i32* %f, align 4, !tbaa !9
-  %23 = bitcast %struct._ZTS2st.st* %i to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %23) #4
-  %24 = bitcast %struct._ZTS2st.st* %i to i8*
-  call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %24, i8* align 4 bitcast (%struct._ZTS2st.st* @__const._Z3foov.i to i8*), i64 8, i1 false)
-  %25 = bitcast %struct._ZTS2st.st* %i2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %25) #4
-  %26 = bitcast %struct._ZTS2st.st* %i2 to i8*
-  %27 = bitcast %struct._ZTS2st.st* %i to i8*
-  call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %26, i8* align 4 %27, i64 8, i1 false), !tbaa.struct !11
-  %28 = bitcast %struct._ZTS2st.st* %ii to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %28) #4
-  %29 = bitcast %struct._ZTS2st.st* %agg-temp to i8*
-  %30 = bitcast %struct._ZTS2st.st* %i to i8*
-  call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %29, i8* align 4 %30, i64 8, i1 false), !tbaa.struct !11
-  %31 = bitcast %struct._ZTS2st.st* %agg-temp to i8*
+  %14 = call i32 @llvm.annotation.i32(i32 %13, ptr @.str, ptr @.str.1, i32 62)
+  store i32 %14, ptr %f, align 4, !tbaa !9
+  call void @llvm.lifetime.start.p0(i64 8, ptr %i) #4
+  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %i, ptr align 4 @__const._Z3foov.i, i64 8, i1 false)
+  call void @llvm.lifetime.start.p0(i64 8, ptr %i2) #4
+  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %i2, ptr align 4 %i, i64 8, i1 false), !tbaa.struct !11
+  call void @llvm.lifetime.start.p0(i64 8, ptr %ii) #4
+  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %agg-temp, ptr align 4 %i, i64 8, i1 false), !tbaa.struct !11
   ; CHECK-SPIRV: FPGARegINTEL [[TYPE_PTR]]   {{[0-9]+}} {{[0-9]+}}{{ *$}}
   ; CHECK-LLVM-DAG: %{{[0-9]+}} = call ptr @llvm.ptr.annotation.p0.p0(ptr %[[CAST1:[a-z0-9]+]], ptr @[[STR8]]
-  ; CHECK-LLVM-DAG: %[[CAST1]] = bitcast ptr %agg-temp to ptr
-  %32 = call i8* @llvm.ptr.annotation.p0i8(i8* %31, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i32 0, i32 0), i32 69, i8* null)
-  %33 = bitcast i8* %32 to %struct._ZTS2st.st*
-  %34 = bitcast %struct._ZTS2st.st* %ii to i8*
-  %35 = bitcast %struct._ZTS2st.st* %33 to i8*
-  call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %34, i8* align 4 %35, i64 8, i1 false)
-  %36 = bitcast %struct._ZTS2st.st* %iii to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %36) #4
-  %37 = bitcast %struct._ZTS2st.st* %ref.tmp to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %37) #4
-  %38 = bitcast %struct._ZTS2st.st* %agg-temp2 to i8*
-  %39 = bitcast %struct._ZTS2st.st* %ii to i8*
-  call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %38, i8* align 4 %39, i64 8, i1 false), !tbaa.struct !11
-  %40 = bitcast %struct._ZTS2st.st* %agg-temp2 to i8*
+  %15 = call ptr @llvm.ptr.annotation.p0(ptr %agg-temp, ptr @.str, ptr @.str.1, i32 69, ptr null)
+  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %ii, ptr align 4 %15, i64 8, i1 false)
+  call void @llvm.lifetime.start.p0(i64 8, ptr %iii) #4
+  call void @llvm.lifetime.start.p0(i64 8, ptr %ref.tmp) #4
+  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %agg-temp2, ptr align 4 %ii, i64 8, i1 false), !tbaa.struct !11
   ; CHECK-SPIRV: FPGARegINTEL [[TYPE_PTR]]   {{[0-9]+}} {{[0-9]+}}{{ *$}}
   ; CHECK-LLVM-DAG: %{{[0-9]+}} = call ptr @llvm.ptr.annotation.p0.p0(ptr %[[CAST2:[a-z0-9]+]], ptr @[[STR9]]
-  ; CHECK-LLVM-DAG: %[[CAST2]] = bitcast ptr %agg-temp2 to ptr
-  %41 = call i8* @llvm.ptr.annotation.p0i8(i8* %40, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i32 0, i32 0), i32 80, i8* null)
-  %42 = bitcast i8* %41 to %struct._ZTS2st.st*
-  %43 = bitcast %struct._ZTS2st.st* %ref.tmp to i8*
-  %44 = bitcast %struct._ZTS2st.st* %42 to i8*
-  call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %43, i8* align 4 %44, i64 8, i1 false)
-  %45 = bitcast %struct._ZTS2st.st* %iii to i8*
-  %46 = bitcast %struct._ZTS2st.st* %ref.tmp to i8*
-  call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %45, i8* align 4 %46, i64 8, i1 false), !tbaa.struct !11
-  %47 = bitcast %struct._ZTS2st.st* %ref.tmp to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %47) #4
-  %48 = bitcast %struct._ZTS2st.st addrspace(4)** %iiii to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %48) #4
-  %49 = ptrtoint %struct._ZTS2st.st* %iii to i64
+  %16 = call ptr @llvm.ptr.annotation.p0(ptr %agg-temp2, ptr @.str, ptr @.str.1, i32 80, ptr null)
+  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %ref.tmp, ptr align 4 %16, i64 8, i1 false)
+  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %iii, ptr align 4 %ref.tmp, i64 8, i1 false), !tbaa.struct !11
+  call void @llvm.lifetime.end.p0(i64 8, ptr %ref.tmp) #4
+  call void @llvm.lifetime.start.p0(i64 8, ptr %iiii) #4
+  %17 = ptrtoint ptr %iii to i64
   ; CHECK-SPIRV: FPGARegINTEL [[TYPE_INT64]] {{[0-9]+}} {{[0-9]+}}{{ *$}}
   ; CHECK-LLVM-DAG: %{{[0-9]+}} = call i64 @llvm.annotation.i64.p0(i64 {{[%a-z0-9]+}}, ptr @[[STR10]]
-  %50 = call i64 @llvm.annotation.i64(i64 %49, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i32 0, i32 0), i32 94)
-  %51 = inttoptr i64 %50 to %struct._ZTS2st.st*
-  %52 = addrspacecast %struct._ZTS2st.st* %51 to %struct._ZTS2st.st addrspace(4)*
-  store %struct._ZTS2st.st addrspace(4)* %52, %struct._ZTS2st.st addrspace(4)** %iiii, align 8, !tbaa !5
-  %53 = bitcast %union._ZTS2un.un* %u1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %53) #4
-  %54 = bitcast %union._ZTS2un.un* %u1 to i8*
-  call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %54, i8* align 4 bitcast (%union._ZTS2un.un* @__const._Z3foov.u1 to i8*), i64 4, i1 false)
-  %55 = bitcast %union._ZTS2un.un* %u2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %55) #4
-  %56 = bitcast %union._ZTS2un.un addrspace(4)** %u3 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %56) #4
-  %57 = bitcast %union._ZTS2un.un* %ref.tmp3 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %57) #4
-  %58 = bitcast %union._ZTS2un.un* %agg-temp4 to i8*
-  %59 = bitcast %union._ZTS2un.un* %u1 to i8*
-  call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %58, i8* align 4 %59, i64 4, i1 false), !tbaa.struct !14
-  %60 = bitcast %union._ZTS2un.un* %agg-temp4 to i8*
+  %18 = call i64 @llvm.annotation.i64(i64 %17, ptr @.str, ptr @.str.1, i32 94)
+  %19 = inttoptr i64 %18 to ptr
+  %20 = addrspacecast ptr %19 to ptr addrspace(4)
+  store ptr addrspace(4) %20, ptr %iiii, align 8, !tbaa !5
+  call void @llvm.lifetime.start.p0(i64 4, ptr %u1) #4
+  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %u1, ptr align 4 @__const._Z3foov.u1, i64 4, i1 false)
+  call void @llvm.lifetime.start.p0(i64 4, ptr %u2) #4
+  call void @llvm.lifetime.start.p0(i64 8, ptr %u3) #4
+  call void @llvm.lifetime.start.p0(i64 4, ptr %ref.tmp3) #4
+  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %agg-temp4, ptr align 4 %u1, i64 4, i1 false), !tbaa.struct !14
   ; CHECK-SPIRV: FPGARegINTEL [[TYPE_PTR]]   {{[0-9]+}} {{[0-9]+}}{{ *$}}
   ; CHECK-LLVM-DAG: %{{[0-9]+}} = call ptr @llvm.ptr.annotation.p0.p0(ptr %[[CAST4:[a-z0-9]+]], ptr @[[STR11]]
-  ; CHECK-LLVM-DAG: %[[CAST4]] = bitcast ptr %agg-temp4 to ptr
-  %61 = call i8* @llvm.ptr.annotation.p0i8(i8* %60, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i32 0, i32 0), i32 103, i8* null)
-  %62 = bitcast i8* %61 to %union._ZTS2un.un*
-  %63 = bitcast %union._ZTS2un.un* %ref.tmp3 to i8*
-  %64 = bitcast %union._ZTS2un.un* %62 to i8*
-  call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %63, i8* align 4 %64, i64 8, i1 false)
-  %65 = bitcast %union._ZTS2un.un* %u2 to i8*
-  %66 = bitcast %union._ZTS2un.un* %ref.tmp3 to i8*
-  call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %65, i8* align 4 %66, i64 4, i1 false), !tbaa.struct !14
-  %67 = bitcast %union._ZTS2un.un* %ref.tmp3 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %67) #4
-  %68 = ptrtoint %union._ZTS2un.un* %u2 to i64
+  %21 = call ptr @llvm.ptr.annotation.p0(ptr %agg-temp4, ptr @.str, ptr @.str.1, i32 103, ptr null)
+  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %ref.tmp3, ptr align 4 %21, i64 8, i1 false)
+  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %u2, ptr align 4 %ref.tmp3, i64 4, i1 false), !tbaa.struct !14
+  call void @llvm.lifetime.end.p0(i64 4, ptr %ref.tmp3) #4
+  %22 = ptrtoint ptr %u2 to i64
   ; CHECK-SPIRV: FPGARegINTEL [[TYPE_INT64]] {{[0-9]+}} {{[0-9]+}}{{ *$}}
   ; CHECK-LLVM-DAG: %{{[0-9]+}} = call i64 @llvm.annotation.i64.p0(i64 {{[%a-z0-9]+}}, ptr @[[STR12]]
-  %69 = call i64 @llvm.annotation.i64(i64 %68, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i32 0, i32 0), i32 117)
-  %70 = inttoptr i64 %69 to %union._ZTS2un.un*
-  %71 = addrspacecast %union._ZTS2un.un* %70 to %union._ZTS2un.un addrspace(4)*
-  store %union._ZTS2un.un addrspace(4)* %71, %union._ZTS2un.un addrspace(4)** %u3, align 8, !tbaa !5
-  %72 = bitcast %class._ZTS1A.A* %ca to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %72) #4
-  %73 = addrspacecast %class._ZTS1A.A* %ca to %class._ZTS1A.A addrspace(4)*
-  call spir_func void @_ZN1AC1Ei(%class._ZTS1A.A addrspace(4)* %73, i32 213)
-  %74 = bitcast %class._ZTS1A.A* %cb to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %74) #4
-  %75 = bitcast %class._ZTS1A.A* %agg-temp5 to i8*
-  %76 = bitcast %class._ZTS1A.A* %ca to i8*
-  call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %75, i8* align 4 %76, i64 4, i1 false), !tbaa.struct !16
-  %77 = bitcast %class._ZTS1A.A* %agg-temp5 to i8*
+  %23 = call i64 @llvm.annotation.i64(i64 %22, ptr @.str, ptr @.str.1, i32 117)
+  %24 = inttoptr i64 %23 to ptr
+  %25 = addrspacecast ptr %24 to ptr addrspace(4)
+  store ptr addrspace(4) %25, ptr %u3, align 8, !tbaa !5
+  call void @llvm.lifetime.start.p0(i64 4, ptr %ca) #4
+  %26 = addrspacecast ptr %ca to ptr addrspace(4)
+  call spir_func void @_ZN1AC1Ei(ptr addrspace(4) %26, i32 213)
+  call void @llvm.lifetime.start.p0(i64 4, ptr %cb) #4
+  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %agg-temp5, ptr align 4 %ca, i64 4, i1 false), !tbaa.struct !16
   ; CHECK-SPIRV: FPGARegINTEL [[TYPE_PTR]]   {{[0-9]+}} {{[0-9]+}}{{ *$}}
   ; CHECK-LLVM-DAG: %{{[0-9]+}} = call ptr @llvm.ptr.annotation.p0.p0(ptr %[[CAST5:[a-z0-9]+]], ptr @[[STR13]]
-  ; CHECK-LLVM-DAG: %[[CAST5]] = bitcast ptr %agg-temp5 to ptr
-  %78 = call i8* @llvm.ptr.annotation.p0i8(i8* %77, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i32 0, i32 0), i32 125, i8* null)
-  %79 = bitcast i8* %78 to %class._ZTS1A.A*
-  %80 = bitcast %class._ZTS1A.A* %cb to i8*
-  %81 = bitcast %class._ZTS1A.A* %79 to i8*
-  call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %80, i8* align 4 %81, i64 8, i1 false)
-  %82 = bitcast i32 addrspace(4)** %ap to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %82) #4
-  %83 = addrspacecast i32* %a to i32 addrspace(4)*
-  store i32 addrspace(4)* %83, i32 addrspace(4)** %ap, align 8, !tbaa !5
-  %84 = bitcast i32 addrspace(4)** %bp to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %84) #4
-  %85 = load i32 addrspace(4)*, i32 addrspace(4)** %ap, align 8, !tbaa !5
-  %86 = ptrtoint i32 addrspace(4)* %85 to i64
+  %27 = call ptr @llvm.ptr.annotation.p0(ptr %agg-temp5, ptr @.str, ptr @.str.1, i32 125, ptr null)
+  call void @llvm.memcpy.p0.p0.i64(ptr align 4 %cb, ptr align 4 %27, i64 8, i1 false)
+  call void @llvm.lifetime.start.p0(i64 8, ptr %ap) #4
+  %28 = addrspacecast ptr %a to ptr addrspace(4)
+  store ptr addrspace(4) %28, ptr %ap, align 8, !tbaa !5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %bp) #4
+  %29 = load ptr addrspace(4), ptr %ap, align 8, !tbaa !5
+  %30 = ptrtoint ptr addrspace(4) %29 to i64
   ; CHECK-SPIRV: FPGARegINTEL [[TYPE_INT64]] {{[0-9]+}} {{[0-9]+}}{{ *$}}
   ; CHECK-LLVM-DAG: %{{[0-9]+}} = call i64 @llvm.annotation.i64.p0(i64 {{[%a-z0-9]+}}, ptr @[[STR14]]
-  %87 = call i64 @llvm.annotation.i64(i64 %86, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i32 0, i32 0), i32 137)
-  %88 = inttoptr i64 %87 to i32 addrspace(4)*
-  store i32 addrspace(4)* %88, i32 addrspace(4)** %bp, align 8, !tbaa !5
-  %89 = bitcast i32 addrspace(4)** %bp to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %89) #4
-  %90 = bitcast i32 addrspace(4)** %ap to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %90) #4
-  %91 = bitcast %class._ZTS1A.A* %cb to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %91) #4
-  %92 = bitcast %class._ZTS1A.A* %ca to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %92) #4
-  %93 = bitcast %union._ZTS2un.un addrspace(4)** %u3 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %93) #4
-  %94 = bitcast %union._ZTS2un.un* %u2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %94) #4
-  %95 = bitcast %union._ZTS2un.un* %u1 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %95) #4
-  %96 = bitcast %struct._ZTS2st.st addrspace(4)** %iiii to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %96) #4
-  %97 = bitcast %struct._ZTS2st.st* %iii to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %97) #4
-  %98 = bitcast %struct._ZTS2st.st* %ii to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %98) #4
-  %99 = bitcast %struct._ZTS2st.st* %i2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %99) #4
-  %100 = bitcast %struct._ZTS2st.st* %i to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %100) #4
-  %101 = bitcast i32* %f to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %101) #4
-  %102 = bitcast i32* %e to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %102) #4
-  %103 = bitcast i32* %d to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %103) #4
-  %104 = bitcast i32* %c to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %104) #4
-  %105 = bitcast i32* %myB to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %105) #4
-  %106 = bitcast i32* %b to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %106) #4
-  %107 = bitcast i32* %myA to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %107) #4
-  %108 = bitcast i32* %a to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %108) #4
+  %31 = call i64 @llvm.annotation.i64(i64 %30, ptr @.str, ptr @.str.1, i32 137)
+  %32 = inttoptr i64 %31 to ptr addrspace(4)
+  store ptr addrspace(4) %32, ptr %bp, align 8, !tbaa !5
+  call void @llvm.lifetime.end.p0(i64 8, ptr %bp) #4
+  call void @llvm.lifetime.end.p0(i64 8, ptr %ap) #4
+  call void @llvm.lifetime.end.p0(i64 4, ptr %cb) #4
+  call void @llvm.lifetime.end.p0(i64 4, ptr %ca) #4
+  call void @llvm.lifetime.end.p0(i64 8, ptr %u3) #4
+  call void @llvm.lifetime.end.p0(i64 4, ptr %u2) #4
+  call void @llvm.lifetime.end.p0(i64 4, ptr %u1) #4
+  call void @llvm.lifetime.end.p0(i64 8, ptr %iiii) #4
+  call void @llvm.lifetime.end.p0(i64 8, ptr %iii) #4
+  call void @llvm.lifetime.end.p0(i64 8, ptr %ii) #4
+  call void @llvm.lifetime.end.p0(i64 8, ptr %i2) #4
+  call void @llvm.lifetime.end.p0(i64 8, ptr %i) #4
+  call void @llvm.lifetime.end.p0(i64 4, ptr %f) #4
+  call void @llvm.lifetime.end.p0(i64 4, ptr %e) #4
+  call void @llvm.lifetime.end.p0(i64 4, ptr %d) #4
+  call void @llvm.lifetime.end.p0(i64 4, ptr %c) #4
+  call void @llvm.lifetime.end.p0(i64 4, ptr %myB) #4
+  call void @llvm.lifetime.end.p0(i64 4, ptr %b) #4
+  call void @llvm.lifetime.end.p0(i64 4, ptr %myA) #4
+  call void @llvm.lifetime.end.p0(i64 4, ptr %a) #4
   ret void
 }
 
 ; Function Attrs: nounwind
-declare i32 @llvm.annotation.i32(i32, i8*, i8*, i32) #4
+declare i32 @llvm.annotation.i32(i32, ptr, ptr, i32) #4
 
 ; Function Attrs: argmemonly nounwind
-declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i1 immarg) #1
+declare void @llvm.memcpy.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1 immarg) #1
 
 ; Function Attrs: nounwind
-declare i8* @llvm.ptr.annotation.p0i8(i8*, i8*, i8*, i32, i8*) #4
+declare ptr @llvm.ptr.annotation.p0(ptr, ptr, ptr, i32, ptr) #4
 
 ; Function Attrs: nounwind
-declare i64 @llvm.annotation.i64(i64, i8*, i8*, i32) #4
+declare i64 @llvm.annotation.i64(i64, ptr, ptr, i32) #4
 
 ; Function Attrs: nounwind
-define linkonce_odr spir_func void @_ZN1AC1Ei(%class._ZTS1A.A addrspace(4)* %this, i32 %a) unnamed_addr #3 comdat align 2 {
+define linkonce_odr spir_func void @_ZN1AC1Ei(ptr addrspace(4) %this, i32 %a) unnamed_addr #3 comdat align 2 {
 entry:
-  %this.addr = alloca %class._ZTS1A.A addrspace(4)*, align 8
+  %this.addr = alloca ptr addrspace(4), align 8
   %a.addr = alloca i32, align 4
-  store %class._ZTS1A.A addrspace(4)* %this, %class._ZTS1A.A addrspace(4)** %this.addr, align 8, !tbaa !5
-  store i32 %a, i32* %a.addr, align 4, !tbaa !9
-  %this1 = load %class._ZTS1A.A addrspace(4)*, %class._ZTS1A.A addrspace(4)** %this.addr, align 8
-  %0 = load i32, i32* %a.addr, align 4, !tbaa !9
-  call spir_func void @_ZN1AC2Ei(%class._ZTS1A.A addrspace(4)* %this1, i32 %0)
+  store ptr addrspace(4) %this, ptr %this.addr, align 8, !tbaa !5
+  store i32 %a, ptr %a.addr, align 4, !tbaa !9
+  %this1 = load ptr addrspace(4), ptr %this.addr, align 8
+  %0 = load i32, ptr %a.addr, align 4, !tbaa !9
+  call spir_func void @_ZN1AC2Ei(ptr addrspace(4) %this1, i32 %0)
   ret void
 }
 
 ; Function Attrs: nounwind
-define linkonce_odr spir_func void @_ZN1AC2Ei(%class._ZTS1A.A addrspace(4)* %this, i32 %a) unnamed_addr #3 comdat align 2 {
+define linkonce_odr spir_func void @_ZN1AC2Ei(ptr addrspace(4) %this, i32 %a) unnamed_addr #3 comdat align 2 {
 entry:
-  %this.addr = alloca %class._ZTS1A.A addrspace(4)*, align 8
+  %this.addr = alloca ptr addrspace(4), align 8
   %a.addr = alloca i32, align 4
-  store %class._ZTS1A.A addrspace(4)* %this, %class._ZTS1A.A addrspace(4)** %this.addr, align 8, !tbaa !5
-  store i32 %a, i32* %a.addr, align 4, !tbaa !9
-  %this1 = load %class._ZTS1A.A addrspace(4)*, %class._ZTS1A.A addrspace(4)** %this.addr, align 8
-  %0 = load i32, i32* %a.addr, align 4, !tbaa !9
-  %m_val = getelementptr inbounds %class._ZTS1A.A, %class._ZTS1A.A addrspace(4)* %this1, i32 0, i32 0
-  store i32 %0, i32 addrspace(4)* %m_val, align 4, !tbaa !17
+  store ptr addrspace(4) %this, ptr %this.addr, align 8, !tbaa !5
+  store i32 %a, ptr %a.addr, align 4, !tbaa !9
+  %this1 = load ptr addrspace(4), ptr %this.addr, align 8
+  %0 = load i32, ptr %a.addr, align 4, !tbaa !9
+  store i32 %0, ptr addrspace(4) %this1, align 4, !tbaa !17
   ret void
 }
 
diff --git a/test/extensions/INTEL/SPV_INTEL_function_pointers/alias.ll b/test/extensions/INTEL/SPV_INTEL_function_pointers/alias.ll
index a8e0b1ec42..f757a1ded7 100644
--- a/test/extensions/INTEL/SPV_INTEL_function_pointers/alias.ll
+++ b/test/extensions/INTEL/SPV_INTEL_function_pointers/alias.ll
@@ -40,9 +40,9 @@ define spir_func i32 @foo(i32 %x) {
   ret i32 %x
 }
 
-@foo.alias = internal alias i32 (i32), i32 (i32)* @foo
+@foo.alias = internal alias i32 (i32), ptr @foo
 
-define spir_kernel void @bar(i64* %y) {
-  store i64 ptrtoint (i32 (i32)* @foo.alias to i64), i64* %y
+define spir_kernel void @bar(ptr %y) {
+  store i64 ptrtoint (ptr @foo.alias to i64), ptr %y
   ret void
 }
diff --git a/test/extensions/INTEL/SPV_INTEL_function_pointers/bitcast.ll b/test/extensions/INTEL/SPV_INTEL_function_pointers/bitcast.ll
index ae85e28dc4..bdf6c1573a 100644
--- a/test/extensions/INTEL/SPV_INTEL_function_pointers/bitcast.ll
+++ b/test/extensions/INTEL/SPV_INTEL_function_pointers/bitcast.ll
@@ -40,8 +40,7 @@ define dso_local spir_func signext i8 @foo(i8 signext %0) #0 {
 
 ; Function Attrs: noinline nounwind optnone
 define dso_local spir_func void @bar() #0 {
-  %1 = bitcast i8 (i8)* @foo to i32 (i32)*
-  %2 = call i32 %1(i32 0)
+  %1 = call i32 @foo(i32 0)
   ret void
 }
 
diff --git a/test/extensions/INTEL/SPV_INTEL_function_pointers/const-function-pointer.ll b/test/extensions/INTEL/SPV_INTEL_function_pointers/const-function-pointer.ll
index 1da6bec80d..60615a3d21 100644
--- a/test/extensions/INTEL/SPV_INTEL_function_pointers/const-function-pointer.ll
+++ b/test/extensions/INTEL/SPV_INTEL_function_pointers/const-function-pointer.ll
@@ -31,7 +31,7 @@
 target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "spir-unknown-unknown"
 
-@__const.main.funcs = private unnamed_addr constant [2 x i32 (i32, i32)*] [i32 (i32, i32)* @f1, i32 (i32, i32)* @f2], align 16
+@__const.main.funcs = private unnamed_addr constant [2 x ptr] [ptr @f1, ptr @f2], align 16
 
 ; Function Attrs: norecurse nounwind readnone uwtable
 define dso_local i32 @f1(i32 %a, i32 %b) #0 {
@@ -53,8 +53,8 @@ entry:
   %call = tail call i32 @rand() #3
   %rem = srem i32 %call, 2
   %idxprom = sext i32 %rem to i64
-  %arrayidx = getelementptr inbounds [2 x i32 (i32, i32)*], [2 x i32 (i32, i32)*]* @__const.main.funcs, i64 0, i64 %idxprom
-  %0 = load i32 (i32, i32)*, i32 (i32, i32)** %arrayidx, align 8
+  %arrayidx = getelementptr inbounds [2 x ptr], ptr @__const.main.funcs, i64 0, i64 %idxprom
+  %0 = load ptr, ptr %arrayidx, align 8
   %call1 = tail call i32 %0(i32 32, i32 2) #3
   ret i32 %call1
 }
diff --git a/test/extensions/INTEL/SPV_INTEL_function_pointers/decor-func-ptr-arg-attr.ll b/test/extensions/INTEL/SPV_INTEL_function_pointers/decor-func-ptr-arg-attr.ll
index b897af1016..df955ff093 100644
--- a/test/extensions/INTEL/SPV_INTEL_function_pointers/decor-func-ptr-arg-attr.ll
+++ b/test/extensions/INTEL/SPV_INTEL_function_pointers/decor-func-ptr-arg-attr.ll
@@ -22,27 +22,27 @@
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
 target triple = "spir64-unknown-unknown"
 
-%"multi_ptr" = type { i32* }
+%"multi_ptr" = type { ptr }
 %"range" = type { %"array" }
 %"array" = type { [1 x i64] }
-%wrapper_class = type { i32 addrspace(1)* }
-%wrapper_class.0 = type { i32 addrspace(1)* }
+%wrapper_class = type { ptr addrspace(1) }
+%wrapper_class.0 = type { ptr addrspace(1) }
 
 $RoundedRangeKernel = comdat any
 
 ; Function Attrs: nounwind
-define spir_func void @inc_function(%"multi_ptr"* byval(%"multi_ptr") noalias nocapture %ptr) #0 {
+define spir_func void @inc_function(ptr byval(%"multi_ptr") noalias nocapture %ptr) #0 {
 entry:
   ret void
 }
 
 
 ; Function Attrs: convergent norecurse
-define weak_odr dso_local spir_kernel void @RoundedRangeKernel(%"range"* byval(%"range") align 8 %_arg_NumWorkItems, i1 zeroext %_arg_, %wrapper_class* byval(%wrapper_class) align 8 %_arg_1, %wrapper_class.0* byval(%wrapper_class.0) align 8 %_arg_2) local_unnamed_addr #0 comdat !kernel_arg_buffer_location !6 {
+define weak_odr dso_local spir_kernel void @RoundedRangeKernel(ptr byval(%"range") align 8 %_arg_NumWorkItems, i1 zeroext %_arg_, ptr byval(%wrapper_class) align 8 %_arg_1, ptr byval(%wrapper_class.0) align 8 %_arg_2) local_unnamed_addr #0 comdat !kernel_arg_buffer_location !6 {
 entry:
   %agg.tmp.i.i = alloca %"multi_ptr", align 8
-  %cond.i.i = select i1 %_arg_, void (%"multi_ptr"*)* @inc_function, void (%"multi_ptr"*)* null
-  call spir_func void %cond.i.i(%"multi_ptr"* nonnull byval(%"multi_ptr") align 8 noalias nocapture %agg.tmp.i.i) #1, !callees !7
+  %cond.i.i = select i1 %_arg_, ptr @inc_function, ptr null
+  call spir_func void %cond.i.i(ptr nonnull byval(%"multi_ptr") align 8 noalias nocapture %agg.tmp.i.i) #1, !callees !7
   ret void
 }
 
@@ -64,4 +64,4 @@ attributes #1 = { convergent }
 !4 = !{}
 !5 = !{!"Compiler"}
 !6 = !{i32 -1, i32 -1, i32 -1, i32 -1}
-!7 = !{void (%"multi_ptr"*)* @inc_function}
+!7 = !{ptr @inc_function}
diff --git a/test/extensions/INTEL/SPV_INTEL_function_pointers/fp-from-host.ll b/test/extensions/INTEL/SPV_INTEL_function_pointers/fp-from-host.ll
index 56538550fc..805be68f89 100644
--- a/test/extensions/INTEL/SPV_INTEL_function_pointers/fp-from-host.ll
+++ b/test/extensions/INTEL/SPV_INTEL_function_pointers/fp-from-host.ll
@@ -36,15 +36,14 @@ target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:
 target triple = "spir64-unknown-unknown"
 
 ; Function Attrs: convergent nounwind
-define spir_kernel void @test(i32 addrspace(1)* %fp, i32 addrspace(1)* %data) #0 !kernel_arg_addr_space !4 !kernel_arg_access_qual !5 !kernel_arg_type !6 !kernel_arg_base_type !6 !kernel_arg_type_qual !7 {
+define spir_kernel void @test(ptr addrspace(1) %fp, ptr addrspace(1) %data) #0 !kernel_arg_addr_space !4 !kernel_arg_access_qual !5 !kernel_arg_type !6 !kernel_arg_base_type !6 !kernel_arg_type_qual !7 {
 entry:
-  %arrayidx = getelementptr inbounds i32, i32 addrspace(1)* %data, i64 1
-  %0 = load i32, i32 addrspace(1)* %arrayidx, align 4, !tbaa !8
-  %1 = load i32, i32 addrspace(1)* %fp, align 4, !tbaa !8
-  %2 = inttoptr i32 %1 to i32 (i32)*
+  %arrayidx = getelementptr inbounds i32, ptr addrspace(1) %data, i64 1
+  %0 = load i32, ptr addrspace(1) %arrayidx, align 4, !tbaa !8
+  %1 = load i32, ptr addrspace(1) %fp, align 4, !tbaa !8
+  %2 = inttoptr i32 %1 to ptr
   %call = call spir_func i32 %2(i32 %0) #1
-  %arrayidx1 = getelementptr inbounds i32, i32 addrspace(1)* %data, i64 0
-  store i32 %call, i32 addrspace(1)* %arrayidx1, align 4, !tbaa !8
+  store i32 %call, ptr addrspace(1) %data, align 4, !tbaa !8
   ret void
 }
 
diff --git a/test/extensions/INTEL/SPV_INTEL_function_pointers/function-pointer-as-function-arg.ll b/test/extensions/INTEL/SPV_INTEL_function_pointers/function-pointer-as-function-arg.ll
index faf585908f..1aba54f8a7 100644
--- a/test/extensions/INTEL/SPV_INTEL_function_pointers/function-pointer-as-function-arg.ll
+++ b/test/extensions/INTEL/SPV_INTEL_function_pointers/function-pointer-as-function-arg.ll
@@ -85,14 +85,14 @@ target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:
 target triple = "spir64-unknown-unknown"
 
 ; Function Attrs: convergent noinline nounwind optnone
-define spir_func i32 @helper(i32 (i32)* %f, i32 %arg) #0 {
+define spir_func i32 @helper(ptr %f, i32 %arg) #0 {
 entry:
-  %f.addr = alloca i32 (i32)*, align 8
+  %f.addr = alloca ptr, align 8
   %arg.addr = alloca i32, align 4
-  store i32 (i32)* %f, i32 (i32)** %f.addr, align 8
-  store i32 %arg, i32* %arg.addr, align 4
-  %0 = load i32 (i32)*, i32 (i32)** %f.addr, align 8
-  %1 = load i32, i32* %arg.addr, align 4
+  store ptr %f, ptr %f.addr, align 8
+  store i32 %arg, ptr %arg.addr, align 4
+  %0 = load ptr, ptr %f.addr, align 8
+  %1 = load i32, ptr %arg.addr, align 4
   %call = call spir_func i32 %0(i32 %1) #3
   ret i32 %call
 }
@@ -101,8 +101,8 @@ entry:
 define spir_func i32 @foo(i32 %v) #0 {
 entry:
   %v.addr = alloca i32, align 4
-  store i32 %v, i32* %v.addr, align 4
-  %0 = load i32, i32* %v.addr, align 4
+  store i32 %v, ptr %v.addr, align 4
+  %0 = load i32, ptr %v.addr, align 4
   %add = add nsw i32 %0, 1
   ret i32 %add
 }
@@ -111,46 +111,46 @@ entry:
 define spir_func i32 @bar(i32 %v) #0 {
 entry:
   %v.addr = alloca i32, align 4
-  store i32 %v, i32* %v.addr, align 4
-  %0 = load i32, i32* %v.addr, align 4
+  store i32 %v, ptr %v.addr, align 4
+  %0 = load i32, ptr %v.addr, align 4
   %add = add nsw i32 %0, 2
   ret i32 %add
 }
 
 ; Function Attrs: convergent noinline nounwind optnone
-define spir_kernel void @test(i32 addrspace(1)* %data, i32 %control) #1 !kernel_arg_addr_space !1 !kernel_arg_access_qual !4 !kernel_arg_type !5 !kernel_arg_base_type !5 !kernel_arg_type_qual !6 {
+define spir_kernel void @test(ptr addrspace(1) %data, i32 %control) #1 !kernel_arg_addr_space !1 !kernel_arg_access_qual !4 !kernel_arg_type !5 !kernel_arg_base_type !5 !kernel_arg_type_qual !6 {
 entry:
-  %data.addr = alloca i32 addrspace(1)*, align 8
+  %data.addr = alloca ptr addrspace(1), align 8
   %control.addr = alloca i32, align 4
-  %fp = alloca i32 (i32)*, align 8
-  store i32 addrspace(1)* %data, i32 addrspace(1)** %data.addr, align 8
-  store i32 %control, i32* %control.addr, align 4
+  %fp = alloca ptr, align 8
+  store ptr addrspace(1) %data, ptr %data.addr, align 8
+  store i32 %control, ptr %control.addr, align 4
   %call = call spir_func i64 @_Z13get_global_idj(i32 0) #4
-  %0 = load i32, i32* %control.addr, align 4
+  %0 = load i32, ptr %control.addr, align 4
   %conv = sext i32 %0 to i64
   %rem = urem i64 %call, %conv
   %cmp = icmp eq i64 %rem, 0
   br i1 %cmp, label %if.then, label %if.else
 
 if.then:                                          ; preds = %entry
-  store i32 (i32)* @foo, i32 (i32)** %fp, align 8
+  store ptr @foo, ptr %fp, align 8
   br label %if.end
 
 if.else:                                          ; preds = %entry
-  store i32 (i32)* @bar, i32 (i32)** %fp, align 8
+  store ptr @bar, ptr %fp, align 8
   br label %if.end
 
 if.end:                                           ; preds = %if.else, %if.then
-  %1 = load i32 (i32)*, i32 (i32)** %fp, align 8
-  %2 = load i32 addrspace(1)*, i32 addrspace(1)** %data.addr, align 8
+  %1 = load ptr, ptr %fp, align 8
+  %2 = load ptr addrspace(1), ptr %data.addr, align 8
   %call2 = call spir_func i64 @_Z13get_global_idj(i32 0) #4
-  %arrayidx = getelementptr inbounds i32, i32 addrspace(1)* %2, i64 %call2
-  %3 = load i32, i32 addrspace(1)* %arrayidx, align 4
-  %call3 = call spir_func i32 @helper(i32 (i32)* %1, i32 %3) #3
-  %4 = load i32 addrspace(1)*, i32 addrspace(1)** %data.addr, align 8
+  %arrayidx = getelementptr inbounds i32, ptr addrspace(1) %2, i64 %call2
+  %3 = load i32, ptr addrspace(1) %arrayidx, align 4
+  %call3 = call spir_func i32 @helper(ptr %1, i32 %3) #3
+  %4 = load ptr addrspace(1), ptr %data.addr, align 8
   %call4 = call spir_func i64 @_Z13get_global_idj(i32 0) #4
-  %arrayidx5 = getelementptr inbounds i32, i32 addrspace(1)* %4, i64 %call4
-  store i32 %call3, i32 addrspace(1)* %arrayidx5, align 4
+  %arrayidx5 = getelementptr inbounds i32, ptr addrspace(1) %4, i64 %call4
+  store i32 %call3, ptr addrspace(1) %arrayidx5, align 4
   ret void
 }
 
diff --git a/test/extensions/INTEL/SPV_INTEL_function_pointers/function-pointer.ll b/test/extensions/INTEL/SPV_INTEL_function_pointers/function-pointer.ll
index a552cc5b2c..e116745ae5 100644
--- a/test/extensions/INTEL/SPV_INTEL_function_pointers/function-pointer.ll
+++ b/test/extensions/INTEL/SPV_INTEL_function_pointers/function-pointer.ll
@@ -46,26 +46,26 @@ target triple = "spir64-unknown-unknown"
 define spir_func i32 @foo(i32 %arg) #0 {
 entry:
   %arg.addr = alloca i32, align 4
-  store i32 %arg, i32* %arg.addr, align 4
-  %0 = load i32, i32* %arg.addr, align 4
+  store i32 %arg, ptr %arg.addr, align 4
+  %0 = load i32, ptr %arg.addr, align 4
   %add = add nsw i32 %0, 10
   ret i32 %add
 }
 
 ; Function Attrs: convergent noinline nounwind optnone
-define spir_kernel void @test(i32 addrspace(1)* %data, i32 %input) #1 !kernel_arg_addr_space !1 !kernel_arg_access_qual !5 !kernel_arg_type !6 !kernel_arg_base_type !6 !kernel_arg_type_qual !7 {
+define spir_kernel void @test(ptr addrspace(1) %data, i32 %input) #1 !kernel_arg_addr_space !1 !kernel_arg_access_qual !5 !kernel_arg_type !6 !kernel_arg_base_type !6 !kernel_arg_type_qual !7 {
 entry:
-  %data.addr = alloca i32 addrspace(1)*, align 8
+  %data.addr = alloca ptr addrspace(1), align 8
   %input.addr = alloca i32, align 4
-  %fp = alloca i32 (i32)*, align 8
-  store i32 addrspace(1)* %data, i32 addrspace(1)** %data.addr, align 8
-  store i32 %input, i32* %input.addr, align 4
-  store i32 (i32)* @foo, i32 (i32)** %fp, align 8
-  %0 = load i32 (i32)*, i32 (i32)** %fp, align 8
-  %1 = load i32, i32* %input.addr, align 4
+  %fp = alloca ptr, align 8
+  store ptr addrspace(1) %data, ptr %data.addr, align 8
+  store i32 %input, ptr %input.addr, align 4
+  store ptr @foo, ptr %fp, align 8
+  %0 = load ptr, ptr %fp, align 8
+  %1 = load i32, ptr %input.addr, align 4
   %call = call spir_func i32 %0(i32 %1) #2
-  %2 = load i32 addrspace(1)*, i32 addrspace(1)** %data.addr, align 8
-  store i32 %call, i32 addrspace(1)* %2, align 4
+  %2 = load ptr addrspace(1), ptr %data.addr, align 8
+  store i32 %call, ptr addrspace(1) %2, align 4
   ret void
 }
 
diff --git a/test/extensions/INTEL/SPV_INTEL_function_pointers/global-function-pointer.ll b/test/extensions/INTEL/SPV_INTEL_function_pointers/global-function-pointer.ll
index 0702c99973..59e6b238d3 100644
--- a/test/extensions/INTEL/SPV_INTEL_function_pointers/global-function-pointer.ll
+++ b/test/extensions/INTEL/SPV_INTEL_function_pointers/global-function-pointer.ll
@@ -16,7 +16,7 @@ target triple = "spir64"
 ; CHECK-LLVM: @two = internal addrspace(1) global ptr @_Z4barrii
 ; CHECK-LLVM: define spir_func i32 @_Z4barrii(i32 %[[#]], i32 %[[#]])
 
-@two = internal addrspace(1) global i32 (i32, i32)* @_Z4barrii, align 8
+@two = internal addrspace(1) global ptr @_Z4barrii, align 8
 
 ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn writeonly
 define protected spir_func noundef i32 @_Z4barrii(i32 %0, i32 %1) {
diff --git a/test/extensions/INTEL/SPV_INTEL_function_pointers/global_ctor_dtor.ll b/test/extensions/INTEL/SPV_INTEL_function_pointers/global_ctor_dtor.ll
index 48df12d707..3f4223ff48 100644
--- a/test/extensions/INTEL/SPV_INTEL_function_pointers/global_ctor_dtor.ll
+++ b/test/extensions/INTEL/SPV_INTEL_function_pointers/global_ctor_dtor.ll
@@ -6,8 +6,8 @@
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
 target triple = "spir64-unknown-unknown"
 
-@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__sub_I_test.cpp.ctor, i8* null }]
-@llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @_GLOBAL__sub_I_test.cpp.dtor, i8* null }]
+@llvm.global_ctors = appending global [1 x { i32, ptr, ptr }] [{ i32, ptr, ptr } { i32 65535, ptr @_GLOBAL__sub_I_test.cpp.ctor, ptr null }]
+@llvm.global_dtors = appending global [1 x { i32, ptr, ptr }] [{ i32, ptr, ptr } { i32 65535, ptr @_GLOBAL__sub_I_test.cpp.dtor, ptr null }]
 @_ZL15DIVERGENCE = internal addrspace(1) global i32 0, align 4
 
 ; CHECK: Name [[NameCtor:[0-9]+]] "_GLOBAL__sub_I_test.cpp.ctor"
@@ -45,7 +45,7 @@ define internal void @_GLOBAL__sub_I_test.cpp.ctor() #0 {
 
 ; Function Attrs: nounwind sspstrong
 define internal void @__cxx_global_var_init() #0 {
-  store i32 0, i32 addrspace(4)* addrspacecast (i32 addrspace(1)* @_ZL15DIVERGENCE to i32 addrspace(4)*), align 4
+  store i32 0, ptr addrspace(4) addrspacecast (ptr addrspace(1) @_ZL15DIVERGENCE to ptr addrspace(4)), align 4
   ret void
 }
 
diff --git a/test/extensions/INTEL/SPV_INTEL_function_pointers/gv-func-ptr.ll b/test/extensions/INTEL/SPV_INTEL_function_pointers/gv-func-ptr.ll
index 073bc3aa7f..03ff7c2159 100644
--- a/test/extensions/INTEL/SPV_INTEL_function_pointers/gv-func-ptr.ll
+++ b/test/extensions/INTEL/SPV_INTEL_function_pointers/gv-func-ptr.ll
@@ -8,17 +8,17 @@
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024"
 target triple = "spir64-unknown-unknown"
 
-%structtype.3 = type { [1 x i8 addrspace(4)*] }
+%structtype.3 = type { [1 x ptr addrspace(4)] }
 
 ; CHECK-LLVM: @A = addrspace(1) constant %structtype.3 { [1 x ptr addrspace(4)] [ptr addrspace(4) addrspacecast (ptr @foo to ptr addrspace(4))] }, align 8
 
-@A = linkonce_odr addrspace(1) constant %structtype.3 { [1 x i8 addrspace(4)*] [i8 addrspace(4)* addrspacecast (i8* bitcast (void ()* @foo to i8*) to i8 addrspace(4)*)] }, align 8
+@A = linkonce_odr addrspace(1) constant %structtype.3 { [1 x ptr addrspace(4)] [ptr addrspace(4) addrspacecast (ptr @foo to ptr addrspace(4))] }, align 8
 
 ; Function Attrs: nounwind
 define linkonce_odr spir_func void @foo() #0 {
 entry:
 ; CHECK-LLVM: %0 = getelementptr inbounds %structtype.3, ptr addrspace(1) @A, i64 0, i32 0, i64 2
-  %0 = getelementptr inbounds %structtype.3, %structtype.3 addrspace(1)* @A, i64 0, i32 0, i64 2
+  %0 = getelementptr inbounds %structtype.3, ptr addrspace(1) @A, i64 0, i32 0, i64 2
   ret void
 }
 
diff --git a/test/extensions/INTEL/SPV_INTEL_function_pointers/non-uniform-function-pointer.ll b/test/extensions/INTEL/SPV_INTEL_function_pointers/non-uniform-function-pointer.ll
index ab327f0099..1670f825f3 100644
--- a/test/extensions/INTEL/SPV_INTEL_function_pointers/non-uniform-function-pointer.ll
+++ b/test/extensions/INTEL/SPV_INTEL_function_pointers/non-uniform-function-pointer.ll
@@ -62,8 +62,8 @@ target triple = "spir64-unknown-unknown"
 define spir_func i32 @foo(i32 %v) #0 {
 entry:
   %v.addr = alloca i32, align 4
-  store i32 %v, i32* %v.addr, align 4
-  %0 = load i32, i32* %v.addr, align 4
+  store i32 %v, ptr %v.addr, align 4
+  %0 = load i32, ptr %v.addr, align 4
   %add = add nsw i32 %0, 1
   ret i32 %add
 }
@@ -72,46 +72,46 @@ entry:
 define spir_func i32 @bar(i32 %v) #0 {
 entry:
   %v.addr = alloca i32, align 4
-  store i32 %v, i32* %v.addr, align 4
-  %0 = load i32, i32* %v.addr, align 4
+  store i32 %v, ptr %v.addr, align 4
+  %0 = load i32, ptr %v.addr, align 4
   %add = add nsw i32 %0, 2
   ret i32 %add
 }
 
 ; Function Attrs: convergent noinline nounwind optnone
-define spir_kernel void @test(i32 addrspace(1)* %data, i32 %control) #1 !kernel_arg_addr_space !1 !kernel_arg_access_qual !4 !kernel_arg_type !5 !kernel_arg_base_type !5 !kernel_arg_type_qual !6 {
+define spir_kernel void @test(ptr addrspace(1) %data, i32 %control) #1 !kernel_arg_addr_space !1 !kernel_arg_access_qual !4 !kernel_arg_type !5 !kernel_arg_base_type !5 !kernel_arg_type_qual !6 {
 entry:
-  %data.addr = alloca i32 addrspace(1)*, align 8
+  %data.addr = alloca ptr addrspace(1), align 8
   %control.addr = alloca i32, align 4
-  %fp = alloca i32 (i32)*, align 8
-  store i32 addrspace(1)* %data, i32 addrspace(1)** %data.addr, align 8
-  store i32 %control, i32* %control.addr, align 4
+  %fp = alloca ptr, align 8
+  store ptr addrspace(1) %data, ptr %data.addr, align 8
+  store i32 %control, ptr %control.addr, align 4
   %call = call spir_func i64 @_Z13get_global_idj(i32 0) #3
-  %0 = load i32, i32* %control.addr, align 4
+  %0 = load i32, ptr %control.addr, align 4
   %conv = sext i32 %0 to i64
   %rem = urem i64 %call, %conv
   %cmp = icmp eq i64 %rem, 0
   br i1 %cmp, label %if.then, label %if.else
 
 if.then:                                          ; preds = %entry
-  store i32 (i32)* @foo, i32 (i32)** %fp, align 8
+  store ptr @foo, ptr %fp, align 8
   br label %if.end
 
 if.else:                                          ; preds = %entry
-  store i32 (i32)* @bar, i32 (i32)** %fp, align 8
+  store ptr @bar, ptr %fp, align 8
   br label %if.end
 
 if.end:                                           ; preds = %if.else, %if.then
-  %1 = load i32 (i32)*, i32 (i32)** %fp, align 8
-  %2 = load i32 addrspace(1)*, i32 addrspace(1)** %data.addr, align 8
+  %1 = load ptr, ptr %fp, align 8
+  %2 = load ptr addrspace(1), ptr %data.addr, align 8
   %call2 = call spir_func i64 @_Z13get_global_idj(i32 0) #3
-  %arrayidx = getelementptr inbounds i32, i32 addrspace(1)* %2, i64 %call2
-  %3 = load i32, i32 addrspace(1)* %arrayidx, align 4
+  %arrayidx = getelementptr inbounds i32, ptr addrspace(1) %2, i64 %call2
+  %3 = load i32, ptr addrspace(1) %arrayidx, align 4
   %call3 = call spir_func i32 %1(i32 %3) #4
-  %4 = load i32 addrspace(1)*, i32 addrspace(1)** %data.addr, align 8
+  %4 = load ptr addrspace(1), ptr %data.addr, align 8
   %call4 = call spir_func i64 @_Z13get_global_idj(i32 0) #3
-  %arrayidx5 = getelementptr inbounds i32, i32 addrspace(1)* %4, i64 %call4
-  store i32 %call3, i32 addrspace(1)* %arrayidx5, align 4
+  %arrayidx5 = getelementptr inbounds i32, ptr addrspace(1) %4, i64 %call4
+  store i32 %call3, ptr addrspace(1) %arrayidx5, align 4
   ret void
 }
 
diff --git a/test/extensions/INTEL/SPV_INTEL_function_pointers/referenced-indirectly.ll b/test/extensions/INTEL/SPV_INTEL_function_pointers/referenced-indirectly.ll
index 5a22b9ed0a..1ac43bd334 100644
--- a/test/extensions/INTEL/SPV_INTEL_function_pointers/referenced-indirectly.ll
+++ b/test/extensions/INTEL/SPV_INTEL_function_pointers/referenced-indirectly.ll
@@ -36,26 +36,26 @@ target triple = "spir64-unknown-unknown"
 define spir_func i32 @foo(i32 %arg) #0 {
 entry:
   %arg.addr = alloca i32, align 4
-  store i32 %arg, i32* %arg.addr, align 4
-  %0 = load i32, i32* %arg.addr, align 4
+  store i32 %arg, ptr %arg.addr, align 4
+  %0 = load i32, ptr %arg.addr, align 4
   %add = add nsw i32 %0, 10
   ret i32 %add
 }
 
 ; Function Attrs: convergent noinline nounwind optnone
-define spir_kernel void @test(i32 addrspace(1)* %data, i32 %input) #1 !kernel_arg_addr_space !1 !kernel_arg_access_qual !5 !kernel_arg_type !6 !kernel_arg_base_type !6 !kernel_arg_type_qual !7 {
+define spir_kernel void @test(ptr addrspace(1) %data, i32 %input) #1 !kernel_arg_addr_space !1 !kernel_arg_access_qual !5 !kernel_arg_type !6 !kernel_arg_base_type !6 !kernel_arg_type_qual !7 {
 entry:
-  %data.addr = alloca i32 addrspace(1)*, align 8
+  %data.addr = alloca ptr addrspace(1), align 8
   %input.addr = alloca i32, align 4
-  %fp = alloca i32 (i32)*, align 8
-  store i32 addrspace(1)* %data, i32 addrspace(1)** %data.addr, align 8
-  store i32 %input, i32* %input.addr, align 4
-  store i32 (i32)* @foo, i32 (i32)** %fp, align 8
-  %0 = load i32 (i32)*, i32 (i32)** %fp, align 8
-  %1 = load i32, i32* %input.addr, align 4
+  %fp = alloca ptr, align 8
+  store ptr addrspace(1) %data, ptr %data.addr, align 8
+  store i32 %input, ptr %input.addr, align 4
+  store ptr @foo, ptr %fp, align 8
+  %0 = load ptr, ptr %fp, align 8
+  %1 = load i32, ptr %input.addr, align 4
   %call = call spir_func i32 %0(i32 %1) #2
-  %2 = load i32 addrspace(1)*, i32 addrspace(1)** %data.addr, align 8
-  store i32 %call, i32 addrspace(1)* %2, align 4
+  %2 = load ptr addrspace(1), ptr %data.addr, align 8
+  store i32 %call, ptr addrspace(1) %2, align 4
   ret void
 }
 
diff --git a/test/extensions/INTEL/SPV_INTEL_function_pointers/select.ll b/test/extensions/INTEL/SPV_INTEL_function_pointers/select.ll
index 62e1b7862b..3c4c9de5bb 100644
--- a/test/extensions/INTEL/SPV_INTEL_function_pointers/select.ll
+++ b/test/extensions/INTEL/SPV_INTEL_function_pointers/select.ll
@@ -41,62 +41,57 @@ $_ZTS6kernel = comdat any
 @__spirv_BuiltInGlobalInvocationId = external dso_local local_unnamed_addr addrspace(1) constant <3 x i64>, align 32
 
 ; Function Attrs: norecurse
-define weak_odr dso_local spir_kernel void @_ZTS6kernel(i32 addrspace(1)* %_arg_, %"class._ZTSN2cl4sycl5rangeILi1EEE.cl::sycl::range"* byval(%"class._ZTSN2cl4sycl5rangeILi1EEE.cl::sycl::range") align 8 %_arg_1, %"class._ZTSN2cl4sycl5rangeILi1EEE.cl::sycl::range"* byval(%"class._ZTSN2cl4sycl5rangeILi1EEE.cl::sycl::range") align 8 %_arg_2, %"class._ZTSN2cl4sycl2idILi1EEE.cl::sycl::id"* byval(%"class._ZTSN2cl4sycl2idILi1EEE.cl::sycl::id") align 8 %_arg_3) local_unnamed_addr #0 comdat !kernel_arg_addr_space !4 !kernel_arg_access_qual !5 !kernel_arg_type !6 !kernel_arg_base_type !6 !kernel_arg_type_qual !7 {
+define weak_odr dso_local spir_kernel void @_ZTS6kernel(ptr addrspace(1) %_arg_, ptr byval(%"class._ZTSN2cl4sycl5rangeILi1EEE.cl::sycl::range") align 8 %_arg_1, ptr byval(%"class._ZTSN2cl4sycl5rangeILi1EEE.cl::sycl::range") align 8 %_arg_2, ptr byval(%"class._ZTSN2cl4sycl2idILi1EEE.cl::sycl::id") align 8 %_arg_3) local_unnamed_addr #0 comdat !kernel_arg_addr_space !4 !kernel_arg_access_qual !5 !kernel_arg_type !6 !kernel_arg_base_type !6 !kernel_arg_type_qual !7 {
 entry:
-  %fptr.alloca = alloca i32 (i32, i32)*, align 8
+  %fptr.alloca = alloca ptr, align 8
   %ref.tmp.i = alloca %"class._ZTSN2cl4sycl2idILi1EEE.cl::sycl::id", align 8
   %agg.tmp2.i = alloca %"class._ZTSN2cl4sycl5rangeILi1EEE.cl::sycl::range", align 8
   %agg.tmp3.i = alloca %"class._ZTSN2cl4sycl5rangeILi1EEE.cl::sycl::range", align 8
   %agg.tmp6 = alloca %"class._ZTSN2cl4sycl2idILi1EEE.cl::sycl::id", align 8
-  %0 = bitcast %"class._ZTSN2cl4sycl5rangeILi1EEE.cl::sycl::range"* %agg.tmp2.i to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %0)
-  %1 = bitcast %"class._ZTSN2cl4sycl5rangeILi1EEE.cl::sycl::range"* %agg.tmp3.i to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %1)
-  %2 = addrspacecast %"class._ZTSN2cl4sycl5rangeILi1EEE.cl::sycl::range"* %agg.tmp2.i to %"class._ZTSN2cl4sycl5rangeILi1EEE.cl::sycl::range" addrspace(4)*
-  %ptrint4.i = ptrtoint %"class._ZTSN2cl4sycl5rangeILi1EEE.cl::sycl::range" addrspace(4)* %2 to i64
+  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %agg.tmp2.i)
+  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %agg.tmp3.i)
+  %0 = addrspacecast ptr %agg.tmp2.i to ptr addrspace(4)
+  %ptrint4.i = ptrtoint ptr addrspace(4) %0 to i64
   %maskedptr5.i = and i64 %ptrint4.i, 7
   %maskcond6.i = icmp eq i64 %maskedptr5.i, 0
-  %3 = addrspacecast %"class._ZTSN2cl4sycl5rangeILi1EEE.cl::sycl::range"* %agg.tmp3.i to %"class._ZTSN2cl4sycl5rangeILi1EEE.cl::sycl::range" addrspace(4)*
-  %ptrint.i = ptrtoint %"class._ZTSN2cl4sycl5rangeILi1EEE.cl::sycl::range" addrspace(4)* %3 to i64
+  %1 = addrspacecast ptr %agg.tmp3.i to ptr addrspace(4)
+  %ptrint.i = ptrtoint ptr addrspace(4) %1 to i64
   %maskedptr.i = and i64 %ptrint.i, 7
   %maskcond.i = icmp eq i64 %maskedptr.i, 0
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %0)
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %1)
-  %4 = getelementptr inbounds %"class._ZTSN2cl4sycl2idILi1EEE.cl::sycl::id", %"class._ZTSN2cl4sycl2idILi1EEE.cl::sycl::id"* %_arg_3, i64 0, i32 0, i32 0, i64 0
-  %5 = load i64, i64* %4, align 8
-  %add.ptr.i = getelementptr inbounds i32, i32 addrspace(1)* %_arg_, i64 %5
-  %6 = addrspacecast %"class._ZTSN2cl4sycl2idILi1EEE.cl::sycl::id"* %agg.tmp6 to %"class._ZTSN2cl4sycl2idILi1EEE.cl::sycl::id" addrspace(4)*
-  %ptrint = ptrtoint %"class._ZTSN2cl4sycl2idILi1EEE.cl::sycl::id" addrspace(4)* %6 to i64
+  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %agg.tmp2.i)
+  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %agg.tmp3.i)
+  %2 = load i64, ptr %_arg_3, align 8
+  %add.ptr.i = getelementptr inbounds i32, ptr addrspace(1) %_arg_, i64 %2
+  %3 = addrspacecast ptr %agg.tmp6 to ptr addrspace(4)
+  %ptrint = ptrtoint ptr addrspace(4) %3 to i64
   %maskedptr = and i64 %ptrint, 7
   %maskcond = icmp eq i64 %maskedptr, 0
-  %7 = load <3 x i64>, <3 x i64> addrspace(4)* addrspacecast (<3 x i64> addrspace(1)* @__spirv_BuiltInGlobalInvocationId to <3 x i64> addrspace(4)*), align 32, !noalias !8
-  %8 = extractelement <3 x i64> %7, i64 0
-  %arrayinit.begin.i.i.i.i.i = getelementptr inbounds %"class._ZTSN2cl4sycl2idILi1EEE.cl::sycl::id", %"class._ZTSN2cl4sycl2idILi1EEE.cl::sycl::id" addrspace(4)* %6, i64 0, i32 0, i32 0, i64 0
-  store i64 %8, i64 addrspace(4)* %arrayinit.begin.i.i.i.i.i, align 8, !tbaa !15, !alias.scope !8
-  %9 = bitcast %"class._ZTSN2cl4sycl2idILi1EEE.cl::sycl::id"* %ref.tmp.i to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %9) #4
-  %10 = addrspacecast %"class._ZTSN2cl4sycl2idILi1EEE.cl::sycl::id"* %ref.tmp.i to %"class._ZTSN2cl4sycl2idILi1EEE.cl::sycl::id" addrspace(4)*
-  %ptrint.i2 = ptrtoint %"class._ZTSN2cl4sycl2idILi1EEE.cl::sycl::id" addrspace(4)* %10 to i64
+  %4 = load <3 x i64>, ptr addrspace(4) addrspacecast (ptr addrspace(1) @__spirv_BuiltInGlobalInvocationId to ptr addrspace(4)), align 32, !noalias !8
+  %5 = extractelement <3 x i64> %4, i64 0
+  store i64 %5, ptr addrspace(4) %3, align 8, !tbaa !15, !alias.scope !8
+  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %ref.tmp.i) #4
+  %6 = addrspacecast ptr %ref.tmp.i to ptr addrspace(4)
+  %ptrint.i2 = ptrtoint ptr addrspace(4) %6 to i64
   %maskedptr.i3 = and i64 %ptrint.i2, 7
   %maskcond.i4 = icmp eq i64 %maskedptr.i3, 0
-  %rem.i.i = and i64 %8, 1
+  %rem.i.i = and i64 %5, 1
   %cmp.i.i = icmp eq i64 %rem.i.i, 0
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %9) #4
-  %_Z3barii._Z3bazii.i = select i1 %cmp.i.i, i32 (i32, i32)* @_Z3barii, i32 (i32, i32)* @_Z3bazii
-  store i32 (i32, i32)* %_Z3barii._Z3bazii.i, i32 (i32, i32)** %fptr.alloca, align 8
-  %fptr = load i32 (i32, i32)*, i32 (i32, i32)** %fptr.alloca, align 8
+  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %ref.tmp.i) #4
+  %_Z3barii._Z3bazii.i = select i1 %cmp.i.i, ptr @_Z3barii, ptr @_Z3bazii
+  store ptr %_Z3barii._Z3bazii.i, ptr %fptr.alloca, align 8
+  %fptr = load ptr, ptr %fptr.alloca, align 8
   %call4.i = call spir_func i32 %fptr(i32 10, i32 10), !callees !19
-  %arrayidx.i3.i = getelementptr inbounds i32, i32 addrspace(1)* %add.ptr.i, i64 %8
-  %arrayidx.ascast.i.i = addrspacecast i32 addrspace(1)* %arrayidx.i3.i to i32 addrspace(4)*
-  store i32 %call4.i, i32 addrspace(4)* %arrayidx.ascast.i.i, align 4, !tbaa !20
+  %arrayidx.i3.i = getelementptr inbounds i32, ptr addrspace(1) %add.ptr.i, i64 %5
+  %arrayidx.ascast.i.i = addrspacecast ptr addrspace(1) %arrayidx.i3.i to ptr addrspace(4)
+  store i32 %call4.i, ptr addrspace(4) %arrayidx.ascast.i.i, align 4, !tbaa !20
   ret void
 }
 
 ; Function Attrs: argmemonly nounwind willreturn
-declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #1
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
 
 ; Function Attrs: argmemonly nounwind willreturn
-declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #1
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
 
 ; Function Attrs: norecurse nounwind readnone
 define dso_local spir_func i32 @_Z3barii(i32 %a, i32 %b) local_unnamed_addr #2 {
@@ -142,6 +137,6 @@ attributes #4 = { nounwind }
 !16 = !{!"long", !17, i64 0}
 !17 = !{!"omnipotent char", !18, i64 0}
 !18 = !{!"Simple C++ TBAA"}
-!19 = !{i32 (i32, i32)* @_Z3barii, i32 (i32, i32)* @_Z3bazii}
+!19 = !{ptr @_Z3barii, ptr @_Z3bazii}
 !20 = !{!21, !21, i64 0}
 !21 = !{!"int", !17, i64 0}
diff --git a/test/extensions/INTEL/SPV_INTEL_function_pointers/vector_elem.ll b/test/extensions/INTEL/SPV_INTEL_function_pointers/vector_elem.ll
index 421a346667..adcd9d77b7 100644
--- a/test/extensions/INTEL/SPV_INTEL_function_pointers/vector_elem.ll
+++ b/test/extensions/INTEL/SPV_INTEL_function_pointers/vector_elem.ll
@@ -34,9 +34,9 @@ entry:
 ; Function Attrs: noinline nounwind
 define dllexport void @vadd() {
 entry:
-  %Funcs = alloca <2 x i32 (i32)*>, align 16
-  %0 = insertelement <2 x i32 (i32)*> undef, i32 (i32)* @_Z2f1u2CMvb32_j, i32 0
-  %1 = insertelement <2 x i32 (i32)*> %0, i32 (i32)* @_Z2f2u2CMvb32_j, i32 1
-  store <2 x i32 (i32)*> %1, <2 x i32 (i32)*>* %Funcs, align 16
+  %Funcs = alloca <2 x ptr>, align 16
+  %0 = insertelement <2 x ptr> undef, ptr @_Z2f1u2CMvb32_j, i32 0
+  %1 = insertelement <2 x ptr> %0, ptr @_Z2f2u2CMvb32_j, i32 1
+  store <2 x ptr> %1, ptr %Funcs, align 16
   ret void
 }
diff --git a/test/extensions/INTEL/SPV_INTEL_hw_thread_queries/intel_hw_thread_queries_load_from_global.ll b/test/extensions/INTEL/SPV_INTEL_hw_thread_queries/intel_hw_thread_queries_load_from_global.ll
index c1117b80d1..3b809ee873 100644
--- a/test/extensions/INTEL/SPV_INTEL_hw_thread_queries/intel_hw_thread_queries_load_from_global.ll
+++ b/test/extensions/INTEL/SPV_INTEL_hw_thread_queries/intel_hw_thread_queries_load_from_global.ll
@@ -26,8 +26,8 @@ target triple = "spir-unknown-unknown"
 ; Function Attrs: nounwind readnone
 define spir_kernel void @foo() {
 entry:
-  %0 = load i32, i32 addrspace(4)* addrspacecast (i32 addrspace(1)* @__spirv_BuiltInSubDeviceIDINTEL to i32 addrspace(4)*), align 4
-  %1 = load i32, i32 addrspace(4)* addrspacecast (i32 addrspace(1)* @__spirv_BuiltInGlobalHWThreadIDINTEL to i32 addrspace(4)*), align 4
+  %0 = load i32, ptr addrspace(4) addrspacecast (ptr addrspace(1) @__spirv_BuiltInSubDeviceIDINTEL to ptr addrspace(4)), align 4
+  %1 = load i32, ptr addrspace(4) addrspacecast (ptr addrspace(1) @__spirv_BuiltInGlobalHWThreadIDINTEL to ptr addrspace(4)), align 4
   ; CHECK-LLVM: call spir_func i32 @_Z31__spirv_BuiltInSubDeviceIDINTELv() #1
   ; CHECK-LLVM: call spir_func i32 @_Z36__spirv_BuiltInGlobalHWThreadIDINTELv() #1
   ret void
diff --git a/test/extensions/INTEL/SPV_INTEL_hw_thread_queries/negative_intel_hw_thread_queries.ll b/test/extensions/INTEL/SPV_INTEL_hw_thread_queries/negative_intel_hw_thread_queries.ll
index da7ab6bc1b..50a88902e5 100644
--- a/test/extensions/INTEL/SPV_INTEL_hw_thread_queries/negative_intel_hw_thread_queries.ll
+++ b/test/extensions/INTEL/SPV_INTEL_hw_thread_queries/negative_intel_hw_thread_queries.ll
@@ -16,6 +16,6 @@ target triple = "spir-unknown-unknown"
 ; Function Attrs: nounwind readnone
 define spir_kernel void @foo() {
 entry:
-  %0 = load i32, i32 addrspace(4)* addrspacecast (i32 addrspace(1)* @__spirv_BuiltInSubDeviceIDINTEL to i32 addrspace(4)*), align 4
+  %0 = load i32, ptr addrspace(4) addrspacecast (ptr addrspace(1) @__spirv_BuiltInSubDeviceIDINTEL to ptr addrspace(4)), align 4
   ret void
 }
diff --git a/test/extensions/INTEL/SPV_INTEL_io_pipes/PipeStorageIOINTEL.ll b/test/extensions/INTEL/SPV_INTEL_io_pipes/PipeStorageIOINTEL.ll
index 89d3ceb8ef..cc9f7a5219 100644
--- a/test/extensions/INTEL/SPV_INTEL_io_pipes/PipeStorageIOINTEL.ll
+++ b/test/extensions/INTEL/SPV_INTEL_io_pipes/PipeStorageIOINTEL.ll
@@ -35,11 +35,11 @@ target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:2
 target triple = "spir-unknown-unknown"
 
 %spirv.ConstantPipeStorage = type { i32, i32, i32 }
-%"class.cl::pipe_storage<int __attribute__((ext_vector_type(4))), 1>" = type { %spirv.PipeStorage addrspace(1)* }
+%"class.cl::pipe_storage<int __attribute__((ext_vector_type(4))), 1>" = type { ptr addrspace(1) }
 %spirv.PipeStorage = type opaque
 
 @_ZN2cl9__details29OpConstantPipeStorage_CreatorILi16ELi16ELi1EE5valueE = linkonce_odr addrspace(1) global %spirv.ConstantPipeStorage { i32 16, i32 16, i32 1 }, align 4
-@mygpipe = addrspace(1) global %"class.cl::pipe_storage<int __attribute__((ext_vector_type(4))), 1>" { %spirv.PipeStorage addrspace(1)* bitcast (%spirv.ConstantPipeStorage addrspace(1)* @_ZN2cl9__details29OpConstantPipeStorage_CreatorILi16ELi16ELi1EE5valueE to %spirv.PipeStorage addrspace(1)*) }, align 4, !io_pipe_id !5
+@mygpipe = addrspace(1) global %"class.cl::pipe_storage<int __attribute__((ext_vector_type(4))), 1>" { ptr addrspace(1) @_ZN2cl9__details29OpConstantPipeStorage_CreatorILi16ELi16ELi1EE5valueE }, align 4, !io_pipe_id !5
 
 ; Function Attrs: nounwind
 define spir_kernel void @worker() {
diff --git a/test/extensions/INTEL/SPV_INTEL_joint_matrix/joint_matrix.ll b/test/extensions/INTEL/SPV_INTEL_joint_matrix/joint_matrix.ll
index 71ea0a8afe..7c8ec53ebc 100644
--- a/test/extensions/INTEL/SPV_INTEL_joint_matrix/joint_matrix.ll
+++ b/test/extensions/INTEL/SPV_INTEL_joint_matrix/joint_matrix.ll
@@ -52,27 +52,25 @@ entry:
   %ref.tmp29.sroa.0.i = alloca target("spirv.JointMatrixINTEL", i32, 12, 12, 3, 3, 2), align 8
   %agg.tmp15.sroa.0.sroa.2.0..sroa_idx = getelementptr inbounds %"class.sycl::_V1::range", ptr %_arg_accB5, i64 0, i32 0, i32 0, i64 1
   %agg.tmp15.sroa.0.sroa.2.0.copyload = load i64, ptr %agg.tmp15.sroa.0.sroa.2.0..sroa_idx, align 8
-  %0 = getelementptr inbounds %"class.sycl::_V1::id", ptr %_arg_accB6, i64 0, i32 0, i32 0, i64 0
-  %agg.tmp16.sroa.0.sroa.0.0.copyload = load i64, ptr %0, align 8
+  %agg.tmp16.sroa.0.sroa.0.0.copyload = load i64, ptr %_arg_accB6, align 8
   %agg.tmp16.sroa.0.sroa.2.0..sroa_idx = getelementptr inbounds %"class.sycl::_V1::id", ptr %_arg_accB6, i64 0, i32 0, i32 0, i64 1
   %agg.tmp16.sroa.0.sroa.2.0.copyload = load i64, ptr %agg.tmp16.sroa.0.sroa.2.0..sroa_idx, align 8
   %mul.i4.i.i.i.i45 = mul i64 %agg.tmp16.sroa.0.sroa.0.0.copyload, %agg.tmp15.sroa.0.sroa.2.0.copyload
   %add.i6.i.i.i.i46 = add i64 %mul.i4.i.i.i.i45, %agg.tmp16.sroa.0.sroa.2.0.copyload
   %add.ptr.i47 = getelementptr inbounds i8, ptr addrspace(1) %_arg_accB, i64 %add.i6.i.i.i.i46
-  %1 = load <3 x i64>, ptr addrspace(1) @__spirv_BuiltInGlobalInvocationId, align 32
-  %2 = extractelement <3 x i64> %1, i64 1
-  %3 = extractelement <3 x i64> %1, i64 0
-  %4 = load <3 x i64>, ptr addrspace(1) @__spirv_BuiltInLocalInvocationId, align 32
-  %5 = extractelement <3 x i64> %4, i64 1
-  %6 = extractelement <3 x i64> %4, i64 0
-  %cmp.i.i = icmp ult i64 %2, 2147483648
-  %cmp.i54.i = icmp ult i64 %3, 2147483648
-  %cmp.i56.i = icmp ult i64 %5, 2147483648
-  %sub.i = sub nsw i64 %2, %5
-  %cmp.i58.i = icmp ult i64 %6, 2147483648
-  %sub5.i = sub nsw i64 %3, %6
-  %sub_c.sroa.0.i.0.i.0..sroa_cast = bitcast ptr %sub_c.sroa.0.i to ptr
-  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %sub_c.sroa.0.i.0.i.0..sroa_cast)
+  %0 = load <3 x i64>, ptr addrspace(1) @__spirv_BuiltInGlobalInvocationId, align 32
+  %1 = extractelement <3 x i64> %0, i64 1
+  %2 = extractelement <3 x i64> %0, i64 0
+  %3 = load <3 x i64>, ptr addrspace(1) @__spirv_BuiltInLocalInvocationId, align 32
+  %4 = extractelement <3 x i64> %3, i64 1
+  %5 = extractelement <3 x i64> %3, i64 0
+  %cmp.i.i = icmp ult i64 %1, 2147483648
+  %cmp.i54.i = icmp ult i64 %2, 2147483648
+  %cmp.i56.i = icmp ult i64 %4, 2147483648
+  %sub.i = sub nsw i64 %1, %4
+  %cmp.i58.i = icmp ult i64 %5, 2147483648
+  %sub5.i = sub nsw i64 %2, %5
+  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %sub_c.sroa.0.i)
   %call.i.i = tail call spir_func noundef target("spirv.JointMatrixINTEL", i32, 12, 12, 3, 3, 2) @_Z26__spirv_CompositeConstructIiLm12ELm12ELN5__spv9MatrixUseE2ELNS0_12MatrixLayoutE3ELNS0_5Scope4FlagE3EEPNS0_24__spirv_JointMatrixINTELIT_XT0_EXT1_EXT3_EXT4_EXT2_EEES6_(i32 noundef 0) #4
   store target("spirv.JointMatrixINTEL", i32, 12, 12, 3, 3, 2) %call.i.i, ptr %sub_c.sroa.0.i, align 8
   %mul.i = mul nsw i64 %sub.i, 12
@@ -85,9 +83,6 @@ entry:
   %add.ptr.i.i105141.i = getelementptr i8, ptr addrspace(1) %add.ptr.i47, i64 %mul26.i
   %mul22.i = shl i64 %_arg_N, 2
   %add.ptr.i108140.i = getelementptr i8, ptr addrspace(1) %add.ptr.i.i105141.i, i64 %idx.neg.i.i104.i
-  %ref.tmp29.sroa.0.i.0.i.0..sroa_cast = bitcast ptr %ref.tmp29.sroa.0.i to ptr
-  %7 = bitcast ptr %ref.tmp29.sroa.0.i to ptr
-  %8 = bitcast ptr %sub_c.sroa.0.i to ptr
   br label %for.cond.i
 
 for.cond.i:                                       ; preds = %for.body.i, %entry
@@ -108,13 +103,13 @@ for.body.i:                                       ; preds = %for.cond.i
   %add.ptr.i111.i = getelementptr i8, ptr addrspace(1) %add.ptr.i108140.i, i64 %mul23.i
   %call.ascast.i72.i = addrspacecast ptr addrspace(1) %add.ptr.i111.i to ptr addrspace(4)
   %call1.i73.i = tail call spir_func noundef target("spirv.JointMatrixINTEL", i8, 48, 12, 2, 3, 1) @_Z28__spirv_JointMatrixLoadINTELIaLm48ELm12ELN5__spv9MatrixUseE1ELNS0_12MatrixLayoutE2ELNS0_5Scope4FlagE3EEPNS0_24__spirv_JointMatrixINTELIT_XT0_EXT1_EXT3_EXT4_EXT2_EEEPS6_mS2_S4_i(ptr addrspace(4) noundef %call.ascast.i72.i, i64 noundef %mul22.i, i32 noundef 2, i32 noundef 3, i32 noundef 0) #4
-  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %ref.tmp29.sroa.0.i.0.i.0..sroa_cast)
+  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %ref.tmp29.sroa.0.i)
   %sub_c.sroa.0.i.0.sub_c.sroa.0.i.0.sub_c.sroa.0.0.sub_c.sroa.0.0.sub_c.sroa.0.0.125.i = load target("spirv.JointMatrixINTEL", i32, 12, 12, 3, 3, 2), ptr %sub_c.sroa.0.i, align 8
   %call.i77.i = tail call spir_func noundef target("spirv.JointMatrixINTEL", i32, 12, 12, 3, 3, 2) @_Z27__spirv_JointMatrixMadINTELIaiLm12ELm48ELm12ELN5__spv9MatrixUseE0ELS1_1ELS1_2ELNS0_12MatrixLayoutE0ELS2_2ELS2_3ELNS0_5Scope4FlagE3EEPNS0_24__spirv_JointMatrixINTELIT0_XT1_EXT3_EXT9_EXT10_EXT6_EEEPNS5_IT_XT1_EXT2_EXT7_EXT10_EXT4_EEEPNS5_IS9_XT2_EXT3_EXT8_EXT10_EXT5_EEES8_S4_(target("spirv.JointMatrixINTEL", i8, 12, 48, 0, 3, 0) noundef %call1.i.i, target("spirv.JointMatrixINTEL", i8, 48, 12, 2, 3, 1) noundef %call1.i73.i, target("spirv.JointMatrixINTEL", i32, 12, 12, 3, 3, 2) noundef %sub_c.sroa.0.i.0.sub_c.sroa.0.i.0.sub_c.sroa.0.0.sub_c.sroa.0.0.sub_c.sroa.0.0.125.i, i32 noundef 3) #4
   store target("spirv.JointMatrixINTEL", i32, 12, 12, 3, 3, 2) %call.i77.i, ptr %ref.tmp29.sroa.0.i, align 8
-  %ref.tmp29.sroa.0.i.0.ref.tmp29.sroa.0.i.0.ref.tmp29.sroa.0.0.ref.tmp29.sroa.0.0.ref.tmp29.sroa.0.0..i = load i64, ptr %7, align 8
-  store i64 %ref.tmp29.sroa.0.i.0.ref.tmp29.sroa.0.i.0.ref.tmp29.sroa.0.0.ref.tmp29.sroa.0.0.ref.tmp29.sroa.0.0..i, ptr %8, align 8
-  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %ref.tmp29.sroa.0.i.0.i.0..sroa_cast)
+  %ref.tmp29.sroa.0.i.0.ref.tmp29.sroa.0.i.0.ref.tmp29.sroa.0.0.ref.tmp29.sroa.0.0.ref.tmp29.sroa.0.0..i = load i64, ptr %ref.tmp29.sroa.0.i, align 8
+  store i64 %ref.tmp29.sroa.0.i.0.ref.tmp29.sroa.0.i.0.ref.tmp29.sroa.0.0.ref.tmp29.sroa.0.0.ref.tmp29.sroa.0.0..i, ptr %sub_c.sroa.0.i, align 8
+  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %ref.tmp29.sroa.0.i)
   %add.i = add nuw nsw i32 %k.0.i, 1
   br label %for.cond.i
 
@@ -126,7 +121,7 @@ _ZZZ15matrix_multiplyIiaLm24ELm96ELm24ELm96ELm24ELm24EEvR10big_matrixIT_XT5_EXT6
   %call.ascast.i.i = addrspacecast ptr addrspace(1) %add.ptr.i81.i to ptr addrspace(4)
   %sub_c.sroa.0.i.0.sub_c.sroa.0.i.0.sub_c.sroa.0.0.sub_c.sroa.0.0.sub_c.sroa.0.0..i = load target("spirv.JointMatrixINTEL", i32, 12, 12, 3, 3, 2), ptr %sub_c.sroa.0.i, align 8
   tail call spir_func void @_Z29__spirv_JointMatrixStoreINTELIiLm12ELm12ELN5__spv9MatrixUseE2ELNS0_12MatrixLayoutE3ELNS0_5Scope4FlagE3EEvPT_PNS0_24__spirv_JointMatrixINTELIS5_XT0_EXT1_EXT3_EXT4_EXT2_EEEmS2_S4_i(ptr addrspace(4) noundef %call.ascast.i.i, target("spirv.JointMatrixINTEL", i32, 12, 12, 3, 3, 2) noundef %sub_c.sroa.0.i.0.sub_c.sroa.0.i.0.sub_c.sroa.0.0.sub_c.sroa.0.0.sub_c.sroa.0.0..i, i64 noundef %_arg_N, i32 noundef 0, i32 noundef 3, i32 noundef 0) #4
-  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %sub_c.sroa.0.i.0.i.0..sroa_cast)
+  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %sub_c.sroa.0.i)
   ret void
 }
 
diff --git a/test/extensions/INTEL/SPV_INTEL_kernel_attributes/intel_fpga_function_attributes.ll b/test/extensions/INTEL/SPV_INTEL_kernel_attributes/intel_fpga_function_attributes.ll
index f7962cb3df..36b2a38f0f 100644
--- a/test/extensions/INTEL/SPV_INTEL_kernel_attributes/intel_fpga_function_attributes.ll
+++ b/test/extensions/INTEL/SPV_INTEL_kernel_attributes/intel_fpga_function_attributes.ll
@@ -94,47 +94,43 @@ $_ZN3FooclEv = comdat any
 define spir_kernel void @_ZTSZ3barvE11kernel_name() #0 !kernel_arg_addr_space !4 !kernel_arg_access_qual !4 !kernel_arg_type !4 !kernel_arg_base_type !4 !kernel_arg_type_qual !4 !num_simd_work_items !5 !max_work_group_size !6 !max_global_work_dim !7 !no_global_work_offset !4 !stall_enable !7 !scheduler_target_fmax_mhz !12 !loop_fuse !13 !initiation_interval !14 !max_concurrency !15 !disable_loop_pipelining !7 {
 entry:
   %Foo = alloca %class._ZTS3Foo.Foo, align 1
-  %0 = bitcast %class._ZTS3Foo.Foo* %Foo to i8*
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %0) #4
-  %1 = addrspacecast %class._ZTS3Foo.Foo* %Foo to %class._ZTS3Foo.Foo addrspace(4)*
-  call spir_func void @_ZN3FooclEv(%class._ZTS3Foo.Foo addrspace(4)* %1)
-  %2 = bitcast %class._ZTS3Foo.Foo* %Foo to i8*
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %2) #4
+  call void @llvm.lifetime.start.p0(i64 1, ptr %Foo) #4
+  %0 = addrspacecast ptr %Foo to ptr addrspace(4)
+  call spir_func void @_ZN3FooclEv(ptr addrspace(4) %0)
+  call void @llvm.lifetime.end.p0(i64 1, ptr %Foo) #4
   ret void
 }
 
 ; Function Attrs: argmemonly nounwind willreturn
-declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #1
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
 
 ; Function Attrs: nounwind
-define linkonce_odr spir_func void @_ZN3FooclEv(%class._ZTS3Foo.Foo addrspace(4)* %this) #2 comdat align 2 {
+define linkonce_odr spir_func void @_ZN3FooclEv(ptr addrspace(4) %this) #2 comdat align 2 {
 entry:
-  %this.addr = alloca %class._ZTS3Foo.Foo addrspace(4)*, align 8
-  store %class._ZTS3Foo.Foo addrspace(4)* %this, %class._ZTS3Foo.Foo addrspace(4)** %this.addr, align 8, !tbaa !8
-  %this1 = load %class._ZTS3Foo.Foo addrspace(4)*, %class._ZTS3Foo.Foo addrspace(4)** %this.addr, align 8
+  %this.addr = alloca ptr addrspace(4), align 8
+  store ptr addrspace(4) %this, ptr %this.addr, align 8, !tbaa !8
+  %this1 = load ptr addrspace(4), ptr %this.addr, align 8
   ret void
 }
 
 ; Function Attrs: argmemonly nounwind willreturn
-declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #1
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
 ; Function Attrs: nounwind
 define spir_kernel void @_ZTSZ3barvE12kernel_name2() #0 !kernel_arg_addr_space !4 !kernel_arg_access_qual !4 !kernel_arg_type !4 !kernel_arg_base_type !4 !kernel_arg_type_qual !4 {
 entry:
   %0 = alloca %"class._ZTSZ3barvE3$_0.anon", align 1
-  %1 = bitcast %"class._ZTSZ3barvE3$_0.anon"* %0 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %1) #4
-  %2 = addrspacecast %"class._ZTSZ3barvE3$_0.anon"* %0 to %"class._ZTSZ3barvE3$_0.anon" addrspace(4)*
-  call spir_func void @"_ZZ3barvENK3$_0clEv"(%"class._ZTSZ3barvE3$_0.anon" addrspace(4)* %2)
-  %3 = bitcast %"class._ZTSZ3barvE3$_0.anon"* %0 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %3) #4
+  call void @llvm.lifetime.start.p0(i64 1, ptr %0) #4
+  %1 = addrspacecast ptr %0 to ptr addrspace(4)
+  call spir_func void @"_ZZ3barvENK3$_0clEv"(ptr addrspace(4) %1)
+  call void @llvm.lifetime.end.p0(i64 1, ptr %0) #4
   ret void
 }
 ; Function Attrs: inlinehint nounwind
-define internal spir_func void @"_ZZ3barvENK3$_0clEv"(%"class._ZTSZ3barvE3$_0.anon" addrspace(4)* %this) #3 align 2 {
+define internal spir_func void @"_ZZ3barvENK3$_0clEv"(ptr addrspace(4) %this) #3 align 2 {
 entry:
-  %this.addr = alloca %"class._ZTSZ3barvE3$_0.anon" addrspace(4)*, align 8
-  store %"class._ZTSZ3barvE3$_0.anon" addrspace(4)* %this, %"class._ZTSZ3barvE3$_0.anon" addrspace(4)** %this.addr, align 8, !tbaa !8
-  %this1 = load %"class._ZTSZ3barvE3$_0.anon" addrspace(4)*, %"class._ZTSZ3barvE3$_0.anon" addrspace(4)** %this.addr, align 8
+  %this.addr = alloca ptr addrspace(4), align 8
+  store ptr addrspace(4) %this, ptr %this.addr, align 8, !tbaa !8
+  %this1 = load ptr addrspace(4), ptr %this.addr, align 8
   ret void
 }
 
@@ -142,12 +138,10 @@ entry:
 define spir_kernel void @_ZTSZ3barvE11kernel_name3() #0 !disable_loop_pipelining !16 {
 entry:
   %Foo = alloca %class._ZTS3Foo.Foo, align 1
-  %0 = bitcast %class._ZTS3Foo.Foo* %Foo to i8*
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %0) #4
-  %1 = addrspacecast %class._ZTS3Foo.Foo* %Foo to %class._ZTS3Foo.Foo addrspace(4)*
-  call spir_func void @_ZN3FooclEv(%class._ZTS3Foo.Foo addrspace(4)* %1)
-  %2 = bitcast %class._ZTS3Foo.Foo* %Foo to i8*
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %2) #4
+  call void @llvm.lifetime.start.p0(i64 1, ptr %Foo) #4
+  %0 = addrspacecast ptr %Foo to ptr addrspace(4)
+  call spir_func void @_ZN3FooclEv(ptr addrspace(4) %0)
+  call void @llvm.lifetime.end.p0(i64 1, ptr %Foo) #4
   ret void
 }
 
diff --git a/test/extensions/INTEL/SPV_INTEL_masked_gather_scatter/intel-basic-vector-pointers-opaque.ll b/test/extensions/INTEL/SPV_INTEL_masked_gather_scatter/intel-basic-vector-pointers-opaque.ll
index 8449732104..e1a7295786 100644
--- a/test/extensions/INTEL/SPV_INTEL_masked_gather_scatter/intel-basic-vector-pointers-opaque.ll
+++ b/test/extensions/INTEL/SPV_INTEL_masked_gather_scatter/intel-basic-vector-pointers-opaque.ll
@@ -58,7 +58,7 @@ entry:
   ret void
 }
 
-declare <4 x i32 addrspace(1)*> @boo(<4 x i32 addrspace(1)*> %a)
+declare <4 x ptr addrspace(1)> @boo(<4 x ptr addrspace(1)> %a)
 
 !llvm.module.flags = !{!0}
 !opencl.spir.version = !{!1}
diff --git a/test/extensions/INTEL/SPV_INTEL_masked_gather_scatter/intel-gather-scatter.ll b/test/extensions/INTEL/SPV_INTEL_masked_gather_scatter/intel-gather-scatter.ll
index fdd12573e1..6425ae9a0d 100644
--- a/test/extensions/INTEL/SPV_INTEL_masked_gather_scatter/intel-gather-scatter.ll
+++ b/test/extensions/INTEL/SPV_INTEL_masked_gather_scatter/intel-gather-scatter.ll
@@ -54,18 +54,18 @@ target triple = "spir"
 ; Function Attrs: nounwind readnone
 define spir_kernel void @foo() {
 entry:
-  %arg0 = alloca <4 x i32 addrspace(4)*>
-  %arg1 = alloca <4 x i32 addrspace(4)*>
-  %0 = load <4 x i32 addrspace(4)*>, <4 x i32 addrspace(4)*>* %arg0
-  %1 = load <4 x i32 addrspace(4)*>, <4 x i32 addrspace(4)*>* %arg1
-  %res = call <4 x i32> @llvm.masked.gather.v4i32.v4p4i32(<4 x i32 addrspace(4)*> %0, i32 4, <4 x i1> <i1 true, i1 false, i1 true, i1 true>, <4 x i32> <i32 4, i32 0, i32 1, i32 0>)
-  call void @llvm.masked.scatter.v4i32.v4p4i32(<4 x i32> %res, <4 x i32 addrspace(4)*> %1, i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>)
+  %arg0 = alloca <4 x ptr addrspace(4)>
+  %arg1 = alloca <4 x ptr addrspace(4)>
+  %0 = load <4 x ptr addrspace(4)>, ptr %arg0
+  %1 = load <4 x ptr addrspace(4)>, ptr %arg1
+  %res = call <4 x i32> @llvm.masked.gather.v4i32.v4p4(<4 x ptr addrspace(4)> %0, i32 4, <4 x i1> <i1 true, i1 false, i1 true, i1 true>, <4 x i32> <i32 4, i32 0, i32 1, i32 0>)
+  call void @llvm.masked.scatter.v4i32.v4p4(<4 x i32> %res, <4 x ptr addrspace(4)> %1, i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>)
   ret void
 }
 
-declare <4 x i32> @llvm.masked.gather.v4i32.v4p4i32(<4 x i32 addrspace(4)*>, i32, <4 x i1>, <4 x i32>)
+declare <4 x i32> @llvm.masked.gather.v4i32.v4p4(<4 x ptr addrspace(4)>, i32, <4 x i1>, <4 x i32>)
 
-declare void @llvm.masked.scatter.v4i32.v4p4i32(<4 x i32>, <4 x i32 addrspace(4)*>, i32, <4 x i1>)
+declare void @llvm.masked.scatter.v4i32.v4p4(<4 x i32>, <4 x ptr addrspace(4)>, i32, <4 x i1>)
 
 !llvm.module.flags = !{!0}
 !opencl.spir.version = !{!1}
diff --git a/test/extensions/INTEL/SPV_INTEL_memory_access_aliasing/intel-alias-empty-md.ll b/test/extensions/INTEL/SPV_INTEL_memory_access_aliasing/intel-alias-empty-md.ll
index ac290dfcf1..19784ccff5 100644
--- a/test/extensions/INTEL/SPV_INTEL_memory_access_aliasing/intel-alias-empty-md.ll
+++ b/test/extensions/INTEL/SPV_INTEL_memory_access_aliasing/intel-alias-empty-md.ll
@@ -17,15 +17,15 @@ source_filename = "intel_restrict.cpp"
 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
 target triple = "spir64-unknown-unknown"
 
-define dso_local spir_kernel void @_ZTSZ4mainE15kernel_restrict(i32 addrspace(1)* noalias %_arg_, i32 addrspace(1)* noalias %_arg_1, i32 addrspace(1)* noalias %_arg_3) local_unnamed_addr {
+define dso_local spir_kernel void @_ZTSZ4mainE15kernel_restrict(ptr addrspace(1) noalias %_arg_, ptr addrspace(1) noalias %_arg_1, ptr addrspace(1) noalias %_arg_3) local_unnamed_addr {
 entry:
-  %0 = addrspacecast i32 addrspace(1)* %_arg_ to i32 addrspace(4)*
-  %1 = addrspacecast i32 addrspace(1)* %_arg_1 to i32 addrspace(4)*
-  %2 = addrspacecast i32 addrspace(1)* %_arg_3 to i32 addrspace(4)*
-  %3 = load i32, i32 addrspace(4)* %0, align 4, !alias.scope !4
-  %4 = load i32, i32 addrspace(4)* %1, align 4, !alias.scope !4
+  %0 = addrspacecast ptr addrspace(1) %_arg_ to ptr addrspace(4)
+  %1 = addrspacecast ptr addrspace(1) %_arg_1 to ptr addrspace(4)
+  %2 = addrspacecast ptr addrspace(1) %_arg_3 to ptr addrspace(4)
+  %3 = load i32, ptr addrspace(4) %0, align 4, !alias.scope !4
+  %4 = load i32, ptr addrspace(4) %1, align 4, !alias.scope !4
   %add.i = add nsw i32 %4, %3
-  store i32 %add.i, i32 addrspace(4)* %2, align 4, !noalias !4
+  store i32 %add.i, ptr addrspace(4) %2, align 4, !noalias !4
   ret void
 }
 
diff --git a/test/extensions/INTEL/SPV_INTEL_memory_access_aliasing/intel-alias-lifetime.ll b/test/extensions/INTEL/SPV_INTEL_memory_access_aliasing/intel-alias-lifetime.ll
index a7cf3d3f07..6d42f83d7f 100644
--- a/test/extensions/INTEL/SPV_INTEL_memory_access_aliasing/intel-alias-lifetime.ll
+++ b/test/extensions/INTEL/SPV_INTEL_memory_access_aliasing/intel-alias-lifetime.ll
@@ -15,13 +15,12 @@ target triple = "spir64-unknown-unknown"
 define spir_kernel void @lifetime_simple()
 {
   %1 = alloca i32
-  %2 = bitcast i32* %1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 -1, i8* %2), !noalias !1
+  call void @llvm.lifetime.start.p0(i64 -1, ptr %1), !noalias !1
   ret void
 }
 
 ; Function Attrs: nounwind
-declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #0
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #0
 
 attributes #0 = { nounwind }
 
diff --git a/test/extensions/INTEL/SPV_INTEL_memory_access_aliasing/intel-alias-load-store.ll b/test/extensions/INTEL/SPV_INTEL_memory_access_aliasing/intel-alias-load-store.ll
index 102ea976e1..4095da0436 100644
--- a/test/extensions/INTEL/SPV_INTEL_memory_access_aliasing/intel-alias-load-store.ll
+++ b/test/extensions/INTEL/SPV_INTEL_memory_access_aliasing/intel-alias-load-store.ll
@@ -71,35 +71,35 @@ target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:
 target triple = "spir64-unknown-unknown"
 
 ; Function Attrs: nofree norecurse nounwind willreturn mustprogress
-define dso_local spir_kernel void @_ZTSZ4mainE15kernel_restrict(i32 addrspace(1)* noalias %_arg_, i32 addrspace(1)* noalias %_arg_1, i32 addrspace(1)* noalias %_arg_3) local_unnamed_addr #0 !kernel_arg_buffer_location !4 {
+define dso_local spir_kernel void @_ZTSZ4mainE15kernel_restrict(ptr addrspace(1) noalias %_arg_, ptr addrspace(1) noalias %_arg_1, ptr addrspace(1) noalias %_arg_3) local_unnamed_addr #0 !kernel_arg_buffer_location !4 {
 entry:
-  %0 = addrspacecast i32 addrspace(1)* %_arg_ to i32 addrspace(4)*
-  %1 = addrspacecast i32 addrspace(1)* %_arg_1 to i32 addrspace(4)*
-  %2 = addrspacecast i32 addrspace(1)* %_arg_3 to i32 addrspace(4)*
+  %0 = addrspacecast ptr addrspace(1) %_arg_ to ptr addrspace(4)
+  %1 = addrspacecast ptr addrspace(1) %_arg_1 to ptr addrspace(4)
+  %2 = addrspacecast ptr addrspace(1) %_arg_3 to ptr addrspace(4)
 ; CHECK-LLVM: load i32, ptr addrspace(4) {{.*}} !alias.scope ![[LISTMD1:[0-9]+]]
 ; CHECK-LLVM: load i32, ptr addrspace(4) {{.*}} !alias.scope ![[LISTMD1]]{{.*}}!noalias ![[LISTMD2:[0-9]+]]
-  %3 = load i32, i32 addrspace(4)* %0, align 4, !tbaa !5, !alias.scope !9
-  %4 = load i32, i32 addrspace(4)* %1, align 4, !tbaa !5, !alias.scope !9, !noalias !16
+  %3 = load i32, ptr addrspace(4) %0, align 4, !tbaa !5, !alias.scope !9
+  %4 = load i32, ptr addrspace(4) %1, align 4, !tbaa !5, !alias.scope !9, !noalias !16
   %add.i = add nsw i32 %4, %3
 ; CHECK-LLVM: store i32 {{.*}} !noalias ![[LISTMD1]]
-  store i32 %add.i, i32 addrspace(4)* %2, align 4, !tbaa !5, !noalias !9
+  store i32 %add.i, ptr addrspace(4) %2, align 4, !tbaa !5, !noalias !9
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind willreturn mustprogress
-define dso_local spir_kernel void @_ZTSZ4mainE27kernel_restrict_other_types(i32 addrspace(1)* noalias %_arg_, i32 addrspace(1)* noalias %_arg_1, i32 addrspace(1)* noalias %_arg_3, i32 %_arg_5) local_unnamed_addr #0 !kernel_arg_buffer_location !12 {
+define dso_local spir_kernel void @_ZTSZ4mainE27kernel_restrict_other_types(ptr addrspace(1) noalias %_arg_, ptr addrspace(1) noalias %_arg_1, ptr addrspace(1) noalias %_arg_3, i32 %_arg_5) local_unnamed_addr #0 !kernel_arg_buffer_location !12 {
 entry:
-  %0 = addrspacecast i32 addrspace(1)* %_arg_ to i32 addrspace(4)*
-  %1 = addrspacecast i32 addrspace(1)* %_arg_1 to i32 addrspace(4)*
-  %2 = addrspacecast i32 addrspace(1)* %_arg_3 to i32 addrspace(4)*
+  %0 = addrspacecast ptr addrspace(1) %_arg_ to ptr addrspace(4)
+  %1 = addrspacecast ptr addrspace(1) %_arg_1 to ptr addrspace(4)
+  %2 = addrspacecast ptr addrspace(1) %_arg_3 to ptr addrspace(4)
 ; CHECK-LLVM: load i32, ptr addrspace(4) {{.*}} !alias.scope ![[LISTMD3:[0-9]+]]
 ; CHECK-LLVM: load i32, ptr addrspace(4) {{.*}} !alias.scope ![[LISTMD3]]
-  %3 = load i32, i32 addrspace(4)* %0, align 4, !tbaa !5, !alias.scope !13
-  %4 = load i32, i32 addrspace(4)* %1, align 4, !tbaa !5, !alias.scope !13
+  %3 = load i32, ptr addrspace(4) %0, align 4, !tbaa !5, !alias.scope !13
+  %4 = load i32, ptr addrspace(4) %1, align 4, !tbaa !5, !alias.scope !13
   %add.i = add i32 %3, %_arg_5
   %add3.i = add i32 %add.i, %4
 ; CHECK-LLVM: store i32 {{.*}} !noalias ![[LISTMD3]]
-  store i32 %add3.i, i32 addrspace(4)* %2, align 4, !tbaa !5, !noalias !13
+  store i32 %add3.i, ptr addrspace(4) %2, align 4, !tbaa !5, !noalias !13
   ret void
 }
 
diff --git a/test/extensions/INTEL/SPV_INTEL_memory_access_aliasing/intel-alias-masked-load-store.ll b/test/extensions/INTEL/SPV_INTEL_memory_access_aliasing/intel-alias-masked-load-store.ll
index 40df52c2d3..fe21351be3 100644
--- a/test/extensions/INTEL/SPV_INTEL_memory_access_aliasing/intel-alias-masked-load-store.ll
+++ b/test/extensions/INTEL/SPV_INTEL_memory_access_aliasing/intel-alias-masked-load-store.ll
@@ -75,49 +75,49 @@ target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:
 target triple = "spir64-unknown-unknown"
 
 ; Function Attrs: nofree norecurse nounwind willreturn mustprogress
-define dso_local spir_kernel void @_ZTSZ4mainE15kernel_restrict(i32 addrspace(1)* noalias %_arg_, i32 addrspace(1)* noalias %_arg_1, i32 addrspace(1)* noalias %_arg_3) local_unnamed_addr #0 !kernel_arg_buffer_location !4 {
+define dso_local spir_kernel void @_ZTSZ4mainE15kernel_restrict(ptr addrspace(1) noalias %_arg_, ptr addrspace(1) noalias %_arg_1, ptr addrspace(1) noalias %_arg_3) local_unnamed_addr #0 !kernel_arg_buffer_location !4 {
 entry:
-  %0 = addrspacecast i32 addrspace(1)* %_arg_ to i32 addrspace(4)*
-  %1 = addrspacecast i32 addrspace(1)* %_arg_1 to i32 addrspace(4)*
-  %2 = addrspacecast i32 addrspace(1)* %_arg_3 to i32 addrspace(4)*
+  %0 = addrspacecast ptr addrspace(1) %_arg_ to ptr addrspace(4)
+  %1 = addrspacecast ptr addrspace(1) %_arg_1 to ptr addrspace(4)
+  %2 = addrspacecast ptr addrspace(1) %_arg_3 to ptr addrspace(4)
 ; CHECK-LLVM: call spir_func i32 @wrappedload{{.*}} !alias.scope ![[LISTMD1:[0-9]+]]
 ; CHECK-LLVM: call spir_func i32 @wrappedload{{.*}} !alias.scope ![[LISTMD1]]{{.*}} ![[LISTMD2:[0-9]+]]
-  %3 = call i32 @wrappedload(i32 addrspace(4)* %0), !tbaa !5, !alias.scope !9
-  %4 = call i32 @wrappedload(i32 addrspace(4)* %1), !tbaa !5, !alias.scope !9, !noalias !16
+  %3 = call i32 @wrappedload(ptr addrspace(4) %0), !tbaa !5, !alias.scope !9
+  %4 = call i32 @wrappedload(ptr addrspace(4) %1), !tbaa !5, !alias.scope !9, !noalias !16
   %add.i = add nsw i32 %4, %3
 ; CHECK-LLVM: call spir_func void @wrappedstore{{.*}} !noalias ![[LISTMD1]]
-  call void @wrappedstore(i32 %add.i, i32 addrspace(4)* %2),!tbaa !5, !noalias !9
+  call void @wrappedstore(i32 %add.i, ptr addrspace(4) %2),!tbaa !5, !noalias !9
   ret void
 }
 
 ; Function Attrs: nofree norecurse nounwind willreturn mustprogress
-define dso_local spir_kernel void @_ZTSZ4mainE27kernel_restrict_other_types(i32 addrspace(1)* noalias %_arg_, i32 addrspace(1)* noalias %_arg_1, i32 addrspace(1)* noalias %_arg_3, i32 %_arg_5) local_unnamed_addr #0 !kernel_arg_buffer_location !12 {
+define dso_local spir_kernel void @_ZTSZ4mainE27kernel_restrict_other_types(ptr addrspace(1) noalias %_arg_, ptr addrspace(1) noalias %_arg_1, ptr addrspace(1) noalias %_arg_3, i32 %_arg_5) local_unnamed_addr #0 !kernel_arg_buffer_location !12 {
 entry:
-  %0 = addrspacecast i32 addrspace(1)* %_arg_ to i32 addrspace(4)*
-  %1 = addrspacecast i32 addrspace(1)* %_arg_1 to i32 addrspace(4)*
-  %2 = addrspacecast i32 addrspace(1)* %_arg_3 to i32 addrspace(4)*
+  %0 = addrspacecast ptr addrspace(1) %_arg_ to ptr addrspace(4)
+  %1 = addrspacecast ptr addrspace(1) %_arg_1 to ptr addrspace(4)
+  %2 = addrspacecast ptr addrspace(1) %_arg_3 to ptr addrspace(4)
 ; CHECK-LLVM: call spir_func i32 @wrappedload{{.*}} !alias.scope ![[LISTMD3:[0-9]+]]
 ; CHECK-LLVM: call spir_func i32 @wrappedload{{.*}} !alias.scope ![[LISTMD3]]
-  %3 = call i32 @wrappedload(i32 addrspace(4)* %0), !tbaa !5, !alias.scope !13
-  %4 = call i32 @wrappedload(i32 addrspace(4)* %1), !tbaa !5, !alias.scope !13
+  %3 = call i32 @wrappedload(ptr addrspace(4) %0), !tbaa !5, !alias.scope !13
+  %4 = call i32 @wrappedload(ptr addrspace(4) %1), !tbaa !5, !alias.scope !13
   %add.i = add i32 %3, %_arg_5
   %add3.i = add i32 %add.i, %4
 ; CHECK-LLVM: call spir_func void @wrappedstore{{.*}} !noalias ![[LISTMD3]]
-  call void @wrappedstore(i32 %add3.i, i32 addrspace(4)* %2),!tbaa !5, !noalias !13
+  call void @wrappedstore(i32 %add3.i, ptr addrspace(4) %2),!tbaa !5, !noalias !13
   ret void
 }
 
 ; Function Attrs: norecurse nounwind readnone
-define dso_local spir_func i32 @wrappedload(i32 addrspace(4)* %0) local_unnamed_addr #2 {
+define dso_local spir_func i32 @wrappedload(ptr addrspace(4) %0) local_unnamed_addr #2 {
 entry:
-  %1 = load i32, i32 addrspace(4)* %0, align 4
+  %1 = load i32, ptr addrspace(4) %0, align 4
   ret i32 %1
 }
 
 ; Function Attrs: norecurse nounwind readnone
-define dso_local spir_func void @wrappedstore(i32 %0, i32 addrspace(4)* %1) local_unnamed_addr #2 {
+define dso_local spir_func void @wrappedstore(i32 %0, ptr addrspace(4) %1) local_unnamed_addr #2 {
 entry:
-  store i32 %0, i32 addrspace(4)* %1, align 4
+  store i32 %0, ptr addrspace(4) %1, align 4
   ret void
 }
 
diff --git a/test/extensions/INTEL/SPV_INTEL_runtime_aligned/RuntimeAligned.ll b/test/extensions/INTEL/SPV_INTEL_runtime_aligned/RuntimeAligned.ll
index a5e2e09bb9..2cd16d49ed 100644
--- a/test/extensions/INTEL/SPV_INTEL_runtime_aligned/RuntimeAligned.ll
+++ b/test/extensions/INTEL/SPV_INTEL_runtime_aligned/RuntimeAligned.ll
@@ -37,7 +37,7 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
 target triple = "spir64-unknown-unknown"
 
 ; Function Attrs: nounwind
-define spir_kernel void @test(i32 addrspace(1)* %a, float addrspace(1)* %b, i32 addrspace(1)* %c, i32 %d, i32 %e) #0 !kernel_arg_addr_space !5 !kernel_arg_access_qual !6 !kernel_arg_type !7 !kernel_arg_type_qual !8 !kernel_arg_base_type !9 !kernel_arg_runtime_aligned !10 {
+define spir_kernel void @test(ptr addrspace(1) %a, ptr addrspace(1) %b, ptr addrspace(1) %c, i32 %d, i32 %e) #0 !kernel_arg_addr_space !5 !kernel_arg_access_qual !6 !kernel_arg_type !7 !kernel_arg_type_qual !8 !kernel_arg_base_type !9 !kernel_arg_runtime_aligned !10 {
 entry:
   ret void
 }
@@ -60,7 +60,7 @@ attributes #0 = { nounwind }
 !4 = !{i16 6, i16 14}
 !5 = !{i32 1, i32 1, i32 1, i32 0, i32 0}
 !6 = !{!"none", !"none", !"none", !"none", !"none"}
-!7 = !{!"int*", !"float*", !"int*"}
+!7 = !{!"int*", !"ptr", !"int*"}
 !8 = !{!"", !"", !"", !"", !""}
-!9 = !{!"int*", !"float*", !"int*", !"int", !"int"}
+!9 = !{!"int*", !"ptr", !"int*", !"int", !"int"}
 !10 = !{i1 true, i1 false, i1 true, i1 false, i1 false}
diff --git a/test/extensions/INTEL/SPV_INTEL_split_barrier/split_work_group_barrier_12.ll b/test/extensions/INTEL/SPV_INTEL_split_barrier/split_work_group_barrier_12.ll
index 8ab1e85ca3..dcb61da3d4 100644
--- a/test/extensions/INTEL/SPV_INTEL_split_barrier/split_work_group_barrier_12.ll
+++ b/test/extensions/INTEL/SPV_INTEL_split_barrier/split_work_group_barrier_12.ll
@@ -58,7 +58,7 @@ target triple = "spir64"
 
 ; CHECK-LLVM-LABEL: define spir_kernel void @test
 ; Function Attrs: convergent norecurse nounwind
-define dso_local spir_kernel void @test(i32 addrspace(1)* nocapture noundef readnone align 4 %0) local_unnamed_addr #0 !kernel_arg_addr_space !4 !kernel_arg_access_qual !5 !kernel_arg_type !6 !kernel_arg_base_type !6 !kernel_arg_type_qual !7 {
+define dso_local spir_kernel void @test(ptr addrspace(1) nocapture noundef readnone align 4 %0) local_unnamed_addr #0 !kernel_arg_addr_space !4 !kernel_arg_access_qual !5 !kernel_arg_type !6 !kernel_arg_base_type !6 !kernel_arg_type_qual !7 {
   tail call spir_func void @_Z31intel_work_group_barrier_arrivej(i32 noundef 1) #2
     ; CHECK-LLVM: call spir_func void @_Z31intel_work_group_barrier_arrivej(i32 1)
   tail call spir_func void @_Z29intel_work_group_barrier_waitj(i32 noundef 1) #2
diff --git a/test/extensions/INTEL/SPV_INTEL_split_barrier/split_work_group_barrier_20.ll b/test/extensions/INTEL/SPV_INTEL_split_barrier/split_work_group_barrier_20.ll
index 4cdbcf232f..36a196ecfc 100644
--- a/test/extensions/INTEL/SPV_INTEL_split_barrier/split_work_group_barrier_20.ll
+++ b/test/extensions/INTEL/SPV_INTEL_split_barrier/split_work_group_barrier_20.ll
@@ -100,7 +100,7 @@ target triple = "spir64"
 
 ; CHECK-LLVM-LABEL: define spir_kernel void @test
 ; Function Attrs: convergent norecurse nounwind
-define dso_local spir_kernel void @test(i32 addrspace(1)* nocapture noundef readnone align 4 %0) local_unnamed_addr #0 !kernel_arg_addr_space !4 !kernel_arg_access_qual !5 !kernel_arg_type !6 !kernel_arg_base_type !6 !kernel_arg_type_qual !7 {
+define dso_local spir_kernel void @test(ptr addrspace(1) nocapture noundef readnone align 4 %0) local_unnamed_addr #0 !kernel_arg_addr_space !4 !kernel_arg_access_qual !5 !kernel_arg_type !6 !kernel_arg_base_type !6 !kernel_arg_type_qual !7 {
   tail call spir_func void @_Z31intel_work_group_barrier_arrivej(i32 noundef 1) #2
     ; CHECK-LLVM: call spir_func void @_Z31intel_work_group_barrier_arrivej12memory_scope(i32 1, i32 1)
   tail call spir_func void @_Z29intel_work_group_barrier_waitj(i32 noundef 1) #2
diff --git a/test/extensions/INTEL/SPV_INTEL_split_barrier/split_work_group_barrier_spirv.ll b/test/extensions/INTEL/SPV_INTEL_split_barrier/split_work_group_barrier_spirv.ll
index ae5b57f155..0d0fa1835c 100644
--- a/test/extensions/INTEL/SPV_INTEL_split_barrier/split_work_group_barrier_spirv.ll
+++ b/test/extensions/INTEL/SPV_INTEL_split_barrier/split_work_group_barrier_spirv.ll
@@ -101,7 +101,7 @@ target triple = "spir64"
 
 ; CHECK-LLVM-LABEL: define spir_kernel void @test
 ; Function Attrs: convergent norecurse nounwind
-define dso_local spir_kernel void @test(i32 addrspace(1)* nocapture noundef readnone align 4 %0) local_unnamed_addr #0 !kernel_arg_addr_space !4 !kernel_arg_access_qual !5 !kernel_arg_type !6 !kernel_arg_base_type !6 !kernel_arg_type_qual !7 {
+define dso_local spir_kernel void @test(ptr addrspace(1) nocapture noundef readnone align 4 %0) local_unnamed_addr #0 !kernel_arg_addr_space !4 !kernel_arg_access_qual !5 !kernel_arg_type !6 !kernel_arg_base_type !6 !kernel_arg_type_qual !7 {
   tail call spir_func void @_Z33__spirv_ControlBarrierArriveINTELiii(i32 noundef 2, i32 noundef 2, i32 noundef 260) #2
     ; CHECK-LLVM: call spir_func void @_Z33__spirv_ControlBarrierArriveINTELiii(i32 2, i32 2, i32 260) #1
   tail call spir_func void @_Z31__spirv_ControlBarrierWaitINTELiii(i32 noundef 2, i32 noundef 2, i32 noundef 258) #2
diff --git a/test/extensions/INTEL/SPV_INTEL_subgroups/cl_intel_sub_groups.ll b/test/extensions/INTEL/SPV_INTEL_subgroups/cl_intel_sub_groups.ll
index a76d09bdc7..13b5c1e5ab 100644
--- a/test/extensions/INTEL/SPV_INTEL_subgroups/cl_intel_sub_groups.ll
+++ b/test/extensions/INTEL/SPV_INTEL_subgroups/cl_intel_sub_groups.ll
@@ -85,7 +85,7 @@ target triple = "spir64"
 
 ; LLVM checks were generated by update_test_checks.py using opt without any passes.
 ; Function Attrs: convergent nounwind
-define spir_kernel void @test(<2 x float> %x, i32 %c, %opencl.image2d_ro_t addrspace(1)* %image_in, %opencl.image2d_wo_t addrspace(1)* %image_out, <2 x i32> %coord, i32 addrspace(1)* %p, i16 addrspace(1)* %sp, i8 addrspace(1)* %cp, i64 addrspace(1)* %lp) local_unnamed_addr #0 !kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !3 !kernel_arg_base_type !4 !kernel_arg_type_qual !5 !kernel_arg_name !6 {
+define spir_kernel void @test(<2 x float> %x, i32 %c, ptr addrspace(1) %image_in, ptr addrspace(1) %image_out, <2 x i32> %coord, ptr addrspace(1) %p, ptr addrspace(1) %sp, ptr addrspace(1) %cp, ptr addrspace(1) %lp) local_unnamed_addr #0 !kernel_arg_addr_space !1 !kernel_arg_access_qual !2 !kernel_arg_type !3 !kernel_arg_base_type !4 !kernel_arg_type_qual !5 !kernel_arg_name !6 {
 ; CHECK-LLVM-LABEL: @test(
 ; CHECK-LLVM-NEXT:  entry:
 ; CHECK-LLVM-NEXT:    [[CALL:%.*]] = call spir_func <2 x float> @_Z23intel_sub_group_shuffleDv2_fj(<2 x float> [[X:%.*]], i32 [[C:%.*]])
@@ -137,25 +137,25 @@ entry:
   %call2 = tail call spir_func <2 x float> @_Z26intel_sub_group_shuffle_upDv2_fS_j(<2 x float> %x, <2 x float> %x, i32 %c) #2
   %call3 = tail call spir_func <2 x float> @_Z27intel_sub_group_shuffle_xorDv2_fj(<2 x float> %x, i32 %c) #2
 
-  %call4 = tail call spir_func <2 x i32> @_Z27intel_sub_group_block_read214ocl_image2d_roDv2_i(%opencl.image2d_ro_t addrspace(1)* %image_in, <2 x i32> %coord) #2
-  tail call spir_func void @_Z28intel_sub_group_block_write214ocl_image2d_woDv2_iDv2_j(%opencl.image2d_wo_t addrspace(1)* %image_out, <2 x i32> %coord, <2 x i32> %call4) #2
-  %call5 = tail call spir_func <2 x i32> @_Z27intel_sub_group_block_read2PU3AS1Kj(i32 addrspace(1)* %p) #2
-  tail call spir_func void @_Z28intel_sub_group_block_write2PU3AS1jDv2_j(i32 addrspace(1)* %p, <2 x i32> %call5) #2
+  %call4 = tail call spir_func <2 x i32> @_Z27intel_sub_group_block_read214ocl_image2d_roDv2_i(ptr addrspace(1) %image_in, <2 x i32> %coord) #2
+  tail call spir_func void @_Z28intel_sub_group_block_write214ocl_image2d_woDv2_iDv2_j(ptr addrspace(1) %image_out, <2 x i32> %coord, <2 x i32> %call4) #2
+  %call5 = tail call spir_func <2 x i32> @_Z27intel_sub_group_block_read2PU3AS1Kj(ptr addrspace(1) %p) #2
+  tail call spir_func void @_Z28intel_sub_group_block_write2PU3AS1jDv2_j(ptr addrspace(1) %p, <2 x i32> %call5) #2
 
-  %call6 = tail call spir_func <2 x i16> @_Z30intel_sub_group_block_read_us214ocl_image2d_roDv2_i(%opencl.image2d_ro_t addrspace(1)* %image_in, <2 x i32> %coord) #2
-  tail call spir_func void @_Z31intel_sub_group_block_write_us214ocl_image2d_woDv2_iDv2_t(%opencl.image2d_wo_t addrspace(1)* %image_out, <2 x i32> %coord, <2 x i16> %call6) #2
-  %call7 = tail call spir_func <2 x i16> @_Z30intel_sub_group_block_read_us2PU3AS1Kt(i16 addrspace(1)* %sp) #2
-  tail call spir_func void @_Z31intel_sub_group_block_write_us2PU3AS1tDv2_t(i16 addrspace(1)* %sp, <2 x i16> %call7) #2
+  %call6 = tail call spir_func <2 x i16> @_Z30intel_sub_group_block_read_us214ocl_image2d_roDv2_i(ptr addrspace(1) %image_in, <2 x i32> %coord) #2
+  tail call spir_func void @_Z31intel_sub_group_block_write_us214ocl_image2d_woDv2_iDv2_t(ptr addrspace(1) %image_out, <2 x i32> %coord, <2 x i16> %call6) #2
+  %call7 = tail call spir_func <2 x i16> @_Z30intel_sub_group_block_read_us2PU3AS1Kt(ptr addrspace(1) %sp) #2
+  tail call spir_func void @_Z31intel_sub_group_block_write_us2PU3AS1tDv2_t(ptr addrspace(1) %sp, <2 x i16> %call7) #2
 
-  %call8 = tail call spir_func <2 x i8> @_Z30intel_sub_group_block_read_uc214ocl_image2d_roDv2_i(%opencl.image2d_ro_t addrspace(1)* %image_in, <2 x i32> %coord) #2
-  tail call spir_func void @_Z31intel_sub_group_block_write_uc214ocl_image2d_woDv2_iDv2_h(%opencl.image2d_wo_t addrspace(1)* %image_out, <2 x i32> %coord, <2 x i8> %call8) #2
-  %call9 = tail call spir_func <2 x i8> @_Z30intel_sub_group_block_read_uc2PU3AS1Kh(i8 addrspace(1)* %cp) #2
-  tail call spir_func void @_Z31intel_sub_group_block_write_uc2PU3AS1hDv2_h(i8 addrspace(1)* %cp, <2 x i8> %call9) #2
+  %call8 = tail call spir_func <2 x i8> @_Z30intel_sub_group_block_read_uc214ocl_image2d_roDv2_i(ptr addrspace(1) %image_in, <2 x i32> %coord) #2
+  tail call spir_func void @_Z31intel_sub_group_block_write_uc214ocl_image2d_woDv2_iDv2_h(ptr addrspace(1) %image_out, <2 x i32> %coord, <2 x i8> %call8) #2
+  %call9 = tail call spir_func <2 x i8> @_Z30intel_sub_group_block_read_uc2PU3AS1Kh(ptr addrspace(1) %cp) #2
+  tail call spir_func void @_Z31intel_sub_group_block_write_uc2PU3AS1hDv2_h(ptr addrspace(1) %cp, <2 x i8> %call9) #2
 
-  %call10 = tail call spir_func <2 x i64> @_Z30intel_sub_group_block_read_ul214ocl_image2d_roDv2_i(%opencl.image2d_ro_t addrspace(1)* %image_in, <2 x i32> %coord) #2
-  tail call spir_func void @_Z31intel_sub_group_block_write_ul214ocl_image2d_woDv2_iDv2_m(%opencl.image2d_wo_t addrspace(1)* %image_out, <2 x i32> %coord, <2 x i64> %call10) #2
-  %call11 = tail call spir_func <2 x i64> @_Z30intel_sub_group_block_read_ul2PU3AS1Km(i64 addrspace(1)* %lp) #2
-  tail call spir_func void @_Z31intel_sub_group_block_write_ul2PU3AS1mDv2_m(i64 addrspace(1)* %lp, <2 x i64> %call11) #2
+  %call10 = tail call spir_func <2 x i64> @_Z30intel_sub_group_block_read_ul214ocl_image2d_roDv2_i(ptr addrspace(1) %image_in, <2 x i32> %coord) #2
+  tail call spir_func void @_Z31intel_sub_group_block_write_ul214ocl_image2d_woDv2_iDv2_m(ptr addrspace(1) %image_out, <2 x i32> %coord, <2 x i64> %call10) #2
+  %call11 = tail call spir_func <2 x i64> @_Z30intel_sub_group_block_read_ul2PU3AS1Km(ptr addrspace(1) %lp) #2
+  tail call spir_func void @_Z31intel_sub_group_block_write_ul2PU3AS1mDv2_m(ptr addrspace(1) %lp, <2 x i64> %call11) #2
 
   ret void
 }
@@ -173,52 +173,52 @@ declare spir_func <2 x float> @_Z26intel_sub_group_shuffle_upDv2_fS_j(<2 x float
 declare spir_func <2 x float> @_Z27intel_sub_group_shuffle_xorDv2_fj(<2 x float>, i32) local_unnamed_addr #1
 
 ; Function Attrs: convergent
-declare spir_func <2 x i32> @_Z27intel_sub_group_block_read214ocl_image2d_roDv2_i(%opencl.image2d_ro_t addrspace(1)*, <2 x i32>) local_unnamed_addr #1
+declare spir_func <2 x i32> @_Z27intel_sub_group_block_read214ocl_image2d_roDv2_i(ptr addrspace(1), <2 x i32>) local_unnamed_addr #1
 
 ; Function Attrs: convergent
-declare spir_func void @_Z28intel_sub_group_block_write214ocl_image2d_woDv2_iDv2_j(%opencl.image2d_wo_t addrspace(1)*, <2 x i32>, <2 x i32>) local_unnamed_addr #1
+declare spir_func void @_Z28intel_sub_group_block_write214ocl_image2d_woDv2_iDv2_j(ptr addrspace(1), <2 x i32>, <2 x i32>) local_unnamed_addr #1
 
 ; Function Attrs: convergent
-declare spir_func <2 x i32> @_Z27intel_sub_group_block_read2PU3AS1Kj(i32 addrspace(1)*) local_unnamed_addr #1
+declare spir_func <2 x i32> @_Z27intel_sub_group_block_read2PU3AS1Kj(ptr addrspace(1)) local_unnamed_addr #1
 
 ; Function Attrs: convergent
-declare spir_func void @_Z28intel_sub_group_block_write2PU3AS1jDv2_j(i32 addrspace(1)*, <2 x i32>) local_unnamed_addr #1
+declare spir_func void @_Z28intel_sub_group_block_write2PU3AS1jDv2_j(ptr addrspace(1), <2 x i32>) local_unnamed_addr #1
 
 ; Function Attrs: convergent
-declare spir_func <2 x i16> @_Z30intel_sub_group_block_read_us214ocl_image2d_roDv2_i(%opencl.image2d_ro_t addrspace(1)*, <2 x i32>) local_unnamed_addr #1
+declare spir_func <2 x i16> @_Z30intel_sub_group_block_read_us214ocl_image2d_roDv2_i(ptr addrspace(1), <2 x i32>) local_unnamed_addr #1
 
 ; Function Attrs: convergent
-declare spir_func void @_Z31intel_sub_group_block_write_us214ocl_image2d_woDv2_iDv2_t(%opencl.image2d_wo_t addrspace(1)*, <2 x i32>, <2 x i16>) local_unnamed_addr #1
+declare spir_func void @_Z31intel_sub_group_block_write_us214ocl_image2d_woDv2_iDv2_t(ptr addrspace(1), <2 x i32>, <2 x i16>) local_unnamed_addr #1
 
 ; Function Attrs: convergent
-declare spir_func <2 x i16> @_Z30intel_sub_group_block_read_us2PU3AS1Kt(i16 addrspace(1)*) local_unnamed_addr #1
+declare spir_func <2 x i16> @_Z30intel_sub_group_block_read_us2PU3AS1Kt(ptr addrspace(1)) local_unnamed_addr #1
 
 ; Function Attrs: convergent
-declare spir_func void @_Z31intel_sub_group_block_write_us2PU3AS1tDv2_t(i16 addrspace(1)*, <2 x i16>) local_unnamed_addr #1
+declare spir_func void @_Z31intel_sub_group_block_write_us2PU3AS1tDv2_t(ptr addrspace(1), <2 x i16>) local_unnamed_addr #1
 
 ; Function Attrs: convergent
-declare spir_func <2 x i8> @_Z30intel_sub_group_block_read_uc214ocl_image2d_roDv2_i(%opencl.image2d_ro_t addrspace(1)*, <2 x i32>) local_unnamed_addr #1
+declare spir_func <2 x i8> @_Z30intel_sub_group_block_read_uc214ocl_image2d_roDv2_i(ptr addrspace(1), <2 x i32>) local_unnamed_addr #1
 
 ; Function Attrs: convergent
-declare spir_func void @_Z31intel_sub_group_block_write_uc214ocl_image2d_woDv2_iDv2_h(%opencl.image2d_wo_t addrspace(1)*, <2 x i32>, <2 x i8>) local_unnamed_addr #1
+declare spir_func void @_Z31intel_sub_group_block_write_uc214ocl_image2d_woDv2_iDv2_h(ptr addrspace(1), <2 x i32>, <2 x i8>) local_unnamed_addr #1
 
 ; Function Attrs: convergent
-declare spir_func <2 x i8> @_Z30intel_sub_group_block_read_uc2PU3AS1Kh(i8 addrspace(1)*) local_unnamed_addr #1
+declare spir_func <2 x i8> @_Z30intel_sub_group_block_read_uc2PU3AS1Kh(ptr addrspace(1)) local_unnamed_addr #1
 
 ; Function Attrs: convergent
-declare spir_func void @_Z31intel_sub_group_block_write_uc2PU3AS1hDv2_h(i8 addrspace(1)*, <2 x i8>) local_unnamed_addr #1
+declare spir_func void @_Z31intel_sub_group_block_write_uc2PU3AS1hDv2_h(ptr addrspace(1), <2 x i8>) local_unnamed_addr #1
 
 ; Function Attrs: convergent
-declare spir_func <2 x i64> @_Z30intel_sub_group_block_read_ul214ocl_image2d_roDv2_i(%opencl.image2d_ro_t addrspace(1)*, <2 x i32>) local_unnamed_addr #1
+declare spir_func <2 x i64> @_Z30intel_sub_group_block_read_ul214ocl_image2d_roDv2_i(ptr addrspace(1), <2 x i32>) local_unnamed_addr #1
 
 ; Function Attrs: convergent
-declare spir_func void @_Z31intel_sub_group_block_write_ul214ocl_image2d_woDv2_iDv2_m(%opencl.image2d_wo_t addrspace(1)*, <2 x i32>, <2 x i64>) local_unnamed_addr #1
+declare spir_func void @_Z31intel_sub_group_block_write_ul214ocl_image2d_woDv2_iDv2_m(ptr addrspace(1), <2 x i32>, <2 x i64>) local_unnamed_addr #1
 
 ; Function Attrs: convergent
-declare spir_func <2 x i64> @_Z30intel_sub_group_block_read_ul2PU3AS1Km(i64 addrspace(1)*) local_unnamed_addr #1
+declare spir_func <2 x i64> @_Z30intel_sub_group_block_read_ul2PU3AS1Km(ptr addrspace(1)) local_unnamed_addr #1
 
 ; Function Attrs: convergent
-declare spir_func void @_Z31intel_sub_group_block_write_ul2PU3AS1mDv2_m(i64 addrspace(1)*, <2 x i64>) local_unnamed_addr #1
+declare spir_func void @_Z31intel_sub_group_block_write_ul2PU3AS1mDv2_m(ptr addrspace(1), <2 x i64>) local_unnamed_addr #1
 
 attributes #0 = { convergent nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "denorms-are-zero"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="128" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "uniform-work-group-size"="true" "unsafe-fp-math"="false" "use-soft-float"="false" }
 attributes #1 = { convergent "correctly-rounded-divide-sqrt-fp-math"="false" "denorms-are-zero"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
diff --git a/test/extensions/INTEL/SPV_INTEL_unstructured_loop_controls/InfiniteLoopMetadataPlacement.ll b/test/extensions/INTEL/SPV_INTEL_unstructured_loop_controls/InfiniteLoopMetadataPlacement.ll
index ba4d9e4e21..d3ba17e04b 100644
--- a/test/extensions/INTEL/SPV_INTEL_unstructured_loop_controls/InfiniteLoopMetadataPlacement.ll
+++ b/test/extensions/INTEL/SPV_INTEL_unstructured_loop_controls/InfiniteLoopMetadataPlacement.ll
@@ -19,12 +19,10 @@ define weak_odr dso_local spir_kernel void @_ZTS12WhileOneTest() #0 comdat !kern
 entry:
   %i = alloca i32, align 4
   %s = alloca i32, align 4
-  %0 = bitcast i32* %i to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #2
-  store i32 0, i32* %i, align 4, !tbaa !7
-  %1 = bitcast i32* %s to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %1) #2
-  store i32 0, i32* %s, align 4, !tbaa !7
+  call void @llvm.lifetime.start.p0(i64 4, ptr %i) #2
+  store i32 0, ptr %i, align 4, !tbaa !7
+  call void @llvm.lifetime.start.p0(i64 4, ptr %s) #2
+  store i32 0, ptr %s, align 4, !tbaa !7
   br label %while.cond
 
 ; CHECK-SPV-NOT: {{[0-9]+}} LoopControlINTEL
@@ -40,8 +38,8 @@ while.cond:                                       ; preds = %if.end, %entry
 ; CHECK-SPV-NOT: {{[0-9]+}} LoopMerge
 
 while.body:                                       ; preds = %while.cond
-  %2 = load i32, i32* %i, align 4, !tbaa !7
-  %cmp = icmp sge i32 %2, 16
+  %0 = load i32, ptr %i, align 4, !tbaa !7
+  %cmp = icmp sge i32 %0, 16
   br i1 %cmp, label %if.then, label %if.else
 
 if.then:                                          ; preds = %while.body
@@ -49,29 +47,27 @@ if.then:                                          ; preds = %while.body
   br label %while.end
 
 if.else:                                          ; preds = %while.body
-  %3 = load i32, i32* %i, align 4, !tbaa !7
-  %4 = load i32, i32* %s, align 4, !tbaa !7
-  %add = add nsw i32 %4, %3
-  store i32 %add, i32* %s, align 4, !tbaa !7
+  %1 = load i32, ptr %i, align 4, !tbaa !7
+  %2 = load i32, ptr %s, align 4, !tbaa !7
+  %add = add nsw i32 %2, %1
+  store i32 %add, ptr %s, align 4, !tbaa !7
   br label %if.end
 
 ; CHECK-REV-LLVM-NOT: br {{.*}}, !llvm.loop
 
 if.end:                                           ; preds = %if.else
 ; CHECK-REV-LLVM: if.end:
-  %5 = load i32, i32* %i, align 4, !tbaa !7
-  %inc = add nsw i32 %5, 1
-  store i32 %inc, i32* %i, align 4, !tbaa !7
+  %3 = load i32, ptr %i, align 4, !tbaa !7
+  %inc = add nsw i32 %3, 1
+  store i32 %inc, ptr %i, align 4, !tbaa !7
   br label %while.cond, !llvm.loop !9
 ; CHECK-REV-LLVM: br label %while.cond, !llvm.loop ![[MD_UNROLL:[0-9]+]]
 
 ; CHECK-REV-LLVM-NOT: br {{.*}}, !llvm.loop
 
 while.end:                                        ; preds = %if.then
-  %6 = bitcast i32* %s to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %6) #2
-  %7 = bitcast i32* %i to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %7) #2
+  call void @llvm.lifetime.end.p0(i64 4, ptr %s) #2
+  call void @llvm.lifetime.end.p0(i64 4, ptr %i) #2
   ret void
 }
 
@@ -82,10 +78,10 @@ entry:
 }
 
 ; Function Attrs: argmemonly nounwind
-declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #1
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
 
 ; Function Attrs: argmemonly nounwind
-declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #1
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
 
 attributes #0 = { "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "uniform-work-group-size"="true" "unsafe-fp-math"="false" "use-soft-float"="false" }
 attributes #1 = { argmemonly nounwind }
diff --git a/test/extensions/INTEL/SPV_INTEL_usm_storage_classes/intel_usm_addrspaces.ll b/test/extensions/INTEL/SPV_INTEL_usm_storage_classes/intel_usm_addrspaces.ll
index 07b9af3a3e..8043f4a7ad 100644
--- a/test/extensions/INTEL/SPV_INTEL_usm_storage_classes/intel_usm_addrspaces.ll
+++ b/test/extensions/INTEL/SPV_INTEL_usm_storage_classes/intel_usm_addrspaces.ll
@@ -40,87 +40,81 @@ target triple = "spir64-unknown-unknown"
 define spir_kernel void @_ZTSZ4mainE11fake_kernel() #0 !kernel_arg_addr_space !4 !kernel_arg_access_qual !4 !kernel_arg_type !4 !kernel_arg_base_type !4 !kernel_arg_type_qual !4 {
 entry:
   %0 = alloca %"class._ZTSZ4mainE3$_0.anon", align 1
-  %1 = bitcast %"class._ZTSZ4mainE3$_0.anon"* %0 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %1) #4
-  %2 = addrspacecast %"class._ZTSZ4mainE3$_0.anon"* %0 to %"class._ZTSZ4mainE3$_0.anon" addrspace(4)*
-  call spir_func void @"_ZZ4mainENK3$_0clEv"(%"class._ZTSZ4mainE3$_0.anon" addrspace(4)* %2)
-  %3 = bitcast %"class._ZTSZ4mainE3$_0.anon"* %0 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %3) #4
+  call void @llvm.lifetime.start.p0(i64 1, ptr %0) #4
+  %1 = addrspacecast ptr %0 to ptr addrspace(4)
+  call spir_func void @"_ZZ4mainENK3$_0clEv"(ptr addrspace(4) %1)
+  call void @llvm.lifetime.end.p0(i64 1, ptr %0) #4
   ret void
 }
 
 ; Function Attrs: argmemonly nounwind willreturn
-declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #1
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
 
 ; Function Attrs: inlinehint norecurse nounwind
-define internal spir_func void @"_ZZ4mainENK3$_0clEv"(%"class._ZTSZ4mainE3$_0.anon" addrspace(4)* %this) #2 align 2 {
+define internal spir_func void @"_ZZ4mainENK3$_0clEv"(ptr addrspace(4) %this) #2 align 2 {
 entry:
-  %this.addr = alloca %"class._ZTSZ4mainE3$_0.anon" addrspace(4)*, align 8
-  store %"class._ZTSZ4mainE3$_0.anon" addrspace(4)* %this, %"class._ZTSZ4mainE3$_0.anon" addrspace(4)** %this.addr, align 8, !tbaa !5
+  %this.addr = alloca ptr addrspace(4), align 8
+  store ptr addrspace(4) %this, ptr %this.addr, align 8, !tbaa !5
   call spir_func void @_Z6usagesv()
   ret void
 }
 
 ; Function Attrs: argmemonly nounwind willreturn
-declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #1
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
 
 ; Function Attrs: norecurse nounwind
 define spir_func void @_Z6usagesv() #3 {
 entry:
 ; CHECK-LLVM: %DEVICE = alloca ptr addrspace(5), align 8
 ; CHECK-LLVM-NO-USM: %DEVICE = alloca ptr addrspace(1), align 8
-  %DEVICE = alloca i32 addrspace(5)*, align 8
+  %DEVICE = alloca ptr addrspace(5), align 8
 
 ; CHECK-LLVM: %HOST = alloca ptr addrspace(6), align 8
 ; CHECK-LLVM-NO-USM: %HOST = alloca ptr addrspace(1), align 8
-  %HOST = alloca i32 addrspace(6)*, align 8
+  %HOST = alloca ptr addrspace(6), align 8
 
 ; CHECK-LLVM: bitcast ptr %DEVICE to ptr
 ; CHECK-LLVM-NO-USM: bitcast ptr %DEVICE to ptr
-  %0 = bitcast i32 addrspace(5)** %DEVICE to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %0) #4
+  call void @llvm.lifetime.start.p0(i64 8, ptr %DEVICE) #4
 
 ; CHECK-LLVM: bitcast ptr %HOST to ptr
 ; CHECK-LLVM-NO-USM: bitcast ptr %HOST to ptr
-  %1 = bitcast i32 addrspace(6)** %HOST to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %1) #4
+  call void @llvm.lifetime.start.p0(i64 8, ptr %HOST) #4
 
 ; CHECK-LLVM: %[[DLOAD_E:[0-9]+]] = load ptr addrspace(5), ptr %DEVICE, align 8
 ; CHECK-LLVM-NO-USM: %[[DLOAD_NE:[0-9]+]] = load ptr addrspace(1), ptr %DEVICE, align 8
-  %2 = load i32 addrspace(5)*, i32 addrspace(5)** %DEVICE, align 8, !tbaa !5
+  %0 = load ptr addrspace(5), ptr %DEVICE, align 8, !tbaa !5
 
 ; CHECK-LLVM: addrspacecast ptr addrspace(5) %[[DLOAD_E]] to ptr addrspace(4)
 ; CHECK-LLVM-NO-USM: addrspacecast ptr addrspace(1) %[[DLOAD_NE]] to ptr addrspace(4)
-  %3 = addrspacecast i32 addrspace(5)* %2 to i32 addrspace(4)*
-  call spir_func void @_Z3fooPi(i32 addrspace(4)* %3)
+  %1 = addrspacecast ptr addrspace(5) %0 to ptr addrspace(4)
+  call spir_func void @_Z3fooPi(ptr addrspace(4) %1)
 
 ; CHECK-LLVM: %[[HLOAD_E:[0-9]+]] = load ptr addrspace(6), ptr %HOST, align 8
 ; CHECK-LLVM-NO-USM: %[[HLOAD_NE:[0-9]+]] = load ptr addrspace(1), ptr %HOST, align 8
-  %4 = load i32 addrspace(6)*, i32 addrspace(6)** %HOST, align 8, !tbaa !5
+  %2 = load ptr addrspace(6), ptr %HOST, align 8, !tbaa !5
 
 ; CHECK-LLVM: addrspacecast ptr addrspace(6) %[[HLOAD_E]] to ptr addrspace(4)
 ; CHECK-LLVM-NO-USM: addrspacecast ptr addrspace(1) %[[HLOAD_NE]] to ptr addrspace(4)
-  %5 = addrspacecast i32 addrspace(6)* %4 to i32 addrspace(4)*
-  call spir_func void @_Z3fooPi(i32 addrspace(4)* %5)
+  %3 = addrspacecast ptr addrspace(6) %2 to ptr addrspace(4)
+  call spir_func void @_Z3fooPi(ptr addrspace(4) %3)
 
 ; CHECK-LLVM: bitcast ptr %HOST to ptr
 ; CHECK-LLVM-NO-USM: bitcast ptr %HOST to ptr
-  %6 = bitcast i32 addrspace(6)** %HOST to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %6) #4
+  call void @llvm.lifetime.end.p0(i64 8, ptr %HOST) #4
 
 ; CHECK-LLVM: bitcast ptr %DEVICE to ptr
 ; CHECK-LLVM-NO-USM: bitcast ptr %DEVICE to ptr
-  %7 = bitcast i32 addrspace(5)** %DEVICE to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %7) #4
+  call void @llvm.lifetime.end.p0(i64 8, ptr %DEVICE) #4
 
   ret void
 }
 
 ; Function Attrs: norecurse nounwind
-define spir_func void @_Z3fooPi(i32 addrspace(4)* %Data) #3 {
+define spir_func void @_Z3fooPi(ptr addrspace(4) %Data) #3 {
 entry:
-  %Data.addr = alloca i32 addrspace(4)*, align 8
-  store i32 addrspace(4)* %Data, i32 addrspace(4)** %Data.addr, align 8, !tbaa !5
+  %Data.addr = alloca ptr addrspace(4), align 8
+  store ptr addrspace(4) %Data, ptr %Data.addr, align 8, !tbaa !5
   ret void
 }
 
@@ -129,17 +123,17 @@ entry:
 ; CHECK-SPIRV-NO-EXT-NOT: GenericCastToPtr {{[0-9]+}} [[CAST_TO1:[0-9]+]] [[CAST_FROM1]]
 ; CHECL-SPIRV: Store [[DEVICE_ARG1]] [[CAST_TO1]] {{[0-9]+}} {{[0-9]+}}
 ; Function Attrs: norecurse nounwind
-define spir_func void @_Z3booPii(i32 addrspace(1)* %arg_glob, i32 addrspace(5)* %arg_dev) #3 !kernel_arg_addr_space !9 {
+define spir_func void @_Z3booPii(ptr addrspace(1) %arg_glob, ptr addrspace(5) %arg_dev) #3 !kernel_arg_addr_space !9 {
 entry:
-  %arg_glob.addr = alloca i32 addrspace(1)*, align 4
-  %arg_dev.addr = alloca i32 addrspace(5)*, align 4
-  store i32 addrspace(1)* %arg_glob, i32 addrspace(1)** %arg_glob.addr, align 4
-  store i32 addrspace(5)* %arg_dev, i32 addrspace(5)** %arg_dev.addr, align 4
-  %0 = load i32 addrspace(1)*, i32 addrspace(1)** %arg_glob.addr, align 4
+  %arg_glob.addr = alloca ptr addrspace(1), align 4
+  %arg_dev.addr = alloca ptr addrspace(5), align 4
+  store ptr addrspace(1) %arg_glob, ptr %arg_glob.addr, align 4
+  store ptr addrspace(5) %arg_dev, ptr %arg_dev.addr, align 4
+  %0 = load ptr addrspace(1), ptr %arg_glob.addr, align 4
 ; CHECK-LLVM: addrspacecast ptr addrspace(1) %{{[0-9]+}} to ptr addrspace(5)
 ; CHECK-LLVM-NO-USM-NOT: addrspacecast ptr addrspace(1) %{{[0-9]+}} to ptr addrspace(5)
-  %1 = addrspacecast i32 addrspace(1)* %0 to i32 addrspace(5)*
-  store i32 addrspace(5)* %1, i32 addrspace(5)** %arg_dev.addr, align 4
+  %1 = addrspacecast ptr addrspace(1) %0 to ptr addrspace(5)
+  store ptr addrspace(5) %1, ptr %arg_dev.addr, align 4
   ret void
 }
 
@@ -148,17 +142,17 @@ entry:
 ; CHECK-SPIRV-NO-EXT-NOT: GenericCastToPtr {{[0-9]+}} [[CAST_TO2:[0-9]+]] [[CAST_FROM2]]
 ; CHECL-SPIRV: Store [[HOST_ARG1]] [[CAST_TO2]] {{[0-9]+}} {{[0-9]+}}
 ; Function Attrs: norecurse nounwind
-define spir_func void @_Z3gooPii(i32 addrspace(1)* %arg_glob, i32 addrspace(6)* %arg_host) #3 !kernel_arg_addr_space !10 {
+define spir_func void @_Z3gooPii(ptr addrspace(1) %arg_glob, ptr addrspace(6) %arg_host) #3 !kernel_arg_addr_space !10 {
 entry:
-  %arg_glob.addr = alloca i32 addrspace(1)*, align 4
-  %arg_host.addr = alloca i32 addrspace(6)*, align 4
-  store i32 addrspace(1)* %arg_glob, i32 addrspace(1)** %arg_glob.addr, align 4
-  store i32 addrspace(6)* %arg_host, i32 addrspace(6)** %arg_host.addr, align 4
-  %0 = load i32 addrspace(1)*, i32 addrspace(1)** %arg_glob.addr, align 4
+  %arg_glob.addr = alloca ptr addrspace(1), align 4
+  %arg_host.addr = alloca ptr addrspace(6), align 4
+  store ptr addrspace(1) %arg_glob, ptr %arg_glob.addr, align 4
+  store ptr addrspace(6) %arg_host, ptr %arg_host.addr, align 4
+  %0 = load ptr addrspace(1), ptr %arg_glob.addr, align 4
 ; CHECK-LLVM: addrspacecast ptr addrspace(1) %{{[0-9]+}} to ptr addrspace(6)
 ; CHECK-LLVM-NO-USM-NOT: addrspacecast ptr addrspace(1) %{{[0-9]+}} to ptr addrspace(6)
-  %1 = addrspacecast i32 addrspace(1)* %0 to i32 addrspace(6)*
-  store i32 addrspace(6)* %1, i32 addrspace(6)** %arg_host.addr, align 4
+  %1 = addrspacecast ptr addrspace(1) %0 to ptr addrspace(6)
+  store ptr addrspace(6) %1, ptr %arg_host.addr, align 4
   ret void
 }
 
@@ -167,17 +161,17 @@ entry:
 ; CHECK-SPIRV-NO-EXT-NOT: PtrCastToGeneric {{[0-9]+}} [[CAST_TO3:[0-9]+]] [[CAST_FROM3]]
 ; CHECL-SPIRV: Store [[GLOB_ARG3]] [[CAST_TO3]] {{[0-9]+}} {{[0-9]+}}
 ; Function Attrs: norecurse nounwind
-define spir_func void @_Z3zooPii(i32 addrspace(1)* %arg_glob, i32 addrspace(5)* %arg_dev) #3 !kernel_arg_addr_space !9 {
+define spir_func void @_Z3zooPii(ptr addrspace(1) %arg_glob, ptr addrspace(5) %arg_dev) #3 !kernel_arg_addr_space !9 {
 entry:
-  %arg_glob.addr = alloca i32 addrspace(1)*, align 4
-  %arg_dev.addr = alloca i32 addrspace(5)*, align 4
-  store i32 addrspace(1)* %arg_glob, i32 addrspace(1)** %arg_glob.addr, align 4
-  store i32 addrspace(5)* %arg_dev, i32 addrspace(5)** %arg_dev.addr, align 4
-  %0 = load i32 addrspace(5)*, i32 addrspace(5)** %arg_dev.addr, align 4
+  %arg_glob.addr = alloca ptr addrspace(1), align 4
+  %arg_dev.addr = alloca ptr addrspace(5), align 4
+  store ptr addrspace(1) %arg_glob, ptr %arg_glob.addr, align 4
+  store ptr addrspace(5) %arg_dev, ptr %arg_dev.addr, align 4
+  %0 = load ptr addrspace(5), ptr %arg_dev.addr, align 4
 ; CHECK-LLVM: addrspacecast ptr addrspace(5) %{{[0-9]+}} to ptr addrspace(1)
 ; CHECK-LLVM-NO-USM-NOT: addrspacecast ptr addrspace(5) %{{[0-9]+}} to ptr addrspace(1)
-  %1 = addrspacecast i32 addrspace(5)* %0 to i32 addrspace(1)*
-  store i32 addrspace(1)* %1, i32 addrspace(1)** %arg_glob.addr, align 4
+  %1 = addrspacecast ptr addrspace(5) %0 to ptr addrspace(1)
+  store ptr addrspace(1) %1, ptr %arg_glob.addr, align 4
   ret void
 }
 
@@ -186,17 +180,17 @@ entry:
 ; CHECK-SPIRV-NO-EXT-NOT: PtrCastToGeneric {{[0-9]+}} [[CAST_TO4:[0-9]+]] [[CAST_FROM4]]
 ; CHECL-SPIRV: Store [[GLOB_ARG4]] [[CAST_TO4]] {{[0-9]+}} {{[0-9]+}}
 ; Function Attrs: norecurse nounwind
-define spir_func void @_Z3mooPii(i32 addrspace(1)* %arg_glob, i32 addrspace(6)* %arg_host) #3 !kernel_arg_addr_space !10 {
+define spir_func void @_Z3mooPii(ptr addrspace(1) %arg_glob, ptr addrspace(6) %arg_host) #3 !kernel_arg_addr_space !10 {
 entry:
-  %arg_glob.addr = alloca i32 addrspace(1)*, align 4
-  %arg_host.addr = alloca i32 addrspace(6)*, align 4
-  store i32 addrspace(1)* %arg_glob, i32 addrspace(1)** %arg_glob.addr, align 4
-  store i32 addrspace(6)* %arg_host, i32 addrspace(6)** %arg_host.addr, align 4
-  %0 = load i32 addrspace(6)*, i32 addrspace(6)** %arg_host.addr, align 4
+  %arg_glob.addr = alloca ptr addrspace(1), align 4
+  %arg_host.addr = alloca ptr addrspace(6), align 4
+  store ptr addrspace(1) %arg_glob, ptr %arg_glob.addr, align 4
+  store ptr addrspace(6) %arg_host, ptr %arg_host.addr, align 4
+  %0 = load ptr addrspace(6), ptr %arg_host.addr, align 4
 ; CHECK-LLVM: addrspacecast ptr addrspace(6) %{{[0-9]+}} to ptr addrspace(1)
 ; CHECK-LLVM-NO-USM-NOT: addrspacecast ptr addrspace(6) %{{[0-9]+}} to ptr addrspace(1)
-  %1 = addrspacecast i32 addrspace(6)* %0 to i32 addrspace(1)*
-  store i32 addrspace(1)* %1, i32 addrspace(1)** %arg_glob.addr, align 4
+  %1 = addrspacecast ptr addrspace(6) %0 to ptr addrspace(1)
+  store ptr addrspace(1) %1, ptr %arg_glob.addr, align 4
   ret void
 }
 
diff --git a/test/extensions/INTEL/SPV_INTEL_variable_length_array/basic.ll b/test/extensions/INTEL/SPV_INTEL_variable_length_array/basic.ll
index 15a9566ff2..a41de9d8ba 100644
--- a/test/extensions/INTEL/SPV_INTEL_variable_length_array/basic.ll
+++ b/test/extensions/INTEL/SPV_INTEL_variable_length_array/basic.ll
@@ -42,48 +42,47 @@ target triple = "spir"
 define dso_local spir_func i32 @foo(i64 %a, i64 %b) local_unnamed_addr #0 {
 entry:
   %qqq = alloca [42 x i32], align 16
-  %0 = bitcast [42 x i32]* %qqq to i8*
-  call void @llvm.lifetime.start.p0i8(i64 168, i8* nonnull %0) #2
+  call void @llvm.lifetime.start.p0(i64 168, ptr nonnull %qqq) #2
 
 ; CHECK-LLVM: %[[#SavedMem:]] = call ptr @llvm.stacksave.p0()
-  %1 = call i8* @llvm.stacksave.p0()
+  %0 = call ptr @llvm.stacksave.p0()
 
 ; CHECK-LLVM: alloca i32, i64 %a, align 16
   %vla = alloca i32, i64 %a, align 16
 
-  %arrayidx = getelementptr inbounds i32, i32* %vla, i64 %b
-  %2 = load i32, i32* %arrayidx, align 4
+  %arrayidx = getelementptr inbounds i32, ptr %vla, i64 %b
+  %1 = load i32, ptr %arrayidx, align 4
 
 ; CHECK-LLVM: call void @llvm.stackrestore.p0(ptr %[[#SavedMem]])
-  call void @llvm.stackrestore.p0(i8* %1)
+  call void @llvm.stackrestore.p0(ptr %0)
 
 ; CHECK-LLVM: %[[#SavedMem:]] = call ptr @llvm.stacksave.p0()
-  %3 = call i8* @llvm.stacksave.p0()
+  %2 = call ptr @llvm.stacksave.p0()
 
 ; CHECK-LLVM: alloca i32, i64 %a, align 16
   %vla2 = alloca i32, i64 %a, align 16
 
-  %arrayidx3 = getelementptr inbounds [42 x i32], [42 x i32]* %qqq, i64 0, i64 %b
-  %4 = load i32, i32* %arrayidx3, align 4
-  %add = add nsw i32 %4, %2
-  %arrayidx4 = getelementptr inbounds i32, i32* %vla2, i64 %b
-  %5 = load i32, i32* %arrayidx4, align 4
-  %add5 = add nsw i32 %add, %5
+  %arrayidx3 = getelementptr inbounds [42 x i32], ptr %qqq, i64 0, i64 %b
+  %3 = load i32, ptr %arrayidx3, align 4
+  %add = add nsw i32 %3, %1
+  %arrayidx4 = getelementptr inbounds i32, ptr %vla2, i64 %b
+  %4 = load i32, ptr %arrayidx4, align 4
+  %add5 = add nsw i32 %add, %4
 
 ; CHECK-LLVM: call void @llvm.stackrestore.p0(ptr %[[#SavedMem]])
-  call void @llvm.stackrestore.p0(i8* %3)
+  call void @llvm.stackrestore.p0(ptr %2)
 
-  call void @llvm.lifetime.end.p0i8(i64 168, i8* nonnull %0) #2
+  call void @llvm.lifetime.end.p0(i64 168, ptr nonnull %qqq) #2
   ret i32 %add5
 }
 
-declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #1
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
 
-declare i8* @llvm.stacksave.p0() #2
+declare ptr @llvm.stacksave.p0() #2
 
-declare void @llvm.stackrestore.p0(i8*) #2
+declare void @llvm.stackrestore.p0(ptr) #2
 
-declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #1
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
 
 attributes #0 = { nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
 attributes #1 = { argmemonly nounwind willreturn }
diff --git a/test/extensions/INTEL/SPV_INTEL_variable_length_array/complex-cfg.ll b/test/extensions/INTEL/SPV_INTEL_variable_length_array/complex-cfg.ll
index fc5953e449..956a534dab 100644
--- a/test/extensions/INTEL/SPV_INTEL_variable_length_array/complex-cfg.ll
+++ b/test/extensions/INTEL/SPV_INTEL_variable_length_array/complex-cfg.ll
@@ -7,12 +7,12 @@ target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:
 target triple = "spir64-unknown-unknown"
 
 ; Function Attrs: noinline nounwind optnone uwtable
-define weak dso_local spir_kernel void @K(i32 addrspace(1)* %S.ul.GEP.1) local_unnamed_addr #0 {
+define weak dso_local spir_kernel void @K(ptr addrspace(1) %S.ul.GEP.1) local_unnamed_addr #0 {
 newFuncRoot:
-  %.ascast1 = addrspacecast i32 addrspace(1)* %S.ul.GEP.1 to i32 addrspace(4)*
-  %S.ul.GEP.1.addr = alloca i32 addrspace(4)*, align 8
-  store i32 addrspace(4)* %.ascast1, i32 addrspace(4)** %S.ul.GEP.1.addr, align 8
-  %S.ul.GEP.1.value = load i32 addrspace(4)*, i32 addrspace(4)** %S.ul.GEP.1.addr, align 8
+  %.ascast1 = addrspacecast ptr addrspace(1) %S.ul.GEP.1 to ptr addrspace(4)
+  %S.ul.GEP.1.addr = alloca ptr addrspace(4), align 8
+  store ptr addrspace(4) %.ascast1, ptr %S.ul.GEP.1.addr, align 8
+  %S.ul.GEP.1.value = load ptr addrspace(4), ptr %S.ul.GEP.1.addr, align 8
   %"$loop_ctr46" = alloca i64, align 8
   %"$loop_ctr50" = alloca i64, align 8
   %"$loop_ctr38" = alloca i64, align 8
@@ -24,8 +24,8 @@ newFuncRoot:
 ; CHECK-LABEL: fallthru
 ; CHECK-LLVM: %"ascastB$val41" = alloca i32, i64 %div.3
 fallthru:                          ; preds = %newFuncRoot
-  %"$stacksave37" = call spir_func i8* @llvm.stacksave()
-  %S.ul.GEP.1_fetch.194 = load i32, i32 addrspace(4)* %S.ul.GEP.1.value, align 1
+  %"$stacksave37" = call spir_func ptr @llvm.stacksave()
+  %S.ul.GEP.1_fetch.194 = load i32, ptr addrspace(4) %S.ul.GEP.1.value, align 1
   %int_sext39 = sext i32 %S.ul.GEP.1_fetch.194 to i64
   %rel.39 = icmp sgt i32 0, %S.ul.GEP.1_fetch.194
   %slct.13 = select i1 %rel.39, i32 0, i32 %S.ul.GEP.1_fetch.194
@@ -33,26 +33,26 @@ fallthru:                          ; preds = %newFuncRoot
   %mul.11 = mul nsw i64 %int_sext40, 4
   %div.3 = sdiv i64 %mul.11, 4
   %"ascastB$val41" = alloca i32, i64 %div.3, align 4
-  store i64 1, i64* %"var$102", align 1
-  store i32 %S.ul.GEP.1_fetch.194, i32* %temp, align 1
-  store i32 1, i32* %"var$103", align 1
-  %"ascastB$val_fetch.197" = load i32, i32* %temp, align 1
+  store i64 1, ptr %"var$102", align 1
+  store i32 %S.ul.GEP.1_fetch.194, ptr %temp, align 1
+  store i32 1, ptr %"var$103", align 1
+  %"ascastB$val_fetch.197" = load i32, ptr %temp, align 1
   %rel.40 = icmp slt i32 %"ascastB$val_fetch.197", 1
   br i1 %rel.40, label %bb270, label %bb269.preheader
 
 ; CHECK-LABEL: bb269
 ; CHECK-LLVM: %1 = getelementptr inbounds i32, ptr %"ascastB$val41", i64 %0
 bb269:                                            ; preds = %bb269.preheader, %bb269
-  %"var$102_fetch.202" = load i64, i64* %"var$102", align 1
+  %"var$102_fetch.202" = load i64, ptr %"var$102", align 1
   %0 = sub nsw i64 %"var$102_fetch.202", 1
-  %1 = getelementptr inbounds i32, i32* %"ascastB$val41", i64 %0
+  %1 = getelementptr inbounds i32, ptr %"ascastB$val41", i64 %0
   %add.17 = add nsw i64 %"var$102_fetch.202", 1
-  store i64 %add.17, i64* %"var$102", align 1
-  %"var$103_fetch.203" = load i32, i32* %"var$103", align 1
+  store i64 %add.17, ptr %"var$102", align 1
+  %"var$103_fetch.203" = load i32, ptr %"var$103", align 1
   %add.18 = add nsw i32 %"var$103_fetch.203", 1
-  store i32 %add.18, i32* %"var$103", align 1
-  %"var$103_fetch.204" = load i32, i32* %"var$103", align 1
-  %"ascastB$val_fetch.205" = load i32, i32* %temp, align 1
+  store i32 %add.18, ptr %"var$103", align 1
+  %"var$103_fetch.204" = load i32, ptr %"var$103", align 1
+  %"ascastB$val_fetch.205" = load i32, ptr %temp, align 1
   %rel.41 = icmp sle i32 %"var$103_fetch.204", %"ascastB$val_fetch.205"
   br i1 %rel.41, label %bb269, label %bb270.loopexit
 
@@ -60,53 +60,53 @@ bb270.loopexit:                                   ; preds = %bb269
   br label %bb270
 
 bb270:                                            ; preds = %bb270.loopexit, %fallthru
-  store i64 1, i64* %"$loop_ctr38", align 1
+  store i64 1, ptr %"$loop_ctr38", align 1
   br label %loop_test315
 
 loop_test315:                                     ; preds = ,loop_body316, %bb270
-  %"$loop_ctr_fetch.208" = load i64, i64* %"$loop_ctr38", align 1
+  %"$loop_ctr_fetch.208" = load i64, ptr %"$loop_ctr38", align 1
   %rel.42 = icmp sle i64 %"$loop_ctr_fetch.208", %int_sext39
   br i1 %rel.42, label %loop_body316, label %loop_exit317
 
 ; CHECK-LABEL: loop_body316
 ; CHECK-LLVM: %3 = getelementptr inbounds i32, ptr %"ascastB$val41", i64 %2
 loop_body316:                                     ; preds = %loop_test315
-  %"$loop_ctr_fetch.206" = load i64, i64* %"$loop_ctr38", align 1
+  %"$loop_ctr_fetch.206" = load i64, ptr %"$loop_ctr38", align 1
   %2 = sub nsw i64 %"$loop_ctr_fetch.206", 1
-  %3 = getelementptr inbounds i32, i32* %"ascastB$val41", i64 %2
-  %"ascastB$val[]_fetch.207" = load i32, i32* %3, align 1
-  %"$loop_ctr_fetch.195" = load i64, i64* %"$loop_ctr38", align 1
+  %3 = getelementptr inbounds i32, ptr %"ascastB$val41", i64 %2
+  %"ascastB$val[]_fetch.207" = load i32, ptr %3, align 1
+  %"$loop_ctr_fetch.195" = load i64, ptr %"$loop_ctr38", align 1
   br label %loop_test315
 
 loop_exit317:                                     ; preds = %loop_body316
-  call spir_func void @llvm.stackrestore(i8* %"$stacksave37")
-  %S.ul.GEP.1_fetch.210 = load i32, i32 addrspace(4)* %S.ul.GEP.1.value, align 1
+  call spir_func void @llvm.stackrestore(ptr %"$stacksave37")
+  %S.ul.GEP.1_fetch.210 = load i32, ptr addrspace(4) %S.ul.GEP.1.value, align 1
   %int_sext47 = sext i32 %S.ul.GEP.1_fetch.210 to i64
-  store i64 1, i64* %"$loop_ctr46", align 1
+  store i64 1, ptr %"$loop_ctr46", align 1
   br label %loop_test323
 
 loop_test323:                                     ; preds = %loop_body324, %loop_exit317
-  %"$loop_ctr_fetch.212" = load i64, i64* %"$loop_ctr46", align 1
+  %"$loop_ctr_fetch.212" = load i64, ptr %"$loop_ctr46", align 1
   %rel.45 = icmp sle i64 %"$loop_ctr_fetch.212", %int_sext47
   br i1 %rel.45, label %loop_body324, label %loop_exit325
 
 loop_body324:                                     ; preds = %loop_test323
-  %"$loop_ctr_fetch.211" = load i64, i64* %"$loop_ctr46", align 1
+  %"$loop_ctr_fetch.211" = load i64, ptr %"$loop_ctr46", align 1
   br label %loop_test323
 
 loop_exit325:                                     ; preds = %loop_test323
-  %S.ul.GEP.1_fetch.214 = load i32, i32 addrspace(4)* %S.ul.GEP.1.value, align 1
+  %S.ul.GEP.1_fetch.214 = load i32, ptr addrspace(4) %S.ul.GEP.1.value, align 1
   %int_sext51 = sext i32 %S.ul.GEP.1_fetch.214 to i64
-  store i64 1, i64* %"$loop_ctr50", align 1
+  store i64 1, ptr %"$loop_ctr50", align 1
   br label %loop_test327
 
 loop_test327:                                     ; preds = %loop_body328, %loop_exit325
-  %"$loop_ctr_fetch.216" = load i64, i64* %"$loop_ctr50", align 1
+  %"$loop_ctr_fetch.216" = load i64, ptr %"$loop_ctr50", align 1
   %rel.48 = icmp sle i64 %"$loop_ctr_fetch.216", %int_sext51
   br i1 %rel.48, label %loop_body328, label %loop_exit329
 
 loop_body328:                                     ; preds = %loop_test327
-  %"$loop_ctr_fetch.215" = load i64, i64* %"$loop_ctr50", align 1
+  %"$loop_ctr_fetch.215" = load i64, ptr %"$loop_ctr50", align 1
   br label %loop_test327
 
 loop_exit329:                                     ; preds = %loop_test327
@@ -117,10 +117,10 @@ bb269.preheader:                                  ; preds = %fallthru
 }
 
 ; Function Attrs: nofree nosync nounwind willreturn mustprogress
-declare void @llvm.stackrestore(i8*) #1
+declare void @llvm.stackrestore(ptr) #1
 
 ; Function Attrs: nofree nosync nounwind willreturn mustprogress
-declare i8* @llvm.stacksave() #1
+declare ptr @llvm.stacksave() #1
 
 attributes #0 = { noinline nounwind optnone uwtable }
 attributes #1 = { nofree nosync nounwind willreturn mustprogress }
diff --git a/test/extensions/INTEL/SPV_INTEL_variable_length_array/vla_spec_const.ll b/test/extensions/INTEL/SPV_INTEL_variable_length_array/vla_spec_const.ll
index 500ecc57e6..a024cbfdfa 100644
--- a/test/extensions/INTEL/SPV_INTEL_variable_length_array/vla_spec_const.ll
+++ b/test/extensions/INTEL/SPV_INTEL_variable_length_array/vla_spec_const.ll
@@ -70,66 +70,60 @@ $_ZNK2cl4sycl12experimental13spec_constantIm13MyUInt64ConstE3getEv = comdat any
 define weak_odr dso_local spir_kernel void @_ZTS17SpecializedKernel() #0 comdat !kernel_arg_addr_space !4 !kernel_arg_access_qual !4 !kernel_arg_type !4 !kernel_arg_base_type !4 !kernel_arg_type_qual !4 {
 entry:
   %0 = alloca %"class._ZTSZZ4mainENK3$_0clERN2cl4sycl7handlerEEUlvE_.anon", align 1
-  %1 = bitcast %"class._ZTSZZ4mainENK3$_0clERN2cl4sycl7handlerEEUlvE_.anon"* %0 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %1) #4
-  %2 = addrspacecast %"class._ZTSZZ4mainENK3$_0clERN2cl4sycl7handlerEEUlvE_.anon"* %0 to %"class._ZTSZZ4mainENK3$_0clERN2cl4sycl7handlerEEUlvE_.anon" addrspace(4)*
-  call spir_func void @"_ZZZ4mainENK3$_0clERN2cl4sycl7handlerEENKUlvE_clEv"(%"class._ZTSZZ4mainENK3$_0clERN2cl4sycl7handlerEEUlvE_.anon" addrspace(4)* %2)
-  %3 = bitcast %"class._ZTSZZ4mainENK3$_0clERN2cl4sycl7handlerEEUlvE_.anon"* %0 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %3) #4
+  call void @llvm.lifetime.start.p0(i64 1, ptr %0) #4
+  %1 = addrspacecast ptr %0 to ptr addrspace(4)
+  call spir_func void @"_ZZZ4mainENK3$_0clERN2cl4sycl7handlerEENKUlvE_clEv"(ptr addrspace(4) %1)
+  call void @llvm.lifetime.end.p0(i64 1, ptr %0) #4
   ret void
 }
 
 ; Function Attrs: argmemonly nounwind willreturn
-declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #1
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
 
 ; Function Attrs: inlinehint norecurse
-define internal spir_func void @"_ZZZ4mainENK3$_0clERN2cl4sycl7handlerEENKUlvE_clEv"(%"class._ZTSZZ4mainENK3$_0clERN2cl4sycl7handlerEEUlvE_.anon" addrspace(4)* %this) #2 align 2 {
+define internal spir_func void @"_ZZZ4mainENK3$_0clERN2cl4sycl7handlerEENKUlvE_clEv"(ptr addrspace(4) %this) #2 align 2 {
 entry:
-  %this.addr = alloca %"class._ZTSZZ4mainENK3$_0clERN2cl4sycl7handlerEEUlvE_.anon" addrspace(4)*, align 8
-  %saved_stack = alloca i8*, align 8
+  %this.addr = alloca ptr addrspace(4), align 8
+  %saved_stack = alloca ptr, align 8
   %__vla_expr0 = alloca i64, align 8
-  store %"class._ZTSZZ4mainENK3$_0clERN2cl4sycl7handlerEEUlvE_.anon" addrspace(4)* %this, %"class._ZTSZZ4mainENK3$_0clERN2cl4sycl7handlerEEUlvE_.anon" addrspace(4)** %this.addr, align 8, !tbaa !5
-  %this1 = load %"class._ZTSZZ4mainENK3$_0clERN2cl4sycl7handlerEEUlvE_.anon" addrspace(4)*, %"class._ZTSZZ4mainENK3$_0clERN2cl4sycl7handlerEEUlvE_.anon" addrspace(4)** %this.addr, align 8
-  %0 = getelementptr inbounds %"class._ZTSZZ4mainENK3$_0clERN2cl4sycl7handlerEEUlvE_.anon", %"class._ZTSZZ4mainENK3$_0clERN2cl4sycl7handlerEEUlvE_.anon" addrspace(4)* %this1, i32 0, i32 0
-  %call = call spir_func i64 @_ZNK2cl4sycl12experimental13spec_constantIm13MyUInt64ConstE3getEv(%"class._ZTSN2cl4sycl12experimental13spec_constantIm13MyUInt64ConstEE.cl::sycl::experimental::spec_constant" addrspace(4)* %0)
+  store ptr addrspace(4) %this, ptr %this.addr, align 8, !tbaa !5
+  %this1 = load ptr addrspace(4), ptr %this.addr, align 8
+  %call = call spir_func i64 @_ZNK2cl4sycl12experimental13spec_constantIm13MyUInt64ConstE3getEv(ptr addrspace(4) %this1)
 ; CHECK-LLVM:  %[[SPEC_CONST:[[:alnum:]]+]] = call spir_func i64 @_ZNK2cl4sycl12experimental13spec_constantIm13MyUInt64ConstE3getEv(
-  %1 = call i8* @llvm.stacksave.p0()
+  %0 = call ptr @llvm.stacksave.p0()
 ; CHECK-LLVM: call ptr @llvm.stacksave.p0()
-  store i8* %1, i8** %saved_stack, align 8
+  store ptr %0, ptr %saved_stack, align 8
   %vla = alloca i32, i64 %call, align 4
 ; CHECK-LLVM: alloca i32, i64 %[[SPEC_CONST]], align 4
-  store i64 %call, i64* %__vla_expr0, align 8
-  %ptridx = getelementptr inbounds i32, i32* %vla, i64 0
-  store i32 42, i32* %ptridx, align 4, !tbaa !9
-  %2 = load i8*, i8** %saved_stack, align 8
-  call void @llvm.stackrestore.p0(i8* %2)
+  store i64 %call, ptr %__vla_expr0, align 8
+  store i32 42, ptr %vla, align 4, !tbaa !9
+  %1 = load ptr, ptr %saved_stack, align 8
+  call void @llvm.stackrestore.p0(ptr %1)
 ; CHECK-LLVM: call void @llvm.stackrestore.p0(ptr
   ret void
 }
 
 ; Function Attrs: argmemonly nounwind willreturn
-declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #1
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
 
 ; Function Attrs: norecurse
-define linkonce_odr dso_local spir_func i64 @_ZNK2cl4sycl12experimental13spec_constantIm13MyUInt64ConstE3getEv(%"class._ZTSN2cl4sycl12experimental13spec_constantIm13MyUInt64ConstEE.cl::sycl::experimental::spec_constant" addrspace(4)* %this) #3 comdat align 2 {
+define linkonce_odr dso_local spir_func i64 @_ZNK2cl4sycl12experimental13spec_constantIm13MyUInt64ConstE3getEv(ptr addrspace(4) %this) #3 comdat align 2 {
 entry:
-  %this.addr = alloca %"class._ZTSN2cl4sycl12experimental13spec_constantIm13MyUInt64ConstEE.cl::sycl::experimental::spec_constant" addrspace(4)*, align 8
-  %TName = alloca i8 addrspace(4)*, align 8
-  store %"class._ZTSN2cl4sycl12experimental13spec_constantIm13MyUInt64ConstEE.cl::sycl::experimental::spec_constant" addrspace(4)* %this, %"class._ZTSN2cl4sycl12experimental13spec_constantIm13MyUInt64ConstEE.cl::sycl::experimental::spec_constant" addrspace(4)** %this.addr, align 8, !tbaa !5
-  %0 = bitcast i8 addrspace(4)** %TName to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8, i8* %0) #4
-  %1 = call i64 @_Z20__spirv_SpecConstantix(i32 0, i64 0), !SYCL_SPEC_CONST_SYM_ID !11
-  %2 = bitcast i8 addrspace(4)** %TName to i8*
-  call void @llvm.lifetime.end.p0i8(i64 8, i8* %2) #4
+  %this.addr = alloca ptr addrspace(4), align 8
+  %TName = alloca ptr addrspace(4), align 8
+  store ptr addrspace(4) %this, ptr %this.addr, align 8, !tbaa !5
+  call void @llvm.lifetime.start.p0(i64 8, ptr %TName) #4
+  %0 = call i64 @_Z20__spirv_SpecConstantix(i32 0, i64 0), !SYCL_SPEC_CONST_SYM_ID !11
+  call void @llvm.lifetime.end.p0(i64 8, ptr %TName) #4
 ; CHECK-LLVM: ret i64 28
-  ret i64 %1
+  ret i64 %0
 }
 
 ; Function Attrs: nounwind
-declare i8* @llvm.stacksave.p0() #4
+declare ptr @llvm.stacksave.p0() #4
 
 ; Function Attrs: nounwind
-declare void @llvm.stackrestore.p0(i8*) #4
+declare void @llvm.stackrestore.p0(ptr) #4
 
 declare i64 @_Z20__spirv_SpecConstantix(i32, i64)
 
diff --git a/test/extensions/INTEL/SPV_INTEL_vector_compute/buffer_surface_intel.ll b/test/extensions/INTEL/SPV_INTEL_vector_compute/buffer_surface_intel.ll
index e2627e28a0..1a2d402bd1 100644
--- a/test/extensions/INTEL/SPV_INTEL_vector_compute/buffer_surface_intel.ll
+++ b/test/extensions/INTEL/SPV_INTEL_vector_compute/buffer_surface_intel.ll
@@ -8,21 +8,21 @@
 
 target triple = "spir"
 
-; LLVM-DAG: declare i32 @llvm.some.unknown.intrinsic.i32.p1intel.buffer_ro_t(ptr addrspace(1))
-; LLVM-DAG: declare i32 @llvm.some.unknown.intrinsic.i32.p1intel.buffer_wo_t(ptr addrspace(1))
-; LLVM-DAG: declare i32 @llvm.some.unknown.intrinsic.i32.p1intel.buffer_rw_t(ptr addrspace(1))
-; LLVM-DAG: declare i32 @llvm.some.unknown.intrinsic.i32.p1opencl.image1d_rw_t(ptr addrspace(1))
-; LLVM-DAG: declare i32 @llvm.some.unknown.intrinsic.i32.p1opencl.image1d_buffer_wo_t(ptr addrspace(1))
-; LLVM-DAG: declare i32 @llvm.some.unknown.intrinsic.i32.p1opencl.image2d_wo_t(ptr addrspace(1))
-; LLVM-DAG: declare i32 @llvm.some.unknown.intrinsic.i32.p1opencl.image3d_ro_t(ptr addrspace(1))
+; LLVM-DAG: declare i32 @llvm.some.unknown.intrinsic.i32.p1.buffer_ro_t(ptr addrspace(1))
+; LLVM-DAG: declare i32 @llvm.some.unknown.intrinsic.i32.p1.buffer_wo_t(ptr addrspace(1))
+; LLVM-DAG: declare i32 @llvm.some.unknown.intrinsic.i32.p1.buffer_rw_t(ptr addrspace(1))
+; LLVM-DAG: declare i32 @llvm.some.unknown.intrinsic.i32.p1.image1d_rw_t(ptr addrspace(1))
+; LLVM-DAG: declare i32 @llvm.some.unknown.intrinsic.i32.p1.image1d_buffer_wo_t(ptr addrspace(1))
+; LLVM-DAG: declare i32 @llvm.some.unknown.intrinsic.i32.p1.image2d_wo_t(ptr addrspace(1))
+; LLVM-DAG: declare i32 @llvm.some.unknown.intrinsic.i32.p1.image3d_ro_t(ptr addrspace(1))
 
-declare i32 @llvm.some.unknown.intrinsic.i32.p1intel.buffer_ro_t(target("spirv.BufferSurfaceINTEL", 0))
-declare i32 @llvm.some.unknown.intrinsic.i32.p1intel.buffer_wo_t(target("spirv.BufferSurfaceINTEL", 1))
-declare i32 @llvm.some.unknown.intrinsic.i32.p1intel.buffer_rw_t(target("spirv.BufferSurfaceINTEL", 2))
-declare i32 @llvm.some.unknown.intrinsic.i32.p1opencl.image1d_rw_t(target("spirv.Image", void, 0, 0, 0, 0, 0, 0, 2))
-declare i32 @llvm.some.unknown.intrinsic.i32.p1opencl.image1d_buffer_wo_t(target("spirv.Image", void, 5, 0, 0, 0, 0, 0, 1))
-declare i32 @llvm.some.unknown.intrinsic.i32.p1opencl.image2d_wo_t(target("spirv.Image", void, 1, 0, 0, 0, 0, 0, 1))
-declare i32 @llvm.some.unknown.intrinsic.i32.p1opencl.image3d_ro_t(target("spirv.Image", void, 2, 0, 0, 0, 0, 0, 0))
+declare i32 @llvm.some.unknown.intrinsic.i32.p1.buffer_ro_t(target("spirv.BufferSurfaceINTEL", 0))
+declare i32 @llvm.some.unknown.intrinsic.i32.p1.buffer_wo_t(target("spirv.BufferSurfaceINTEL", 1))
+declare i32 @llvm.some.unknown.intrinsic.i32.p1.buffer_rw_t(target("spirv.BufferSurfaceINTEL", 2))
+declare i32 @llvm.some.unknown.intrinsic.i32.p1.image1d_rw_t(target("spirv.Image", void, 0, 0, 0, 0, 0, 0, 2))
+declare i32 @llvm.some.unknown.intrinsic.i32.p1.image1d_buffer_wo_t(target("spirv.Image", void, 5, 0, 0, 0, 0, 0, 1))
+declare i32 @llvm.some.unknown.intrinsic.i32.p1.image2d_wo_t(target("spirv.Image", void, 1, 0, 0, 0, 0, 0, 1))
+declare i32 @llvm.some.unknown.intrinsic.i32.p1.image3d_ro_t(target("spirv.Image", void, 2, 0, 0, 0, 0, 0, 0))
 
 ; SPV-DAG: TypeInt [[INT:[0-9]+]] 32 0
 ; SPV-DAG: TypeVoid [[VOID:[0-9]+]]
@@ -45,21 +45,21 @@ declare i32 @llvm.some.unknown.intrinsic.i32.p1opencl.image3d_ro_t(target("spirv
 ; LLVM-DAG: define spir_kernel void @test(ptr addrspace(1) %buf_ro, ptr addrspace(1) %buf_wo, ptr addrspace(1) %buf_rw, ptr addrspace(1) %im1d, ptr addrspace(1) %im1db, ptr addrspace(1) %im2d, ptr addrspace(1) %im3d)
 define spir_kernel void @test(target("spirv.BufferSurfaceINTEL", 0) %buf_ro, target("spirv.BufferSurfaceINTEL", 1) %buf_wo, target("spirv.BufferSurfaceINTEL", 2) %buf_rw, target("spirv.Image", void, 0, 0, 0, 0, 0, 0, 2) %im1d, target("spirv.Image", void, 5, 0, 0, 0, 0, 0, 1) %im1db, target("spirv.Image", void, 1, 0, 0, 0, 0, 0, 1) %im2d, target("spirv.Image", void, 2, 0, 0, 0, 0, 0, 0) %im3d) #0 {
 entry:
-; LLVM: %0 = call i32 @llvm.some.unknown.intrinsic.i32.p1intel.buffer_ro_t(ptr addrspace(1) %buf_ro)
-; LLVM: %1 = call i32 @llvm.some.unknown.intrinsic.i32.p1intel.buffer_wo_t(ptr addrspace(1) %buf_wo)
-; LLVM: %2 = call i32 @llvm.some.unknown.intrinsic.i32.p1intel.buffer_rw_t(ptr addrspace(1) %buf_rw)
-; LLVM: %3 = call i32 @llvm.some.unknown.intrinsic.i32.p1opencl.image1d_rw_t(ptr addrspace(1) %im1d)
-; LLVM: %4 = call i32 @llvm.some.unknown.intrinsic.i32.p1opencl.image1d_buffer_wo_t(ptr addrspace(1) %im1db)
-; LLVM: %5 = call i32 @llvm.some.unknown.intrinsic.i32.p1opencl.image2d_wo_t(ptr addrspace(1) %im2d)
-; LLVM: %6 = call i32 @llvm.some.unknown.intrinsic.i32.p1opencl.image3d_ro_t(ptr addrspace(1) %im3d)
+; LLVM: %0 = call i32 @llvm.some.unknown.intrinsic.i32.p1.buffer_ro_t(ptr addrspace(1) %buf_ro)
+; LLVM: %1 = call i32 @llvm.some.unknown.intrinsic.i32.p1.buffer_wo_t(ptr addrspace(1) %buf_wo)
+; LLVM: %2 = call i32 @llvm.some.unknown.intrinsic.i32.p1.buffer_rw_t(ptr addrspace(1) %buf_rw)
+; LLVM: %3 = call i32 @llvm.some.unknown.intrinsic.i32.p1.image1d_rw_t(ptr addrspace(1) %im1d)
+; LLVM: %4 = call i32 @llvm.some.unknown.intrinsic.i32.p1.image1d_buffer_wo_t(ptr addrspace(1) %im1db)
+; LLVM: %5 = call i32 @llvm.some.unknown.intrinsic.i32.p1.image2d_wo_t(ptr addrspace(1) %im2d)
+; LLVM: %6 = call i32 @llvm.some.unknown.intrinsic.i32.p1.image3d_ro_t(ptr addrspace(1) %im3d)
 ; LLVM: ret void
-  %0 = call i32 @llvm.some.unknown.intrinsic.i32.p1intel.buffer_ro_t(target("spirv.BufferSurfaceINTEL", 0) %buf_ro)
-  %1 = call i32 @llvm.some.unknown.intrinsic.i32.p1intel.buffer_wo_t(target("spirv.BufferSurfaceINTEL", 1) %buf_wo)
-  %2 = call i32 @llvm.some.unknown.intrinsic.i32.p1intel.buffer_rw_t(target("spirv.BufferSurfaceINTEL", 2) %buf_rw)
-  %3 = call i32 @llvm.some.unknown.intrinsic.i32.p1opencl.image1d_rw_t(target("spirv.Image", void, 0, 0, 0, 0, 0, 0, 2) %im1d)
-  %4 = call i32 @llvm.some.unknown.intrinsic.i32.p1opencl.image1d_buffer_wo_t(target("spirv.Image", void, 5, 0, 0, 0, 0, 0, 1) %im1db)
-  %5 = call i32 @llvm.some.unknown.intrinsic.i32.p1opencl.image2d_wo_t(target("spirv.Image", void, 1, 0, 0, 0, 0, 0, 1) %im2d)
-  %6 = call i32 @llvm.some.unknown.intrinsic.i32.p1opencl.image3d_ro_t(target("spirv.Image", void, 2, 0, 0, 0, 0, 0, 0) %im3d)
+  %0 = call i32 @llvm.some.unknown.intrinsic.i32.p1.buffer_ro_t(target("spirv.BufferSurfaceINTEL", 0) %buf_ro)
+  %1 = call i32 @llvm.some.unknown.intrinsic.i32.p1.buffer_wo_t(target("spirv.BufferSurfaceINTEL", 1) %buf_wo)
+  %2 = call i32 @llvm.some.unknown.intrinsic.i32.p1.buffer_rw_t(target("spirv.BufferSurfaceINTEL", 2) %buf_rw)
+  %3 = call i32 @llvm.some.unknown.intrinsic.i32.p1.image1d_rw_t(target("spirv.Image", void, 0, 0, 0, 0, 0, 0, 2) %im1d)
+  %4 = call i32 @llvm.some.unknown.intrinsic.i32.p1.image1d_buffer_wo_t(target("spirv.Image", void, 5, 0, 0, 0, 0, 0, 1) %im1db)
+  %5 = call i32 @llvm.some.unknown.intrinsic.i32.p1.image2d_wo_t(target("spirv.Image", void, 1, 0, 0, 0, 0, 0, 1) %im2d)
+  %6 = call i32 @llvm.some.unknown.intrinsic.i32.p1.image3d_ro_t(target("spirv.Image", void, 2, 0, 0, 0, 0, 0, 0) %im3d)
   ret void
 }
 
diff --git a/test/extensions/INTEL/SPV_INTEL_vector_compute/decoration_byte_offset.ll b/test/extensions/INTEL/SPV_INTEL_vector_compute/decoration_byte_offset.ll
index 41d2eb8e0c..55b5ca8b21 100644
--- a/test/extensions/INTEL/SPV_INTEL_vector_compute/decoration_byte_offset.ll
+++ b/test/extensions/INTEL/SPV_INTEL_vector_compute/decoration_byte_offset.ll
@@ -17,12 +17,12 @@ target triple = "spir"
 ; SPV-DAG: Decorate [[IN]] GlobalVariableOffsetINTEL 1
 
 @in = internal global <256 x i8> undef, align 256 #0
-declare <256 x i8> @llvm.genx.vload(<256 x i8>* nonnull %aaa)
+declare <256 x i8> @llvm.genx.vload(ptr nonnull %aaa)
 
 ; Function Attrs: noinline norecurse nounwind readnone
 define dso_local dllexport spir_kernel void @k_rte(i32 %ibuf, i32 %obuf) local_unnamed_addr #1 {
 entry:
-  %gload53 = tail call <256 x i8> @llvm.genx.vload(<256 x i8>* nonnull @in)
+  %gload53 = tail call <256 x i8> @llvm.genx.vload(ptr nonnull @in)
   ret void
 }
 
diff --git a/test/extensions/INTEL/SPV_INTEL_vector_compute/decoration_simt_call.ll b/test/extensions/INTEL/SPV_INTEL_vector_compute/decoration_simt_call.ll
index 46751a5481..f689d14a67 100644
--- a/test/extensions/INTEL/SPV_INTEL_vector_compute/decoration_simt_call.ll
+++ b/test/extensions/INTEL/SPV_INTEL_vector_compute/decoration_simt_call.ll
@@ -17,12 +17,12 @@ target triple = "spir"
 ; SPV-DAG: Decorate [[K_RTE]] SIMTCallINTEL 5
 
 @in = internal global <256 x i8> undef, align 256 #0
-declare <256 x i8> @llvm.genx.vload(<256 x i8>* nonnull %aaa)
+declare <256 x i8> @llvm.genx.vload(ptr nonnull %aaa)
 
 ; Function Attrs: noinline norecurse nounwind readnone
 define dso_local dllexport spir_kernel void @k_rte(i32 %ibuf, i32 %obuf) local_unnamed_addr #1 {
 entry:
-  %gload53 = tail call <256 x i8> @llvm.genx.vload(<256 x i8>* nonnull @in)
+  %gload53 = tail call <256 x i8> @llvm.genx.vload(ptr nonnull @in)
   ret void
 }
 
diff --git a/test/extensions/INTEL/SPV_INTEL_vector_compute/decoration_single_element_vector.ll b/test/extensions/INTEL/SPV_INTEL_vector_compute/decoration_single_element_vector.ll
index 053e72490b..440b0c45cf 100644
--- a/test/extensions/INTEL/SPV_INTEL_vector_compute/decoration_single_element_vector.ll
+++ b/test/extensions/INTEL/SPV_INTEL_vector_compute/decoration_single_element_vector.ll
@@ -12,7 +12,7 @@ target datalayout = "e-p:64:64-i64:64-n8:16:32"
 target triple = "spir64"
 
 
-@global_var = external global i32** #2
+@global_var = external global ptr #2
 
 ; SPV-DAG: Name [[def:[0-9]+]] "_Z24__cm_intrinsic_impl_sdivu2CMvb1_cS_"
 ; SPV-DAG: Name [[a:[0-9]+]] "a"
diff --git a/test/extensions/INTEL/SPV_INTEL_vector_compute/decoration_volatile.ll b/test/extensions/INTEL/SPV_INTEL_vector_compute/decoration_volatile.ll
index 71aadc13d4..3d3960079f 100644
--- a/test/extensions/INTEL/SPV_INTEL_vector_compute/decoration_volatile.ll
+++ b/test/extensions/INTEL/SPV_INTEL_vector_compute/decoration_volatile.ll
@@ -17,12 +17,12 @@ target triple = "spir"
 ; SPV-DAG: Decorate [[IN]] Volatile
 
 @in = internal global <256 x i8> undef, align 256 #0
-declare <256 x i8> @llvm.genx.vload(<256 x i8>* nonnull %aaa)
+declare <256 x i8> @llvm.genx.vload(ptr nonnull %aaa)
 
 ; Function Attrs: noinline norecurse nounwind readnone
 define dso_local dllexport spir_kernel void @k_rte(i32 %ibuf, i32 %obuf) local_unnamed_addr #1 {
 entry:
-  %gload53 = tail call <256 x i8> @llvm.genx.vload(<256 x i8>* nonnull @in)
+  %gload53 = tail call <256 x i8> @llvm.genx.vload(ptr nonnull @in)
   ret void
 }
 
diff --git a/test/extensions/INTEL/SPV_INTEL_vector_compute/extension_vector_compute_stability.ll b/test/extensions/INTEL/SPV_INTEL_vector_compute/extension_vector_compute_stability.ll
index 59f1037746..c5645a8e8e 100644
--- a/test/extensions/INTEL/SPV_INTEL_vector_compute/extension_vector_compute_stability.ll
+++ b/test/extensions/INTEL/SPV_INTEL_vector_compute/extension_vector_compute_stability.ll
@@ -18,12 +18,12 @@ target triple = "spir"
 ; LLVM-DAG: attributes #[[IN_ATTR]]{{[^0-9].*"VCByteOffset"="1".*"VCGlobalVariable".*"VCVolatile"}}
 
 @in = internal global <256 x i8> undef, align 256 #0
-declare <256 x i8> @llvm.genx.vload(<256 x i8>* nonnull %aaa)
+declare <256 x i8> @llvm.genx.vload(ptr nonnull %aaa)
 
 ; Function Attrs: noinline norecurse nounwind readnone
 define dso_local dllexport spir_kernel void @k_rte(i32 %ibuf, i32 %obuf) local_unnamed_addr #1 {
 entry:
-  %gload53 = tail call <256 x i8> @llvm.genx.vload(<256 x i8>* nonnull @in)
+  %gload53 = tail call <256 x i8> @llvm.genx.vload(ptr nonnull @in)
   ret void
 }
 
diff --git a/test/extensions/KHR/SPV_KHR_cooperative_matrix/cooperative_matrix.ll b/test/extensions/KHR/SPV_KHR_cooperative_matrix/cooperative_matrix.ll
index acbf551a3d..27da5a99da 100644
--- a/test/extensions/KHR/SPV_KHR_cooperative_matrix/cooperative_matrix.ll
+++ b/test/extensions/KHR/SPV_KHR_cooperative_matrix/cooperative_matrix.ll
@@ -55,27 +55,25 @@ entry:
   %ref.tmp29.sroa.0.i = alloca target("spirv.CooperativeMatrixKHR", i32, 3, 12, 12, 3), align 8
   %agg.tmp15.sroa.0.sroa.2.0..sroa_idx = getelementptr inbounds %"class.sycl::_V1::range", ptr %_arg_accB5, i64 0, i32 0, i32 0, i64 1
   %agg.tmp15.sroa.0.sroa.2.0.copyload = load i64, ptr %agg.tmp15.sroa.0.sroa.2.0..sroa_idx, align 8
-  %0 = getelementptr inbounds %"class.sycl::_V1::id", ptr %_arg_accB6, i64 0, i32 0, i32 0, i64 0
-  %agg.tmp16.sroa.0.sroa.0.0.copyload = load i64, ptr %0, align 8
+  %agg.tmp16.sroa.0.sroa.0.0.copyload = load i64, ptr %_arg_accB6, align 8
   %agg.tmp16.sroa.0.sroa.2.0..sroa_idx = getelementptr inbounds %"class.sycl::_V1::id", ptr %_arg_accB6, i64 0, i32 0, i32 0, i64 1
   %agg.tmp16.sroa.0.sroa.2.0.copyload = load i64, ptr %agg.tmp16.sroa.0.sroa.2.0..sroa_idx, align 8
   %mul.i4.i.i.i.i45 = mul i64 %agg.tmp16.sroa.0.sroa.0.0.copyload, %agg.tmp15.sroa.0.sroa.2.0.copyload
   %add.i6.i.i.i.i46 = add i64 %mul.i4.i.i.i.i45, %agg.tmp16.sroa.0.sroa.2.0.copyload
   %add.ptr.i47 = getelementptr inbounds i8, ptr addrspace(1) %_arg_accB, i64 %add.i6.i.i.i.i46
-  %1 = load <3 x i64>, ptr addrspace(1) @__spirv_BuiltInGlobalInvocationId, align 32
-  %2 = extractelement <3 x i64> %1, i64 1
-  %3 = extractelement <3 x i64> %1, i64 0
-  %4 = load <3 x i64>, ptr addrspace(1) @__spirv_BuiltInLocalInvocationId, align 32
-  %5 = extractelement <3 x i64> %4, i64 1
-  %6 = extractelement <3 x i64> %4, i64 0
-  %cmp.i.i = icmp ult i64 %2, 2147483648
-  %cmp.i54.i = icmp ult i64 %3, 2147483648
-  %cmp.i56.i = icmp ult i64 %5, 2147483648
-  %sub.i = sub nsw i64 %2, %5
-  %cmp.i58.i = icmp ult i64 %6, 2147483648
-  %sub5.i = sub nsw i64 %3, %6
-  %sub_c.sroa.0.i.0.i.0..sroa_cast = bitcast ptr %sub_c.sroa.0.i to ptr
-  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %sub_c.sroa.0.i.0.i.0..sroa_cast)
+  %0 = load <3 x i64>, ptr addrspace(1) @__spirv_BuiltInGlobalInvocationId, align 32
+  %1 = extractelement <3 x i64> %0, i64 1
+  %2 = extractelement <3 x i64> %0, i64 0
+  %3 = load <3 x i64>, ptr addrspace(1) @__spirv_BuiltInLocalInvocationId, align 32
+  %4 = extractelement <3 x i64> %3, i64 1
+  %5 = extractelement <3 x i64> %3, i64 0
+  %cmp.i.i = icmp ult i64 %1, 2147483648
+  %cmp.i54.i = icmp ult i64 %2, 2147483648
+  %cmp.i56.i = icmp ult i64 %4, 2147483648
+  %sub.i = sub nsw i64 %1, %4
+  %cmp.i58.i = icmp ult i64 %5, 2147483648
+  %sub5.i = sub nsw i64 %2, %5
+  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %sub_c.sroa.0.i)
   %call.i.i = tail call spir_func noundef target("spirv.CooperativeMatrixKHR", i32, 3, 12, 12, 3) @_Z26__spirv_CompositeConstruct(i32 noundef 0) #4
   store target("spirv.CooperativeMatrixKHR", i32, 3, 12, 12, 3) %call.i.i, ptr %sub_c.sroa.0.i, align 8
   %mul.i = mul nsw i64 %sub.i, 12
@@ -88,9 +86,6 @@ entry:
   %add.ptr.i.i105141.i = getelementptr i8, ptr addrspace(1) %add.ptr.i47, i64 %mul26.i
   %mul22.i = shl i64 %_arg_N, 2
   %add.ptr.i108140.i = getelementptr i8, ptr addrspace(1) %add.ptr.i.i105141.i, i64 %idx.neg.i.i104.i
-  %ref.tmp29.sroa.0.i.0.i.0..sroa_cast = bitcast ptr %ref.tmp29.sroa.0.i to ptr
-  %7 = bitcast ptr %ref.tmp29.sroa.0.i to ptr
-  %8 = bitcast ptr %sub_c.sroa.0.i to ptr
   br label %for.cond.i
 
 for.cond.i:                                       ; preds = %for.body.i, %entry
@@ -111,13 +106,13 @@ for.body.i:                                       ; preds = %for.cond.i
   %add.ptr.i111.i = getelementptr i8, ptr addrspace(1) %add.ptr.i108140.i, i64 %mul23.i
   %call.ascast.i72.i = addrspacecast ptr addrspace(1) %add.ptr.i111.i to ptr addrspace(4)
   %call1.i73.i = tail call spir_func noundef target("spirv.CooperativeMatrixKHR", i8, 2, 48, 12, 3) @_Z32__spirv_CooperativeMatrixLoadKHR_2(ptr addrspace(4) noundef %call.ascast.i72.i, i64 noundef %mul22.i) #4
-  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %ref.tmp29.sroa.0.i.0.i.0..sroa_cast)
+  call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %ref.tmp29.sroa.0.i)
   %sub_c.sroa.0.i.0.sub_c.sroa.0.i.0.sub_c.sroa.0.0.sub_c.sroa.0.0.sub_c.sroa.0.0.125.i = load target("spirv.CooperativeMatrixKHR", i32, 3, 12, 12, 3), ptr %sub_c.sroa.0.i, align 8
   %call.i77.i = tail call spir_func noundef target("spirv.CooperativeMatrixKHR", i32, 3, 12, 12, 3) @_Z34__spirv_CooperativeMatrixMulAddKHR(target("spirv.CooperativeMatrixKHR", i8, 0, 12, 48, 3) noundef %call1.i.i, target("spirv.CooperativeMatrixKHR", i8, 2, 48, 12, 3) noundef %call1.i73.i, target("spirv.CooperativeMatrixKHR", i32, 3, 12, 12, 3) noundef %sub_c.sroa.0.i.0.sub_c.sroa.0.i.0.sub_c.sroa.0.0.sub_c.sroa.0.0.sub_c.sroa.0.0.125.i, i32 noundef 12) #4
   store target("spirv.CooperativeMatrixKHR", i32, 3, 12, 12, 3) %call.i77.i, ptr %ref.tmp29.sroa.0.i, align 8
-  %ref.tmp29.sroa.0.i.0.ref.tmp29.sroa.0.i.0.ref.tmp29.sroa.0.0.ref.tmp29.sroa.0.0.ref.tmp29.sroa.0.0..i = load i64, ptr %7, align 8
-  store i64 %ref.tmp29.sroa.0.i.0.ref.tmp29.sroa.0.i.0.ref.tmp29.sroa.0.0.ref.tmp29.sroa.0.0.ref.tmp29.sroa.0.0..i, ptr %8, align 8
-  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %ref.tmp29.sroa.0.i.0.i.0..sroa_cast)
+  %ref.tmp29.sroa.0.i.0.ref.tmp29.sroa.0.i.0.ref.tmp29.sroa.0.0.ref.tmp29.sroa.0.0.ref.tmp29.sroa.0.0..i = load i64, ptr %ref.tmp29.sroa.0.i, align 8
+  store i64 %ref.tmp29.sroa.0.i.0.ref.tmp29.sroa.0.i.0.ref.tmp29.sroa.0.0.ref.tmp29.sroa.0.0.ref.tmp29.sroa.0.0..i, ptr %sub_c.sroa.0.i, align 8
+  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %ref.tmp29.sroa.0.i)
   %add.i = add nuw nsw i32 %k.0.i, 1
   br label %for.cond.i
 
@@ -129,7 +124,7 @@ _ZZZ15matrix_multiplyIiaLm24ELm96ELm24ELm96ELm24ELm24EEvR10big_matrixIT_XT5_EXT6
   %call.ascast.i.i = addrspacecast ptr addrspace(1) %add.ptr.i81.i to ptr addrspace(4)
   %sub_c.sroa.0.i.0.sub_c.sroa.0.i.0.sub_c.sroa.0.0.sub_c.sroa.0.0.sub_c.sroa.0.0..i = load target("spirv.CooperativeMatrixKHR", i32, 3, 12, 12, 3), ptr %sub_c.sroa.0.i, align 8
   tail call spir_func void @_Z33__spirv_CooperativeMatrixStoreKHR(ptr addrspace(4) noundef %call.ascast.i.i, target("spirv.CooperativeMatrixKHR", i32, 3, 12, 12, 3) noundef %sub_c.sroa.0.i.0.sub_c.sroa.0.i.0.sub_c.sroa.0.0.sub_c.sroa.0.0.sub_c.sroa.0.0..i, i32 noundef 0, i64 noundef %_arg_N, i32 noundef 1) #4
-  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %sub_c.sroa.0.i.0.i.0..sroa_cast)
+  call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %sub_c.sroa.0.i)
   ret void
 }
 
diff --git a/test/extensions/KHR/SPV_KHR_expect_assume/assume.ll b/test/extensions/KHR/SPV_KHR_expect_assume/assume.ll
index a615a8b4d6..4c28501195 100644
--- a/test/extensions/KHR/SPV_KHR_expect_assume/assume.ll
+++ b/test/extensions/KHR/SPV_KHR_expect_assume/assume.ll
@@ -41,8 +41,8 @@ target triple = "spir64-unknown-unknown"
 define spir_func void @_Z3fooi(i32 %x) #0 {
 entry:
   %x.addr = alloca i32, align 4
-  store i32 %x, i32* %x.addr, align 4, !tbaa !2
-  %0 = load i32, i32* %x.addr, align 4, !tbaa !2
+  store i32 %x, ptr %x.addr, align 4, !tbaa !2
+  %0 = load i32, ptr %x.addr, align 4, !tbaa !2
   %cmp = icmp ne i32 %0, 0
   call void @llvm.assume(i1 %cmp)
   ret void
@@ -56,40 +56,38 @@ define i32 @main() #2 {
 entry:
   %retval = alloca i32, align 4
   %agg.tmp = alloca %class.anon, align 1
-  store i32 0, i32* %retval, align 4
-  call spir_func void @"_Z18kernel_single_taskIZ4mainE11fake_kernelZ4mainE3$_0EvT0_"(%class.anon* byval(%class.anon) align 1 %agg.tmp)
+  store i32 0, ptr %retval, align 4
+  call spir_func void @"_Z18kernel_single_taskIZ4mainE11fake_kernelZ4mainE3$_0EvT0_"(ptr byval(%class.anon) align 1 %agg.tmp)
   ret i32 0
 }
 
 ; Function Attrs: nounwind
-define internal spir_func void @"_Z18kernel_single_taskIZ4mainE11fake_kernelZ4mainE3$_0EvT0_"(%class.anon* byval(%class.anon) align 1 %kernelFunc) #0 {
+define internal spir_func void @"_Z18kernel_single_taskIZ4mainE11fake_kernelZ4mainE3$_0EvT0_"(ptr byval(%class.anon) align 1 %kernelFunc) #0 {
 entry:
-  call spir_func void @"_ZZ4mainENK3$_0clEv"(%class.anon* %kernelFunc)
+  call spir_func void @"_ZZ4mainENK3$_0clEv"(ptr %kernelFunc)
   ret void
 }
 
 ; Function Attrs: inlinehint nounwind
-define internal spir_func void @"_ZZ4mainENK3$_0clEv"(%class.anon* %this) #3 align 2 {
+define internal spir_func void @"_ZZ4mainENK3$_0clEv"(ptr %this) #3 align 2 {
 entry:
-  %this.addr = alloca %class.anon*, align 8
+  %this.addr = alloca ptr, align 8
   %a = alloca i32, align 4
-  store %class.anon* %this, %class.anon** %this.addr, align 8, !tbaa !6
-  %this1 = load %class.anon*, %class.anon** %this.addr, align 8
-  %0 = bitcast i32* %a to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #5
-  store i32 1, i32* %a, align 4, !tbaa !2
-  %1 = load i32, i32* %a, align 4, !tbaa !2
-  call spir_func void @_Z3fooi(i32 %1)
-  %2 = bitcast i32* %a to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %2) #5
+  store ptr %this, ptr %this.addr, align 8, !tbaa !6
+  %this1 = load ptr, ptr %this.addr, align 8
+  call void @llvm.lifetime.start.p0(i64 4, ptr %a) #5
+  store i32 1, ptr %a, align 4, !tbaa !2
+  %0 = load i32, ptr %a, align 4, !tbaa !2
+  call spir_func void @_Z3fooi(i32 %0)
+  call void @llvm.lifetime.end.p0(i64 4, ptr %a) #5
   ret void
 }
 
 ; Function Attrs: argmemonly nounwind willreturn
-declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #4
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #4
 
 ; Function Attrs: argmemonly nounwind willreturn
-declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #4
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #4
 
 attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
 attributes #1 = { nounwind willreturn }
diff --git a/test/extensions/KHR/SPV_KHR_expect_assume/expect.ll b/test/extensions/KHR/SPV_KHR_expect_assume/expect.ll
index f2b70242e4..b3110b2f01 100644
--- a/test/extensions/KHR/SPV_KHR_expect_assume/expect.ll
+++ b/test/extensions/KHR/SPV_KHR_expect_assume/expect.ll
@@ -81,67 +81,61 @@ target triple = "spir64-unknown-unknown"
 define spir_kernel void @_ZTSZ4mainE15kernel_function() #0 !kernel_arg_addr_space !4 !kernel_arg_access_qual !4 !kernel_arg_type !4 !kernel_arg_base_type !4 !kernel_arg_type_qual !4 {
 entry:
   %0 = alloca %"class._ZTSZ4mainE3$_0.anon", align 1
-  %1 = bitcast %"class._ZTSZ4mainE3$_0.anon"* %0 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 1, i8* %1) #6
-  %2 = addrspacecast %"class._ZTSZ4mainE3$_0.anon"* %0 to %"class._ZTSZ4mainE3$_0.anon" addrspace(4)*
-  call spir_func void @"_ZZ4mainENK3$_0clEv"(%"class._ZTSZ4mainE3$_0.anon" addrspace(4)* %2)
-  %3 = bitcast %"class._ZTSZ4mainE3$_0.anon"* %0 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 1, i8* %3) #6
+  call void @llvm.lifetime.start.p0(i64 1, ptr %0) #6
+  %1 = addrspacecast ptr %0 to ptr addrspace(4)
+  call spir_func void @"_ZZ4mainENK3$_0clEv"(ptr addrspace(4) %1)
+  call void @llvm.lifetime.end.p0(i64 1, ptr %0) #6
   ret void
 }
 
 ; Function Attrs: argmemonly nounwind willreturn
-declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #1
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
 
 ; Function Attrs: inlinehint norecurse nounwind
-define internal spir_func void @"_ZZ4mainENK3$_0clEv"(%"class._ZTSZ4mainE3$_0.anon" addrspace(4)* %this) #2 align 2 {
+define internal spir_func void @"_ZZ4mainENK3$_0clEv"(ptr addrspace(4) %this) #2 align 2 {
 entry:
-  %this.addr = alloca %"class._ZTSZ4mainE3$_0.anon" addrspace(4)*, align 8
+  %this.addr = alloca ptr addrspace(4), align 8
   %a = alloca i32, align 4
   %b = alloca i32, align 4
-  store %"class._ZTSZ4mainE3$_0.anon" addrspace(4)* %this, %"class._ZTSZ4mainE3$_0.anon" addrspace(4)** %this.addr, align 8, !tbaa !5
-  %this1 = load %"class._ZTSZ4mainE3$_0.anon" addrspace(4)*, %"class._ZTSZ4mainE3$_0.anon" addrspace(4)** %this.addr, align 8
-  %0 = bitcast i32* %a to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %0) #6
+  store ptr addrspace(4) %this, ptr %this.addr, align 8, !tbaa !5
+  %this1 = load ptr addrspace(4), ptr %this.addr, align 8
+  call void @llvm.lifetime.start.p0(i64 4, ptr %a) #6
   %call = call spir_func i32 @_Z12expect_consti(i32 1)
-  store i32 %call, i32* %a, align 4, !tbaa !9
-  %1 = bitcast i32* %b to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %1) #6
+  store i32 %call, ptr %a, align 4, !tbaa !9
+  call void @llvm.lifetime.start.p0(i64 4, ptr %b) #6
   %call2 = call spir_func i32 @_Z10expect_funi(i32 2)
-  store i32 %call2, i32* %b, align 4, !tbaa !9
-  %2 = bitcast i32* %b to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %2) #6
-  %3 = bitcast i32* %a to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %3) #6
+  store i32 %call2, ptr %b, align 4, !tbaa !9
+  call void @llvm.lifetime.end.p0(i64 4, ptr %b) #6
+  call void @llvm.lifetime.end.p0(i64 4, ptr %a) #6
   ret void
 }
 
 ; Function Attrs: argmemonly nounwind willreturn
-declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #1
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
 
 ; Function Attrs: norecurse nounwind
 define spir_func i32 @_Z12expect_consti(i32 %x) #3 {
 entry:
   %retval = alloca i32, align 4
   %x.addr = alloca i32, align 4
-  store i32 %x, i32* %x.addr, align 4, !tbaa !9
-  %0 = load i32, i32* %x.addr, align 4, !tbaa !9
+  store i32 %x, ptr %x.addr, align 4, !tbaa !9
+  %0 = load i32, ptr %x.addr, align 4, !tbaa !9
   %conv = sext i32 %0 to i64
   %expval = call i64 @llvm.expect.i64(i64 %conv, i64 1)
   %tobool = icmp ne i64 %expval, 0
   br i1 %tobool, label %if.then, label %if.end
 
 if.then:                                          ; preds = %entry
-  store i32 0, i32* %retval, align 4
+  store i32 0, ptr %retval, align 4
   br label %return
 
 if.end:                                           ; preds = %entry
-  %1 = load i32, i32* %x.addr, align 4, !tbaa !9
-  store i32 %1, i32* %retval, align 4
+  %1 = load i32, ptr %x.addr, align 4, !tbaa !9
+  store i32 %1, ptr %retval, align 4
   br label %return
 
 return:                                           ; preds = %if.end, %if.then
-  %2 = load i32, i32* %retval, align 4
+  %2 = load i32, ptr %retval, align 4
   ret i32 %2
 }
 
@@ -150,8 +144,8 @@ define spir_func i32 @_Z10expect_funi(i32 %x) #3 {
 entry:
   %retval = alloca i32, align 4
   %x.addr = alloca i32, align 4
-  store i32 %x, i32* %x.addr, align 4, !tbaa !9
-  %0 = load i32, i32* %x.addr, align 4, !tbaa !9
+  store i32 %x, ptr %x.addr, align 4, !tbaa !9
+  %0 = load i32, ptr %x.addr, align 4, !tbaa !9
   %conv = sext i32 %0 to i64
   %call = call spir_func i32 @_Z3foov()
   %conv1 = sext i32 %call to i64
@@ -160,16 +154,16 @@ entry:
   br i1 %tobool, label %if.then, label %if.end
 
 if.then:                                          ; preds = %entry
-  store i32 0, i32* %retval, align 4
+  store i32 0, ptr %retval, align 4
   br label %return
 
 if.end:                                           ; preds = %entry
-  %1 = load i32, i32* %x.addr, align 4, !tbaa !9
-  store i32 %1, i32* %retval, align 4
+  %1 = load i32, ptr %x.addr, align 4, !tbaa !9
+  store i32 %1, ptr %retval, align 4
   br label %return
 
 return:                                           ; preds = %if.end, %if.then
-  %2 = load i32, i32* %retval, align 4
+  %2 = load i32, ptr %retval, align 4
   ret i32 %2
 }
 
diff --git a/test/extensions/KHR/SPV_KHR_float_controls/exec_mode_float_control_khr.ll b/test/extensions/KHR/SPV_KHR_float_controls/exec_mode_float_control_khr.ll
index 11430a8822..70a8af9042 100644
--- a/test/extensions/KHR/SPV_KHR_float_controls/exec_mode_float_control_khr.ll
+++ b/test/extensions/KHR/SPV_KHR_float_controls/exec_mode_float_control_khr.ll
@@ -59,7 +59,7 @@ entry:
 ; SPV-DAG: EntryPoint {{[0-9]+}} [[KERNEL2:[0-9]+]] "k_float_controls_2"
 ; SPV-DAG: EntryPoint {{[0-9]+}} [[KERNEL3:[0-9]+]] "k_float_controls_3"
 ; SPV-DAG: EntryPoint {{[0-9]+}} [[KERNEL4:[0-9]+]] "k_float_controls_4"
-!0 = !{void (i32, i32)* @k_float_controls_0, !"k_float_controls_0", !1, i32 0, !2, !3, !4, i32 0, i32 0}
+!0 = !{ptr @k_float_controls_0, !"k_float_controls_0", !1, i32 0, !2, !3, !4, i32 0, i32 0}
 !1 = !{i32 2, i32 2}
 !2 = !{i32 32, i32 36}
 !3 = !{i32 0, i32 0}
@@ -69,36 +69,36 @@ entry:
 !14 = !{i32 1, i32 0}
 
 ; SPV-DAG: ExecutionMode [[KERNEL0]] 4459 64
-!15 = !{void (i32, i32)* @k_float_controls_0, i32 4459, i32 64}
+!15 = !{ptr @k_float_controls_0, i32 4459, i32 64}
 ; SPV-DAG: ExecutionMode [[KERNEL0]] 4459 32
-!16 = !{void (i32, i32)* @k_float_controls_0, i32 4459, i32 32}
+!16 = !{ptr @k_float_controls_0, i32 4459, i32 32}
 ; SPV-DAG: ExecutionMode [[KERNEL0]] 4459 16
-!17 = !{void (i32, i32)* @k_float_controls_0, i32 4459, i32 16}
+!17 = !{ptr @k_float_controls_0, i32 4459, i32 16}
 
 ; SPV-DAG: ExecutionMode [[KERNEL1]] 4460 64
-!18 = !{void (i32, i32)* @k_float_controls_1, i32 4460, i32 64}
+!18 = !{ptr @k_float_controls_1, i32 4460, i32 64}
 ; SPV-DAG: ExecutionMode [[KERNEL1]] 4460 32
-!19 = !{void (i32, i32)* @k_float_controls_1, i32 4460, i32 32}
+!19 = !{ptr @k_float_controls_1, i32 4460, i32 32}
 ; SPV-DAG: ExecutionMode [[KERNEL1]] 4460 16
-!20 = !{void (i32, i32)* @k_float_controls_1, i32 4460, i32 16}
+!20 = !{ptr @k_float_controls_1, i32 4460, i32 16}
 
 ; SPV-DAG: ExecutionMode [[KERNEL2]] 4461 64
-!21 = !{void (i32, i32)* @k_float_controls_2, i32 4461, i32 64}
+!21 = !{ptr @k_float_controls_2, i32 4461, i32 64}
 ; SPV-DAG: ExecutionMode [[KERNEL2]] 4461 32
-!22 = !{void (i32, i32)* @k_float_controls_2, i32 4461, i32 32}
+!22 = !{ptr @k_float_controls_2, i32 4461, i32 32}
 ; SPV-DAG: ExecutionMode [[KERNEL2]] 4461 16
-!23 = !{void (i32, i32)* @k_float_controls_2, i32 4461, i32 16}
+!23 = !{ptr @k_float_controls_2, i32 4461, i32 16}
 
 ; SPV-DAG: ExecutionMode [[KERNEL3]] 4462 64
-!24 = !{void (i32, i32)* @k_float_controls_3, i32 4462, i32 64}
+!24 = !{ptr @k_float_controls_3, i32 4462, i32 64}
 ; SPV-DAG: ExecutionMode [[KERNEL3]] 4462 32
-!25 = !{void (i32, i32)* @k_float_controls_3, i32 4462, i32 32}
+!25 = !{ptr @k_float_controls_3, i32 4462, i32 32}
 ; SPV-DAG: ExecutionMode [[KERNEL3]] 4462 16
-!26 = !{void (i32, i32)* @k_float_controls_3, i32 4462, i32 16}
+!26 = !{ptr @k_float_controls_3, i32 4462, i32 16}
 
 ; SPV-DAG: ExecutionMode [[KERNEL4]] 4463 64
-!27 = !{void (i32, i32)* @k_float_controls_4, i32 4463, i32 64}
+!27 = !{ptr @k_float_controls_4, i32 4463, i32 64}
 ; SPV-DAG: ExecutionMode [[KERNEL4]] 4463 32
-!28 = !{void (i32, i32)* @k_float_controls_4, i32 4463, i32 32}
+!28 = !{ptr @k_float_controls_4, i32 4463, i32 32}
 ; SPV-DAG: ExecutionMode [[KERNEL4]] 4463 16
-!29 = !{void (i32, i32)* @k_float_controls_4, i32 4463, i32 16}
+!29 = !{ptr @k_float_controls_4, i32 4463, i32 16}
diff --git a/test/extensions/KHR/SPV_KHR_linkonce_odr/LinkOnceODR.ll b/test/extensions/KHR/SPV_KHR_linkonce_odr/LinkOnceODR.ll
index e46b62f96a..bd441c2802 100644
--- a/test/extensions/KHR/SPV_KHR_linkonce_odr/LinkOnceODR.ll
+++ b/test/extensions/KHR/SPV_KHR_linkonce_odr/LinkOnceODR.ll
@@ -33,9 +33,9 @@ entry:
 define linkonce_odr dso_local spir_func i32 @square(i32 %in) {
 entry:
   %in.addr = alloca i32, align 4
-  store i32 %in, i32* %in.addr, align 4
-  %0 = load i32, i32* %in.addr, align 4
-  %1 = load i32, i32* %in.addr, align 4
+  store i32 %in, ptr %in.addr, align 4
+  %0 = load i32, ptr %in.addr, align 4
+  %1 = load i32, ptr %in.addr, align 4
   %mul = mul nsw i32 %0, %1
   ret i32 %mul
 }