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nled-triangle-ap102-pixel-panel-v1a.sch
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nled-triangle-ap102-pixel-panel-v1a.sch
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<schematic xreflabel="%F%N/%S.%C%R" xrefpart="/%S.%C%R">
<libraries>
<library name="ChromationSystems-2">
<packages>
<package name="APA102">
<wire x1="-2.5" y1="2.5" x2="2.5" y2="2.5" width="0.127" layer="21"/>
<wire x1="2.5" y1="2.5" x2="2.5" y2="-2.5" width="0.127" layer="51"/>
<wire x1="2.5" y1="-2.5" x2="-2.5" y2="-2.5" width="0.127" layer="21"/>
<wire x1="-2.5" y1="-2.5" x2="-2.5" y2="2.5" width="0.127" layer="51"/>
<circle x="0" y="0" radius="2.1" width="0.127" layer="51"/>
<smd name="1" x="-2" y="1.7" dx="2" dy="1.0668" layer="1"/>
<smd name="2" x="-2" y="0" dx="2" dy="1.0668" layer="1"/>
<smd name="3" x="-2" y="-1.7" dx="2" dy="1.0668" layer="1"/>
<smd name="4" x="2" y="-1.7" dx="2" dy="1.0668" layer="1"/>
<smd name="5" x="2" y="0" dx="2" dy="1.0668" layer="1"/>
<smd name="6" x="2" y="1.7" dx="2" dy="1.0668" layer="1"/>
<text x="-0.43" y="2.9" size="1.27" layer="25" font="vector">>NAME</text>
<text x="-2" y="-4.1" size="1.27" layer="27" font="vector">>VALUE</text>
<polygon width="0.127" layer="21">
<vertex x="-3.312159375" y="2.029459375"/>
<vertex x="-3.312159375" y="3.299459375"/>
<vertex x="-2.042159375" y="3.299459375"/>
</polygon>
<circle x="0" y="0" radius="0.635" width="0.127" layer="21"/>
</package>
</packages>
<symbols>
<symbol name="APA102">
<wire x1="7.62" y1="5.08" x2="7.62" y2="-5.08" width="0.254" layer="94"/>
<wire x1="7.62" y1="-5.08" x2="-7.62" y2="-5.08" width="0.254" layer="94"/>
<wire x1="-7.62" y1="-5.08" x2="-7.62" y2="5.08" width="0.254" layer="94"/>
<wire x1="-7.62" y1="5.08" x2="7.62" y2="5.08" width="0.254" layer="94"/>
<pin name="DI" x="-10.16" y="2.54" length="short"/>
<pin name="CI" x="-10.16" y="0" length="short"/>
<pin name="GND" x="-10.16" y="-2.54" length="short"/>
<pin name="VCC" x="10.16" y="-2.54" length="short" rot="R180"/>
<pin name="CO" x="10.16" y="0" length="short" rot="R180"/>
<pin name="DO" x="10.16" y="2.54" length="short" rot="R180"/>
<text x="-7.112" y="5.715" size="1.778" layer="95">>NAME</text>
<text x="-7.366" y="-7.493" size="1.778" layer="96">>VALUE</text>
</symbol>
</symbols>
<devicesets>
<deviceset name="APA102">
<gates>
<gate name="G$1" symbol="APA102" x="0" y="0"/>
</gates>
<devices>
<device name="" package="APA102">
<connects>
<connect gate="G$1" pin="CI" pad="2"/>
<connect gate="G$1" pin="CO" pad="5"/>
<connect gate="G$1" pin="DI" pad="1"/>
<connect gate="G$1" pin="DO" pad="6"/>
<connect gate="G$1" pin="GND" pad="3"/>
<connect gate="G$1" pin="VCC" pad="4"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
</devices>
</deviceset>
</devicesets>
</library>
<library name="supply1" urn="urn:adsk.eagle:library:371">
<description><b>Supply Symbols</b><p>
GND, VCC, 0V, +5V, -5V, etc.<p>
Please keep in mind, that these devices are necessary for the
automatic wiring of the supply signals.<p>
The pin name defined in the symbol is identical to the net which is to be wired automatically.<p>
In this library the device names are the same as the pin names of the symbols, therefore the correct signal names appear next to the supply symbols in the schematic.<p>
<author>Created by librarian@cadsoft.de</author></description>
<packages>
</packages>
<symbols>
<symbol name="GND" urn="urn:adsk.eagle:symbol:26925/1" library_version="1">
<wire x1="-1.905" y1="0" x2="1.905" y2="0" width="0.254" layer="94"/>
<text x="-2.54" y="-2.54" size="1.778" layer="96">>VALUE</text>
<pin name="GND" x="0" y="2.54" visible="off" length="short" direction="sup" rot="R270"/>
</symbol>
<symbol name="VCC" urn="urn:adsk.eagle:symbol:26928/1" library_version="1">
<wire x1="1.27" y1="-1.905" x2="0" y2="0" width="0.254" layer="94"/>
<wire x1="0" y1="0" x2="-1.27" y2="-1.905" width="0.254" layer="94"/>
<text x="-2.54" y="-2.54" size="1.778" layer="96" rot="R90">>VALUE</text>
<pin name="VCC" x="0" y="-2.54" visible="off" length="short" direction="sup" rot="R90"/>
</symbol>
</symbols>
<devicesets>
<deviceset name="GND" urn="urn:adsk.eagle:component:26954/1" prefix="GND" library_version="1">
<description><b>SUPPLY SYMBOL</b></description>
<gates>
<gate name="1" symbol="GND" x="0" y="0"/>
</gates>
<devices>
<device name="">
<technologies>
<technology name=""/>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="VCC" urn="urn:adsk.eagle:component:26957/1" prefix="P+" library_version="1">
<description><b>SUPPLY SYMBOL</b></description>
<gates>
<gate name="VCC" symbol="VCC" x="0" y="0"/>
</gates>
<devices>
<device name="">
<technologies>
<technology name=""/>
</technologies>
</device>
</devices>
</deviceset>
</devicesets>
</library>
<library name="frames" urn="urn:adsk.eagle:library:229">
<description><b>Frames for Sheet and Layout</b></description>
<packages>
</packages>
<symbols>
<symbol name="A5L-LOC" urn="urn:adsk.eagle:symbol:13879/1" library_version="1">
<wire x1="85.09" y1="3.81" x2="85.09" y2="24.13" width="0.1016" layer="94"/>
<wire x1="85.09" y1="24.13" x2="139.065" y2="24.13" width="0.1016" layer="94"/>
<wire x1="139.065" y1="24.13" x2="180.34" y2="24.13" width="0.1016" layer="94"/>
<wire x1="170.18" y1="3.81" x2="170.18" y2="8.89" width="0.1016" layer="94"/>
<wire x1="170.18" y1="8.89" x2="180.34" y2="8.89" width="0.1016" layer="94"/>
<wire x1="170.18" y1="8.89" x2="139.065" y2="8.89" width="0.1016" layer="94"/>
<wire x1="139.065" y1="8.89" x2="139.065" y2="3.81" width="0.1016" layer="94"/>
<wire x1="139.065" y1="8.89" x2="139.065" y2="13.97" width="0.1016" layer="94"/>
<wire x1="139.065" y1="13.97" x2="180.34" y2="13.97" width="0.1016" layer="94"/>
<wire x1="139.065" y1="13.97" x2="139.065" y2="19.05" width="0.1016" layer="94"/>
<wire x1="139.065" y1="19.05" x2="180.34" y2="19.05" width="0.1016" layer="94"/>
<wire x1="139.065" y1="19.05" x2="139.065" y2="24.13" width="0.1016" layer="94"/>
<text x="140.97" y="15.24" size="2.54" layer="94">>DRAWING_NAME</text>
<text x="140.97" y="10.16" size="2.286" layer="94">>LAST_DATE_TIME</text>
<text x="154.305" y="5.08" size="2.54" layer="94">>SHEET</text>
<text x="140.716" y="4.953" size="2.54" layer="94">Sheet:</text>
<frame x1="0" y1="0" x2="184.15" y2="133.35" columns="4" rows="4" layer="94"/>
</symbol>
</symbols>
<devicesets>
<deviceset name="DINA5_L" urn="urn:adsk.eagle:component:13932/1" prefix="FRAME" uservalue="yes" library_version="1">
<description><b>FRAME</b><p>
DIN A5, landscape with doc field</description>
<gates>
<gate name="G$1" symbol="A5L-LOC" x="0" y="0"/>
</gates>
<devices>
<device name="">
<technologies>
<technology name=""/>
</technologies>
</device>
</devices>
</deviceset>
</devicesets>
</library>
</libraries>
<attributes>
</attributes>
<variantdefs>
</variantdefs>
<classes>
<class number="0" name="default" width="0.6096" drill="0">
</class>
</classes>
<parts>
<part name="PIX1" library="ChromationSystems-2" deviceset="APA102" device=""/>
<part name="PIX2" library="ChromationSystems-2" deviceset="APA102" device=""/>
<part name="PIX3" library="ChromationSystems-2" deviceset="APA102" device=""/>
<part name="GND1" library="supply1" library_urn="urn:adsk.eagle:library:371" deviceset="GND" device=""/>
<part name="GND2" library="supply1" library_urn="urn:adsk.eagle:library:371" deviceset="GND" device=""/>
<part name="GND3" library="supply1" library_urn="urn:adsk.eagle:library:371" deviceset="GND" device=""/>
<part name="P+1" library="supply1" library_urn="urn:adsk.eagle:library:371" deviceset="VCC" device=""/>
<part name="P+2" library="supply1" library_urn="urn:adsk.eagle:library:371" deviceset="VCC" device=""/>
<part name="P+3" library="supply1" library_urn="urn:adsk.eagle:library:371" deviceset="VCC" device=""/>
<part name="FRAME1" library="frames" library_urn="urn:adsk.eagle:library:229" deviceset="DINA5_L" device=""/>
</parts>
<sheets>
<sheet>
<plain>
<text x="-7.874" y="-28.194" size="1.778" layer="91">Copyright 2018
Northern Lights Elecronic Design, LLC
Released Under:
Attribution-NonCommercial 4.0 International (CC BY-NC 4.0)
https://creativecommons.org/licenses/by-nc/4.0/legalcode
For access to commerical license, please contact Jnygaard@NLEDshop.com for details.</text>
<text x="76.2" y="-53.34" size="1.778" layer="91">Created 4/16/2018
By Jeff Nygaard
Northern Lights
Electronic Design, LLC</text>
<text x="-8.89" y="-39.37" size="1.778" layer="91">http://www.nledshop.com/apa102products/</text>
</plain>
<instances>
<instance part="PIX1" gate="G$1" x="38.1" y="35.56"/>
<instance part="PIX2" gate="G$1" x="66.04" y="35.56"/>
<instance part="PIX3" gate="G$1" x="93.98" y="35.56"/>
<instance part="GND1" gate="1" x="53.34" y="22.86"/>
<instance part="GND2" gate="1" x="81.28" y="25.4"/>
<instance part="GND3" gate="1" x="25.4" y="22.86"/>
<instance part="P+1" gate="VCC" x="50.8" y="45.72"/>
<instance part="P+2" gate="VCC" x="78.74" y="45.72"/>
<instance part="P+3" gate="VCC" x="106.68" y="45.72"/>
<instance part="FRAME1" gate="G$1" x="-20.32" y="-63.5"/>
</instances>
<busses>
</busses>
<nets>
<net name="N$1" class="0">
<segment>
<pinref part="PIX1" gate="G$1" pin="DO"/>
<pinref part="PIX2" gate="G$1" pin="DI"/>
<wire x1="48.26" y1="38.1" x2="55.88" y2="38.1" width="0.1524" layer="91"/>
</segment>
</net>
<net name="N$2" class="0">
<segment>
<pinref part="PIX2" gate="G$1" pin="CI"/>
<pinref part="PIX1" gate="G$1" pin="CO"/>
<wire x1="55.88" y1="35.56" x2="48.26" y2="35.56" width="0.1524" layer="91"/>
</segment>
</net>
<net name="N$6" class="0">
<segment>
<pinref part="PIX2" gate="G$1" pin="DO"/>
<pinref part="PIX3" gate="G$1" pin="DI"/>
<wire x1="76.2" y1="38.1" x2="83.82" y2="38.1" width="0.1524" layer="91"/>
</segment>
</net>
<net name="N$7" class="0">
<segment>
<pinref part="PIX3" gate="G$1" pin="CI"/>
<pinref part="PIX2" gate="G$1" pin="CO"/>
<wire x1="83.82" y1="35.56" x2="76.2" y2="35.56" width="0.1524" layer="91"/>
</segment>
</net>
<net name="GND" class="0">
<segment>
<pinref part="PIX2" gate="G$1" pin="GND"/>
<wire x1="55.88" y1="33.02" x2="53.34" y2="33.02" width="0.1524" layer="91"/>
<wire x1="53.34" y1="33.02" x2="53.34" y2="25.4" width="0.1524" layer="91"/>
<pinref part="GND1" gate="1" pin="GND"/>
</segment>
<segment>
<pinref part="PIX3" gate="G$1" pin="GND"/>
<wire x1="83.82" y1="33.02" x2="81.28" y2="33.02" width="0.1524" layer="91"/>
<wire x1="81.28" y1="33.02" x2="81.28" y2="27.94" width="0.1524" layer="91"/>
<pinref part="GND2" gate="1" pin="GND"/>
</segment>
<segment>
<pinref part="PIX1" gate="G$1" pin="GND"/>
<pinref part="GND3" gate="1" pin="GND"/>
<wire x1="27.94" y1="33.02" x2="25.4" y2="33.02" width="0.1524" layer="91"/>
<wire x1="25.4" y1="33.02" x2="25.4" y2="25.4" width="0.1524" layer="91"/>
</segment>
</net>
<net name="VCC" class="0">
<segment>
<pinref part="PIX1" gate="G$1" pin="VCC"/>
<wire x1="48.26" y1="33.02" x2="50.8" y2="33.02" width="0.1524" layer="91"/>
<wire x1="50.8" y1="33.02" x2="50.8" y2="43.18" width="0.1524" layer="91"/>
<pinref part="P+1" gate="VCC" pin="VCC"/>
</segment>
<segment>
<pinref part="PIX2" gate="G$1" pin="VCC"/>
<wire x1="76.2" y1="33.02" x2="78.74" y2="33.02" width="0.1524" layer="91"/>
<wire x1="78.74" y1="33.02" x2="78.74" y2="43.18" width="0.1524" layer="91"/>
<pinref part="P+2" gate="VCC" pin="VCC"/>
</segment>
<segment>
<pinref part="PIX3" gate="G$1" pin="VCC"/>
<pinref part="P+3" gate="VCC" pin="VCC"/>
<wire x1="104.14" y1="33.02" x2="106.68" y2="33.02" width="0.1524" layer="91"/>
<wire x1="106.68" y1="33.02" x2="106.68" y2="43.18" width="0.1524" layer="91"/>
</segment>
</net>
<net name="CLK-IN" class="0">
<segment>
<pinref part="PIX1" gate="G$1" pin="CI"/>
<wire x1="27.94" y1="35.56" x2="20.32" y2="35.56" width="0.1524" layer="91"/>
<label x="11.43" y="34.544" size="1.778" layer="95"/>
<junction x="20.32" y="35.56"/>
</segment>
</net>
<net name="DAT-IN" class="0">
<segment>
<pinref part="PIX1" gate="G$1" pin="DI"/>
<wire x1="27.94" y1="38.1" x2="20.32" y2="38.1" width="0.1524" layer="91"/>
<label x="11.176" y="37.084" size="1.778" layer="95"/>
<junction x="20.32" y="38.1"/>
</segment>
</net>
<net name="DAT-OUT" class="0">
<segment>
<pinref part="PIX3" gate="G$1" pin="DO"/>
<wire x1="104.14" y1="38.1" x2="116.84" y2="38.1" width="0.1524" layer="91"/>
<label x="117.602" y="37.592" size="1.778" layer="95"/>
<junction x="116.84" y="38.1"/>
</segment>
</net>
<net name="CLK-OUT" class="0">
<segment>
<pinref part="PIX3" gate="G$1" pin="CO"/>
<wire x1="104.14" y1="35.56" x2="116.84" y2="35.56" width="0.1524" layer="91"/>
<label x="117.856" y="35.052" size="1.778" layer="95"/>
<junction x="116.84" y="35.56"/>
</segment>
</net>
</nets>
</sheet>
</sheets>
</schematic>
</drawing>
<compatibility>
<note version="6.3" minversion="6.2.2" severity="warning">
Since Version 6.2.2 text objects can contain more than one line,
which will not be processed correctly with this version.
</note>
<note version="8.2" severity="warning">
Since Version 8.2, EAGLE supports online libraries. The ids
of those online libraries will not be understood (or retained)
with this version.
</note>
<note version="8.3" severity="warning">
Since Version 8.3, EAGLE supports URNs for individual library
assets (packages, symbols, and devices). The URNs of those assets
will not be understood (or retained) with this version.
</note>
</compatibility>
</eagle>