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History / FPGA Development

Revisions

  • Updated FPGA Development (mediawiki)

    @rthomp10 rthomp10 committed Jul 9, 2024
    1fdf200

  • Updated FPGA Development (mediawiki)

    @rthomp10 rthomp10 committed Jul 9, 2024
    ddaa60c

  • recommend lite edition over standard

    @rthomp10 rthomp10 committed Jan 2, 2024
    5af90eb

  • corrected quartus version recommendation

    @rthomp10 rthomp10 committed Jan 2, 2024
    51d7cce

  • added quartus prime version recommendation

    @rthomp10 rthomp10 committed Jan 2, 2024
    ee25219

  • Updated FPGA Development (mediawiki)

    @rghilduta rghilduta committed Apr 13, 2023
    c2d0739

  • Updated FPGA Development (mediawiki)

    @rthomp10 rthomp10 committed Apr 19, 2022
    e85d462

  • Updated FPGA Development (mediawiki)

    @rthomp10 rthomp10 committed Apr 19, 2022
    13839f3

  • Updated FPGA Development (mediawiki)

    @rthomp10 rthomp10 committed Apr 19, 2022
    3693b40

  • Explained how to find supported boards along with their supported revisions and sizes.

    @rthomp10 rthomp10 committed Apr 19, 2022
    9fb2103

  • Add instructions for Verilog files

    @bglod bglod committed Jan 23, 2018
    7355e74

  • Add information on how to use the revisions feature

    @thasti thasti committed May 19, 2017
    96afdb1

  • Added note about loading the FPGA with .sof files in Quartus

    @ifrasch ifrasch committed Mar 25, 2017
    a3d6a22

  • Added info about Nios software development, debugging, tips; minor fixes

    @ifrasch ifrasch committed Mar 24, 2017
    59007cf

  • Added info about adding Quartus IP to the project

    @ifrasch ifrasch committed Mar 7, 2017
    d39cdea

  • Removed some innaccurate info about adding Altera IP

    @ifrasch ifrasch committed Mar 4, 2017
    158459b

  • Added section about NIOS II software

    @ifrasch ifrasch committed Mar 3, 2017
    cba9ddd

  • Added section with instructions for adding custom VHDL/IP modules to the top level architecture

    @ifrasch ifrasch committed Mar 3, 2017
    850648c

  • Added note about clock frequency of NIOS II being 80 MHz

    @ifrasch ifrasch committed Mar 2, 2017
    626345d

  • Minor clarification

    @ifrasch ifrasch committed Aug 29, 2016
    fe2b015

  • Minor rewording.

    @ifrasch ifrasch committed Aug 19, 2016
    43501d6

  • Added link to dropped samples debugging with FPGA counter

    @ifrasch ifrasch committed Aug 19, 2016
    c0f60f0

  • Added description of sampling architecture and LED blinking tutorial.

    @ifrasch ifrasch committed Aug 19, 2016
    e952301