From 9e8706140440d79bb7040d5461e9d31ea75cc7bb Mon Sep 17 00:00:00 2001 From: Joseph Huber Date: Wed, 14 Aug 2024 13:42:46 -0500 Subject: [PATCH] [libcxx] Adjust inline assembly constraints for the AMDGPU target (#101747) Summary: These assembly constraints are illegal / invalid on the AMDGPU target. The `r` constraint is only valid on inputs and the `m` constraint isn't accepted at all. The NVPTX target can handle them because it uses a more permissive virtual machine (PTX is an IR). Simply add exceptions on the target to make these work. --- libcxx/test/support/test_macros.h | 20 +++++++++++++++----- 1 file changed, 15 insertions(+), 5 deletions(-) diff --git a/libcxx/test/support/test_macros.h b/libcxx/test/support/test_macros.h index 15fc5b69b52076..e96208c85d1d24 100644 --- a/libcxx/test/support/test_macros.h +++ b/libcxx/test/support/test_macros.h @@ -291,17 +291,27 @@ struct is_same { enum {value = 1}; }; // when optimizations are enabled. template inline Tp const& DoNotOptimize(Tp const& value) { - asm volatile("" : : "r,m"(value) : "memory"); - return value; + // The `m` constraint is invalid in the AMDGPU backend. +# if defined(__AMDGPU__) || defined(__NVPTX__) + asm volatile("" : : "r"(value) : "memory"); +# else + asm volatile("" : : "r,m"(value) : "memory"); +# endif + return value; } template inline Tp& DoNotOptimize(Tp& value) { -#if defined(__clang__) + // The `m` and `r` output constraint is invalid in the AMDGPU backend as well + // as i8 / i1 arguments, so we just capture the pointer instead. +# if defined(__AMDGPU__) + Tp* tmp = &value; + asm volatile("" : "+v"(tmp) : : "memory"); +# elif defined(__clang__) asm volatile("" : "+r,m"(value) : : "memory"); -#else +# else asm volatile("" : "+m,r"(value) : : "memory"); -#endif +# endif return value; } #else