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driver-bab.c
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driver-bab.c
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/*
* Copyright 2013 Andrew Smith
* Copyright 2013 bitfury
*
* BitFury GPIO code based on chainminer code:
* https://github.com/bfsb/chainminer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the Free
* Software Foundation; either version 3 of the License, or (at your option)
* any later version. See COPYING for more details.
*/
#include "config.h"
#include "compat.h"
#include "miner.h"
#include "sha2.h"
#include "libbitfury.h"
/*
* Tested on RPi running both Raspbian and Arch
* with BlackArrow BitFury V1 16 chip GPIO board
*/
#ifndef LINUX
static void bab_detect(__maybe_unused bool hotplug)
{
}
#else
#include <unistd.h>
#include <linux/spi/spidev.h>
#include <sys/mman.h>
#include <sys/ioctl.h>
#include <fcntl.h>
#define BAB_SPI_BUS 0
#define BAB_SPI_CHIP 0
#define BAB_SPI_SPEED 96000
#define BAB_SPI_BUFSIZ 1024
#define BAB_ADDR(_n) (*((babinfo->gpio) + (_n)))
#define BAB_INP_GPIO(_n) BAB_ADDR((_n) / 10) &= (~(7 << (((_n) % 10) * 3)))
#define BAB_OUT_GPIO(_n) BAB_ADDR((_n) / 10) |= (1 << (((_n) % 10) * 3))
#define BAB_OUT_GPIO_V(_n, _v) BAB_ADDR((_n) / 10) |= (((_v) <= 3 ? (_v) + 4 : \
((_v) == 4 ? 3 : 2)) << (((_n) % 10) * 3))
#define BAB_GPIO_SET BAB_ADDR(7)
#define BAB_GPIO_CLR BAB_ADDR(10)
#define BAB_GPIO_LEVEL BAB_ADDR(13)
#define BAB_MAXCHIPS 256
#define BAB_MAXBUF (BAB_MAXCHIPS * 512)
#define BAB_MAXBANKS 4
#define BAB_CORES 16
#define BAB_X_COORD 21
#define BAB_Y_COORD 36
#define BAB_BREAK ((uint8_t *)"\04")
#define BAB_ASYNC ((uint8_t *)"\05")
#define BAB_SYNC ((uint8_t *)"\06")
#define BAB_FFL " - from %s %s() line %d"
#define BAB_FFL_HERE __FILE__, __func__, __LINE__
#define BAB_FFL_PASS file, func, line
#define bab_reset(_bank, _times) _bab_reset(babcgpu, babinfo, _bank, _times)
#define bab_txrx(_buf, _siz, _det) _bab_txrx(babcgpu, babinfo, _buf, _siz, _det, BAB_FFL_HERE)
#define bab_add_buf(_data) _bab_add_buf(babcgpu, babinfo, _data, sizeof(_data)-1, BAB_FFL_HERE)
#define BAB_ADD_BREAK() _bab_add_buf(babcgpu, babinfo, BAB_BREAK, 1, BAB_FFL_HERE)
#define BAB_ADD_ASYNC() _bab_add_buf(babcgpu, babinfo, BAB_ASYNC, 1, BAB_FFL_HERE)
#define bab_config_reg(_reg, _ena) _bab_config_reg(babcgpu, babinfo, _reg, _ena, BAB_FFL_HERE)
#define bab_add_data(_addr, _data, _siz) _bab_add_data(babcgpu, babinfo, _addr, (const uint8_t *)(_data), _siz, BAB_FFL_HERE)
#define BAB_ADD_MIN 4
#define BAB_ADD_MAX 128
#define BAB_STATE_DONE 0
#define BAB_STATE_READY 1
#define BAB_STATE_SENDING 2
#define BAB_STATE_SENT 3
#define BAB_STATE_READING 4
#define BAB_SPI_BUFFERS 2
#define BAB_BASEA 4
#define BAB_BASEB 61
#define BAB_COUNTERS 16
static const uint8_t bab_counters[BAB_COUNTERS] = {
64, 64,
BAB_BASEA, BAB_BASEA+4,
BAB_BASEA+2, BAB_BASEA+2+16,
BAB_BASEA, BAB_BASEA+1,
(BAB_BASEB)%65, (BAB_BASEB+1)%65,
(BAB_BASEB+3)%65, (BAB_BASEB+3+16)%65,
(BAB_BASEB+4)%65, (BAB_BASEB+4+4)%65,
(BAB_BASEB+3+3)%65, (BAB_BASEB+3+1+3)%65
};
#define BAB_W1 16
static const uint32_t bab_w1[BAB_W1] = {
0, 0, 0, 0xffffffff,
0x80000000, 0, 0, 0,
0, 0, 0, 0,
0, 0, 0, 0x00000280
};
#define BAB_W2 8
static const uint32_t bab_w2[BAB_W2] = {
0x80000000, 0, 0, 0,
0, 0, 0, 0x00000100
};
#define BAB_TEST_DATA 19
static const uint32_t bab_test_data[BAB_TEST_DATA] = {
0xb0e72d8e, 0x1dc5b862, 0xe9e7c4a6, 0x3050f1f5,
0x8a1a6b7e, 0x7ec384e8, 0x42c1c3fc, 0x8ed158a1,
0x8a1a6b7e, 0x6f484872, 0x4ff0bb9b, 0x12c97f07,
0xb0e72d8e, 0x55d979bc, 0x39403296, 0x40f09e84,
0x8a0bb7b7, 0x33af304f, 0x0b290c1a //, 0xf0c4e61f
};
//maximum number of chips on alternative bank
// #define BANKCHIPS 64
/*
* maximum chip speed available for auto tuner
* speed/nrate/hrate/watt
* 53/ 97/ 100/ 84
* 54/ 98/ 107/ 88
* 55/ 99/ 115/ 93
* 56/ 101/ 125/ 99
*/
#define BAB_MAXSPEED 57
#define BAB_DEFSPEED 54
#define BAB_MINSPEED 52
#define MIDSTATE_BYTES 32
#define MERKLE_OFFSET 64
#define MERKLE_BYTES 12
#define BLOCK_HEADER_BYTES 80
#define MIDSTATE_UINTS (MIDSTATE_BYTES / sizeof(uint32_t))
#define DATA_UINTS ((BLOCK_HEADER_BYTES / sizeof(uint32_t)) - 1)
// Auto adjust
#define BAB_AUTO_REG 0
#define BAB_AUTO_VAL 0x01
// iclk
#define BAB_ICLK_REG 1
#define BAB_ICLK_VAL 0x02
// No fast clock
#define BAB_FAST_REG 2
#define BAB_FAST_VAL 0x04
// Divide by 2
#define BAB_DIV2_REG 3
#define BAB_DIV2_VAL 0x08
// Slow Clock
#define BAB_SLOW_REG 4
#define BAB_SLOW_VAL 0x10
// No oclk
#define BAB_OCLK_REG 6
#define BAB_OCLK_VAL 0x20
// Has configured
#define BAB_CFGD_VAL 0x40
#define BAB_DEFCONF (BAB_AUTO_VAL | \
BAB_ICLK_VAL | \
BAB_DIV2_VAL | \
BAB_SLOW_VAL)
#define BAB_REG_CLR_FROM 7
#define BAB_REG_CLR_TO 11
#define BAB_AUTO_SET(_c) ((_c) & BAB_AUTO_VAL)
#define BAB_ICLK_SET(_c) ((_c) & BAB_ICLK_VAL)
#define BAB_FAST_SET(_c) ((_c) & BAB_FAST_VAL)
#define BAB_DIV2_SET(_c) ((_c) & BAB_DIV2_VAL)
#define BAB_SLOW_SET(_c) ((_c) & BAB_SLOW_VAL)
#define BAB_OCLK_SET(_c) ((_c) & BAB_OCLK_VAL)
#define BAB_CFGD_SET(_c) ((_c) & BAB_CFGD_VAL)
#define BAB_AUTO_BIT(_c) (BAB_AUTO_SET(_c) ? true : false)
#define BAB_ICLK_BIT(_c) (BAB_ICLK_SET(_c) ? false : true)
#define BAB_FAST_BIT(_c) (BAB_FAST_SET(_c) ? true : false)
#define BAB_DIV2_BIT(_c) (BAB_DIV2_SET(_c) ? false : true)
#define BAB_SLOW_BIT(_c) (BAB_SLOW_SET(_c) ? true : false)
#define BAB_OCLK_BIT(_c) (BAB_OCLK_SET(_c) ? true : false)
#define BAB_COUNT_ADDR 0x0100
#define BAB_W1A_ADDR 0x1000
#define BAB_W1B_ADDR 0x1400
#define BAB_W2_ADDR 0x1900
#define BAB_INP_ADDR 0x3000
#define BAB_OSC_ADDR 0x6000
#define BAB_REG_ADDR 0x7000
/*
* valid: 0x01 0x03 0x07 0x0F 0x1F 0x3F 0x7F 0xFF
* max { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x7F, 0x00 }
* max { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x3F, 0x00 }
* avg { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0x00, 0x00 }
* slo { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x3F, 0x00 }
* min { 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }
* good: 0x1F (97) 0x3F (104) 0x7F (109) 0xFF (104)
*/
#define BAB_OSC 8
static const uint8_t bab_osc_bits[BAB_OSC] =
{ 0x01, 0x03, 0x07, 0x0F, 0x1F, 0x3F, 0x7F, 0xFF };
static const uint8_t bab_reg_ena[4] = { 0xc1, 0x6a, 0x59, 0xe3 };
static const uint8_t bab_reg_dis[4] = { 0x00, 0x00, 0x00, 0x00 };
#define BAB_NONCE_OFFSETS 3
static const uint32_t bab_nonce_offsets[] = {-0x800000, 0, -0x400000};
struct bab_work_send {
uint32_t midstate[MIDSTATE_UINTS];
uint32_t ms3steps[MIDSTATE_UINTS];
uint32_t merkle7;
uint32_t ntime;
uint32_t bits;
};
#define BAB_REPLY_NONCES 16
struct bab_work_reply {
uint32_t nonce[BAB_REPLY_NONCES];
uint32_t jobsel;
};
#define MAX_BLISTS 4096
typedef struct blist {
struct blist *prev;
struct blist *next;
struct work *work;
int nonces;
} BLIST;
#define MAX_RLISTS 256
typedef struct rlist {
struct rlist *prev;
struct rlist *next;
int chip;
uint32_t nonce;
bool first_second;
} RLIST;
struct bab_info {
struct thr_info spi_thr;
struct thr_info res_thr;
pthread_mutex_t spi_lock;
pthread_mutex_t res_lock;
pthread_mutex_t did_lock;
cglock_t blist_lock;
// All GPIO goes through this
volatile unsigned *gpio;
int spifd;
int chips;
uint32_t chip_spis[BAB_MAXCHIPS+1];
int buffer;
int buf_status[BAB_SPI_BUFFERS];
uint8_t buf_write[BAB_SPI_BUFFERS][BAB_MAXBUF];
uint8_t buf_read[BAB_SPI_BUFFERS][BAB_MAXBUF];
uint32_t buf_used[BAB_SPI_BUFFERS];
uint32_t chip_off[BAB_SPI_BUFFERS][BAB_MAXCHIPS+1];
uint32_t bank_off[BAB_SPI_BUFFERS][BAB_MAXBANKS+2];
struct bab_work_send chip_input[BAB_MAXCHIPS];
struct bab_work_reply chip_results[BAB_MAXCHIPS];
struct bab_work_reply chip_prev[BAB_MAXCHIPS];
uint8_t chip_fast[BAB_MAXCHIPS];
uint8_t chip_conf[BAB_MAXCHIPS];
uint8_t old_fast[BAB_MAXCHIPS];
uint8_t old_conf[BAB_MAXCHIPS];
uint8_t chip_bank[BAB_MAXCHIPS+1];
uint8_t osc[BAB_OSC];
int fixchip;
/*
* Ignore errors in the first work reply since
* they may be from a previous run or random junk
* There can be >100 with just a 16 chip board
*/
uint32_t initial_ignored;
bool nonce_before[BAB_MAXCHIPS];
bool not_first_reply[BAB_MAXCHIPS];
// Stats
struct timeval chip_start[BAB_MAXCHIPS];
int chip_busy[BAB_MAXCHIPS];
uint64_t core_good[BAB_MAXCHIPS][BAB_CORES];
uint64_t core_bad[BAB_MAXCHIPS][BAB_CORES];
uint64_t chip_spie[BAB_MAXCHIPS]; // spi errors
uint64_t chip_miso[BAB_MAXCHIPS]; // msio errors
uint64_t chip_nonces[BAB_MAXCHIPS];
uint64_t chip_good[BAB_MAXCHIPS];
uint64_t chip_bad[BAB_MAXCHIPS];
uint64_t chip_ncore[BAB_MAXCHIPS][BAB_X_COORD][BAB_Y_COORD];
uint64_t untested_nonces;
uint64_t tested_nonces;
uint64_t new_nonces;
uint64_t ok_nonces;
uint64_t nonce_offset_count[BAB_NONCE_OFFSETS];
uint64_t total_tests;
uint64_t max_tests_per_nonce;
uint64_t total_links;
uint64_t max_links;
int blist_count;
int bfree_count;
int work_count;
int chip_count;
BLIST *bfree_list;
BLIST *work_list;
BLIST *chip_list[BAB_MAXCHIPS];
int rlist_count;
int rfree_count;
int res_count;
RLIST *rfree_list;
RLIST *res_list_head;
RLIST *res_list_tail;
struct timeval last_did;
bool initialised;
};
static BLIST *new_blist_set(struct cgpu_info *babcgpu)
{
struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
BLIST *blist = NULL;
int i;
blist = calloc(MAX_BLISTS, sizeof(*blist));
if (!blist)
quithere(1, "Failed to calloc blist - when old count=%d", babinfo->blist_count);
babinfo->blist_count += MAX_BLISTS;
babinfo->bfree_count = MAX_BLISTS;
blist[0].prev = NULL;
blist[0].next = &(blist[1]);
for (i = 1; i < MAX_BLISTS-1; i++) {
blist[i].prev = &blist[i-1];
blist[i].next = &blist[i+1];
}
blist[MAX_BLISTS-1].prev = &(blist[MAX_BLISTS-2]);
blist[MAX_BLISTS-1].next = NULL;
return blist;
}
static BLIST *next_work(struct cgpu_info *babcgpu, int chip)
{
struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
BLIST *bitem;
cg_wlock(&babinfo->blist_lock);
bitem = babinfo->work_list;
if (bitem) {
// Unlink it from work
if (bitem->next)
bitem->next->prev = NULL;
babinfo->work_list = bitem->next;
babinfo->work_count--;
// Add it to the chip
bitem->next = babinfo->chip_list[chip];
bitem->prev = NULL;
if (bitem->next)
bitem->next->prev = bitem;
babinfo->chip_list[chip] = bitem;
babinfo->chip_count++;
}
cg_wunlock(&babinfo->blist_lock);
return bitem;
}
static void discard_last(struct cgpu_info *babcgpu, int chip)
{
struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
BLIST *bitem;
cg_wlock(&babinfo->blist_lock);
bitem = babinfo->chip_list[chip];
if (bitem) {
// Unlink it from the chip
if (bitem->next)
bitem->next->prev = NULL;
babinfo->chip_list[chip] = bitem->next;
babinfo->chip_count--;
// Put it in the free list
bitem->next = babinfo->bfree_list;
bitem->prev = NULL;
if (bitem->next)
bitem->next->prev = bitem;
babinfo->bfree_list = bitem;
babinfo->bfree_count++;
}
cg_wunlock(&babinfo->blist_lock);
}
static BLIST *store_work(struct cgpu_info *babcgpu, struct work *work)
{
struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
BLIST *bitem = NULL;
int ran_out = 0;
cg_wlock(&babinfo->blist_lock);
if (babinfo->bfree_list == NULL) {
ran_out = babinfo->blist_count;
babinfo->bfree_list = new_blist_set(babcgpu);
}
// unlink from free
bitem = babinfo->bfree_list;
babinfo->bfree_list = babinfo->bfree_list->next;
if (babinfo->bfree_list)
babinfo->bfree_list->prev = NULL;
babinfo->bfree_count--;
// add to work
bitem->next = babinfo->work_list;
bitem->prev = NULL;
if (bitem->next)
bitem->next->prev = bitem;
babinfo->work_list = bitem;
babinfo->work_count++;
bitem->work = work;
bitem->nonces = 0;
cg_wunlock(&babinfo->blist_lock);
if (ran_out > 0) {
applog(LOG_ERR, "%s%i: BLIST used count exceeded %d, now %d (work=%d chip=%d)",
babcgpu->drv->name, babcgpu->device_id,
ran_out, babinfo->blist_count,
babinfo->work_count,
babinfo->chip_count);
}
return bitem;
}
static void free_blist(struct cgpu_info *babcgpu, BLIST *bhead, int chip)
{
struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
struct work *work;
BLIST *bitem;
if (!bhead)
return;
// Unlink it from the chip
cg_wlock(&babinfo->blist_lock);
if (unlikely(bhead == babinfo->chip_list[chip])) {
// Removing the chip head is an error
bhead = bhead->next;
babinfo->chip_list[chip]->next = NULL;
} else
bhead->prev->next = NULL;
bitem = bhead;
while (bitem) {
babinfo->chip_count--;
bitem = bitem->next;
}
cg_wunlock(&babinfo->blist_lock);
while (bhead) {
bitem = bhead;
bhead = bitem->next;
// add to free
cg_wlock(&babinfo->blist_lock);
bitem->next = babinfo->bfree_list;
if (babinfo->bfree_list)
babinfo->bfree_list->prev = bitem;
bitem->prev = NULL;
babinfo->bfree_list = bitem;
babinfo->bfree_count++;
work = bitem->work;
cg_wunlock(&babinfo->blist_lock);
work_completed(babcgpu, work);
}
}
static RLIST *new_rlist_set(struct cgpu_info *babcgpu)
{
struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
RLIST *rlist = NULL;
int i;
rlist = calloc(MAX_RLISTS, sizeof(*rlist));
if (!rlist)
quithere(1, "Failed to calloc rlist - when old count=%d", babinfo->rlist_count);
babinfo->rlist_count += MAX_RLISTS;
babinfo->rfree_count = MAX_RLISTS;
rlist[0].prev = NULL;
rlist[0].next = &(rlist[1]);
for (i = 1; i < MAX_RLISTS-1; i++) {
rlist[i].prev = &rlist[i-1];
rlist[i].next = &rlist[i+1];
}
rlist[MAX_RLISTS-1].prev = &(rlist[MAX_RLISTS-2]);
rlist[MAX_RLISTS-1].next = NULL;
return rlist;
}
static RLIST *store_nonce(struct cgpu_info *babcgpu, int chip, uint32_t nonce, bool first_second)
{
struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
RLIST *ritem = NULL;
int ran_out = 0;
mutex_lock(&(babinfo->res_lock));
if (babinfo->rfree_list == NULL) {
ran_out = babinfo->rlist_count;
babinfo->rfree_list = new_rlist_set(babcgpu);
}
// unlink from rfree
ritem = babinfo->rfree_list;
babinfo->rfree_list = babinfo->rfree_list->next;
if (babinfo->rfree_list)
babinfo->rfree_list->prev = NULL;
babinfo->rfree_count--;
// add to head of results
ritem->next = babinfo->res_list_head;
ritem->prev = NULL;
babinfo->res_list_head = ritem;
if (ritem->next)
ritem->next->prev = ritem;
else
babinfo->res_list_tail = ritem;
babinfo->res_count++;
ritem->chip = chip;
ritem->nonce = nonce;
ritem->first_second = first_second;
mutex_unlock(&(babinfo->res_lock));
if (ran_out > 0) {
applog(LOG_ERR, "%s%i: RLIST used count exceeded %d, now %d (work=%d chip=%d)",
babcgpu->drv->name, babcgpu->device_id,
ran_out, babinfo->rlist_count,
babinfo->work_count,
babinfo->chip_count);
}
return ritem;
}
static bool oldest_nonce(struct cgpu_info *babcgpu, int *chip, uint32_t *nonce, bool *first_second)
{
struct bab_info *babinfo = (struct bab_info *)(babcgpu->device_data);
RLIST *ritem = NULL;
bool found = false;
mutex_lock(&(babinfo->res_lock));
if (babinfo->res_list_tail) {
// unlink from res
ritem = babinfo->res_list_tail;
if (ritem->prev) {
ritem->prev->next = NULL;
babinfo->res_list_tail = ritem->prev;
} else
babinfo->res_list_head = babinfo->res_list_tail = NULL;
babinfo->res_count--;
found = true;
*chip = ritem->chip;
*nonce = ritem->nonce;
*first_second = ritem->first_second;
// add to rfree
ritem->next = babinfo->rfree_list;
ritem->prev = NULL;
if (ritem->next)
ritem->next->prev = ritem;
babinfo->rfree_list = ritem;
babinfo->rfree_count++;
}
mutex_unlock(&(babinfo->res_lock));
return found;
}
static void _bab_reset(__maybe_unused struct cgpu_info *babcgpu, struct bab_info *babinfo, int bank, int times)
{
const int banks[4] = { 18, 23, 24, 25 };
int i;
BAB_INP_GPIO(10);
BAB_OUT_GPIO(10);
BAB_INP_GPIO(11);
BAB_OUT_GPIO(11);
if (bank) {
for (i = 0; i < 4; i++) {
BAB_INP_GPIO(banks[i]);
BAB_OUT_GPIO(banks[i]);
if (bank == i+1)
BAB_GPIO_SET = 1 << banks[i];
else
BAB_GPIO_CLR = 1 << banks[i];
}
cgsleep_us(4096);
} else {
for (i = 0; i < 4; i++)
BAB_INP_GPIO(banks[i]);
}
BAB_GPIO_SET = 1 << 11;
for (i = 0; i < times; i++) { // 1us = 1MHz
BAB_GPIO_SET = 1 << 10;
cgsleep_us(1);
BAB_GPIO_CLR = 1 << 10;
cgsleep_us(1);
}
BAB_GPIO_CLR = 1 << 11;
BAB_INP_GPIO(11);
BAB_INP_GPIO(10);
BAB_INP_GPIO(9);
BAB_OUT_GPIO_V(11, 0);
BAB_OUT_GPIO_V(10, 0);
BAB_OUT_GPIO_V(9, 0);
}
// TODO: handle a false return where this is called?
static bool _bab_txrx(struct cgpu_info *babcgpu, struct bab_info *babinfo, int buf, uint32_t siz, bool detect_ignore, const char *file, const char *func, const int line)
{
int bank, i;
uint32_t pos;
struct spi_ioc_transfer tran;
uintptr_t rbuf, wbuf;
wbuf = (uintptr_t)(babinfo->buf_write[buf]);
rbuf = (uintptr_t)(babinfo->buf_read[buf]);
memset(&tran, 0, sizeof(tran));
tran.delay_usecs = 0;
tran.speed_hz = BAB_SPI_SPEED;
i = 0;
pos = 0;
for (bank = 0; bank <= BAB_MAXBANKS; bank++) {
if (babinfo->bank_off[buf][bank]) {
bab_reset(bank, 64);
break;
}
}
if (unlikely(bank > BAB_MAXBANKS)) {
applog(LOG_ERR, "%s%d: %s() failed to find a bank" BAB_FFL,
babcgpu->drv->name, babcgpu->device_id,
__func__, BAB_FFL_PASS);
return false;
}
while (siz > 0) {
tran.tx_buf = wbuf;
tran.rx_buf = rbuf;
tran.speed_hz = BAB_SPI_SPEED;
if (pos == babinfo->bank_off[buf][bank]) {
for (; ++bank <= BAB_MAXBANKS; ) {
if (babinfo->bank_off[buf][bank] > pos) {
bab_reset(bank, 64);
break;
}
}
}
if (siz < BAB_SPI_BUFSIZ)
tran.len = siz;
else
tran.len = BAB_SPI_BUFSIZ;
if (pos < babinfo->bank_off[buf][bank] &&
babinfo->bank_off[buf][bank] < (pos + tran.len))
tran.len = babinfo->bank_off[buf][bank] - pos;
for (; i < babinfo->chips; i++) {
if (!babinfo->chip_off[buf][i])
continue;
if (babinfo->chip_off[buf][i] >= pos + tran.len) {
tran.speed_hz = babinfo->chip_spis[i];
break;
}
}
if (unlikely(i > babinfo->chips)) {
applog(LOG_ERR, "%s%d: %s() failed to find chip" BAB_FFL,
babcgpu->drv->name, babcgpu->device_id,
__func__, BAB_FFL_PASS);
return false;
}
if (unlikely(babinfo->chip_spis[i] == BAB_SPI_SPEED)) {
applog(LOG_DEBUG, "%s%d: %s() chip[%d] speed %d shouldn't be %d" BAB_FFL,
babcgpu->drv->name, babcgpu->device_id,
__func__, i, (int)babinfo->chip_spis[i],
BAB_SPI_SPEED, BAB_FFL_PASS);
}
if (unlikely(tran.speed_hz == BAB_SPI_SPEED)) {
applog(LOG_DEBUG, "%s%d: %s() transfer speed %d shouldn't be %d" BAB_FFL,
babcgpu->drv->name, babcgpu->device_id,
__func__, (int)tran.speed_hz,
BAB_SPI_SPEED, BAB_FFL_PASS);
}
if (ioctl(babinfo->spifd, SPI_IOC_MESSAGE(1), (void *)&tran) < 0) {
if (!detect_ignore || errno != 110) {
applog(LOG_ERR, "%s%d: ioctl failed err=%d" BAB_FFL,
babcgpu->drv->name, babcgpu->device_id,
errno, BAB_FFL_PASS);
}
return false;
}
siz -= tran.len;
wbuf += tran.len;
rbuf += tran.len;
pos += tran.len;
}
mutex_lock(&(babinfo->did_lock));
cgtime(&(babinfo->last_did));
mutex_unlock(&(babinfo->did_lock));
return true;
}
static void _bab_add_buf_rev(__maybe_unused struct cgpu_info *babcgpu, struct bab_info *babinfo, const uint8_t *data, uint32_t siz, const char *file, const char *func, const int line)
{
uint8_t tmp;
uint32_t now_used, i;
int buf;
buf = babinfo->buffer;
now_used = babinfo->buf_used[buf];
if (now_used + siz >= BAB_MAXBUF) {
quitfrom(1, file, func, line,
"%s() buffer %d limit of %d exceeded=%d siz=%d",
__func__, buf, BAB_MAXBUF, now_used + siz, siz);
}
for (i = 0; i < siz; i++) {
tmp = data[i];
tmp = ((tmp & 0xaa)>>1) | ((tmp & 0x55) << 1);
tmp = ((tmp & 0xcc)>>2) | ((tmp & 0x33) << 2);
tmp = ((tmp & 0xf0)>>4) | ((tmp & 0x0f) << 4);
babinfo->buf_write[buf][now_used + i] = tmp;
}
babinfo->buf_used[buf] += siz;
}
static void _bab_add_buf(__maybe_unused struct cgpu_info *babcgpu, struct bab_info *babinfo, const uint8_t *data, size_t siz, const char *file, const char *func, const int line)
{
uint32_t now_used;
int buf;
buf = babinfo->buffer;
now_used = babinfo->buf_used[buf];
if (now_used + siz >= BAB_MAXBUF) {
quitfrom(1, file, func, line,
"%s() buffer %d limit of %d exceeded=%d siz=%d",
__func__, buf, BAB_MAXBUF, (int)(now_used + siz), (int)siz);
}
memcpy(&(babinfo->buf_write[buf][now_used]), data, siz);
babinfo->buf_used[buf] += siz;
}
static void _bab_add_data(struct cgpu_info *babcgpu, struct bab_info *babinfo, uint32_t addr, const uint8_t *data, size_t siz, const char *file, const char *func, const int line)
{
uint8_t tmp[3];
int trf_siz;
if (siz < BAB_ADD_MIN || siz > BAB_ADD_MAX) {
quitfrom(1, file, func, line,
"%s() called with invalid siz=%d (min=%d max=%d)",
__func__, (int)siz, BAB_ADD_MIN, BAB_ADD_MAX);
}
trf_siz = siz / 4;
tmp[0] = (trf_siz - 1) | 0xE0;
tmp[1] = (addr >> 8) & 0xff;
tmp[2] = addr & 0xff;
_bab_add_buf(babcgpu, babinfo, tmp, sizeof(tmp), BAB_FFL_PASS);
_bab_add_buf_rev(babcgpu, babinfo, data, siz, BAB_FFL_PASS);
}
static void _bab_config_reg(struct cgpu_info *babcgpu, struct bab_info *babinfo, uint32_t reg, bool enable, const char *file, const char *func, const int line)
{
if (enable) {
_bab_add_data(babcgpu, babinfo, BAB_REG_ADDR + reg*32,
bab_reg_ena, sizeof(bab_reg_ena), BAB_FFL_PASS);
} else {
_bab_add_data(babcgpu, babinfo, BAB_REG_ADDR + reg*32,
bab_reg_dis, sizeof(bab_reg_dis), BAB_FFL_PASS);
}
}
static void bab_set_osc(struct bab_info *babinfo, int chip)
{
int fast, i;
fast = babinfo->chip_fast[chip];
for (i = 0; i < BAB_OSC && fast > BAB_OSC; i++, fast -= BAB_OSC) {
babinfo->osc[i] = 0xff;
}
if (i < BAB_OSC && fast > 0 && fast <= BAB_OSC)
babinfo->osc[i++] = bab_osc_bits[fast - 1];
for (; i < BAB_OSC; i++)
babinfo->osc[i] = 0x00;
applog(LOG_DEBUG, "@osc(chip=%d) fast=%d 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x", chip, fast, babinfo->osc[0], babinfo->osc[1], babinfo->osc[2], babinfo->osc[3], babinfo->osc[4], babinfo->osc[5], babinfo->osc[6], babinfo->osc[7]);
}
static bool bab_put(struct cgpu_info *babcgpu, struct bab_info *babinfo)
{
int buf, i, reg, bank = 0;
babinfo->buffer = -1;
mutex_lock(&(babinfo->spi_lock));
if (babinfo->buf_status[0] == BAB_STATE_DONE) {
babinfo->buffer = 0;
} else if (babinfo->buf_status[1] == BAB_STATE_DONE) {
babinfo->buffer = 1;
} else if (babinfo->buf_status[0] == BAB_STATE_READY) {
babinfo->buf_status[0] = BAB_STATE_DONE;
babinfo->buffer = 0;
} else if (babinfo->buf_status[1] == BAB_STATE_READY) {
babinfo->buf_status[1] = BAB_STATE_DONE;
babinfo->buffer = 1;
}
mutex_unlock(&(babinfo->spi_lock));
if (babinfo->buffer == -1)
return false;
buf = babinfo->buffer;
babinfo->buf_used[buf] = 0;
memset(babinfo->bank_off[buf], 0, sizeof(babinfo->bank_off) / BAB_SPI_BUFFERS);
BAB_ADD_BREAK();
for (i = 0; i < babinfo->chips; i++) {
if (babinfo->chip_bank[i] != bank) {
babinfo->bank_off[buf][bank] = babinfo->buf_used[buf];
bank = babinfo->chip_bank[i];
BAB_ADD_BREAK();
}
if (i == babinfo->fixchip &&
(BAB_CFGD_SET(babinfo->chip_conf[i]) ||
!babinfo->chip_conf[i])) {
bab_set_osc(babinfo, i);
bab_add_data(BAB_OSC_ADDR, babinfo->osc, sizeof(babinfo->osc));
bab_config_reg(BAB_ICLK_REG, BAB_ICLK_BIT(babinfo->chip_conf[i]));
bab_config_reg(BAB_FAST_REG, BAB_FAST_BIT(babinfo->chip_conf[i]));
bab_config_reg(BAB_DIV2_REG, BAB_DIV2_BIT(babinfo->chip_conf[i]));
bab_config_reg(BAB_SLOW_REG, BAB_SLOW_BIT(babinfo->chip_conf[i]));
bab_config_reg(BAB_OCLK_REG, BAB_OCLK_BIT(babinfo->chip_conf[i]));
for (reg = BAB_REG_CLR_FROM; reg <= BAB_REG_CLR_TO; reg++)
bab_config_reg(reg, false);
if (babinfo->chip_conf[i]) {
bab_add_data(BAB_COUNT_ADDR, bab_counters, sizeof(bab_counters));
bab_add_data(BAB_W1A_ADDR, bab_w1, sizeof(bab_w1));
bab_add_data(BAB_W1B_ADDR, bab_w1, sizeof(bab_w1)/2);
bab_add_data(BAB_W2_ADDR, bab_w2, sizeof(bab_w2));
babinfo->chip_conf[i] ^= BAB_CFGD_VAL;
}
babinfo->old_fast[i] = babinfo->chip_fast[i];
babinfo->old_conf[i] = babinfo->chip_conf[i];
} else {
if (babinfo->old_fast[i] != babinfo->chip_fast[i]) {
bab_set_osc(babinfo, i);
bab_add_data(BAB_OSC_ADDR, babinfo->osc, sizeof(babinfo->osc));
babinfo->old_fast[i] = babinfo->chip_fast[i];
}
if (babinfo->old_conf[i] != babinfo->chip_conf[i]) {
if (BAB_ICLK_SET(babinfo->old_conf[i]) !=
BAB_ICLK_SET(babinfo->chip_conf[i]))
bab_config_reg(BAB_ICLK_REG,
BAB_ICLK_BIT(babinfo->chip_conf[i]));
if (BAB_FAST_SET(babinfo->old_conf[i]) !=
BAB_FAST_SET(babinfo->chip_conf[i]))
bab_config_reg(BAB_FAST_REG,
BAB_FAST_BIT(babinfo->chip_conf[i]));
if (BAB_DIV2_SET(babinfo->old_conf[i]) !=
BAB_DIV2_SET(babinfo->chip_conf[i]))
bab_config_reg(BAB_DIV2_REG,
BAB_DIV2_BIT(babinfo->chip_conf[i]));
if (BAB_SLOW_SET(babinfo->old_conf[i]) !=
BAB_SLOW_SET(babinfo->chip_conf[i]))
bab_config_reg(BAB_SLOW_REG,
BAB_SLOW_BIT(babinfo->chip_conf[i]));
if (BAB_OCLK_SET(babinfo->old_conf[i]) !=
BAB_OCLK_SET(babinfo->chip_conf[i]))
bab_config_reg(BAB_OCLK_REG,
BAB_OCLK_BIT(babinfo->chip_conf[i]));
babinfo->old_conf[i] = babinfo->chip_conf[i];
}
}
babinfo->chip_off[buf][i] = babinfo->buf_used[buf] + 3;
if (babinfo->chip_conf[i])
bab_add_data(BAB_INP_ADDR, (uint8_t *)(&(babinfo->chip_input[i])),
sizeof(babinfo->chip_input[i]));
BAB_ADD_ASYNC();
}
babinfo->chip_off[buf][i] = babinfo->buf_used[buf];
babinfo->bank_off[buf][bank] = babinfo->buf_used[buf];
mutex_lock(&(babinfo->spi_lock));
babinfo->buf_status[buf] = BAB_STATE_READY;
mutex_unlock(&(babinfo->spi_lock));
babinfo->fixchip = (babinfo->fixchip + 1) % babinfo->chips;
return true;
}
static bool bab_get(__maybe_unused struct cgpu_info *babcgpu, struct bab_info *babinfo)
{
int buf, i;
babinfo->buffer = -1;
mutex_lock(&(babinfo->spi_lock));
if (babinfo->buf_status[0] == BAB_STATE_SENT) {
babinfo->buf_status[0] = BAB_STATE_READING;
babinfo->buffer = 0;
} else if (babinfo->buf_status[1] == BAB_STATE_SENT) {
babinfo->buf_status[1] = BAB_STATE_READING;
babinfo->buffer = 1;
}
mutex_unlock(&(babinfo->spi_lock));
if (babinfo->buffer == -1)
return false;
buf = babinfo->buffer;
for (i = 0; i < babinfo->chips; i++) {
if (babinfo->chip_conf[i] & 0x7f) {
memcpy((void *)&(babinfo->chip_results[i]),
(void *)(babinfo->buf_read[buf] + babinfo->chip_off[buf][i]),
sizeof(babinfo->chip_results[0]));
}
}
mutex_lock(&(babinfo->spi_lock));
babinfo->buf_status[buf] = BAB_STATE_DONE;
mutex_unlock(&(babinfo->spi_lock));
return true;
}
void bab_detect_chips(struct cgpu_info *babcgpu, struct bab_info *babinfo, int bank, int first, int last)
{
int buf, i, reg, j;
if (sizeof(struct bab_work_send) != sizeof(bab_test_data)) {
quithere(1, "struct bab_work_send (%d) and bab_test_data (%d)"
" must be the same size",
(int)sizeof(struct bab_work_send),
(int)sizeof(bab_test_data));
}