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without bpf
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victoryang00 committed Aug 17, 2023
1 parent fb6851a commit 5912642
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Showing 5 changed files with 61 additions and 6 deletions.
4 changes: 2 additions & 2 deletions .github/workflows/cmake.yml
Original file line number Diff line number Diff line change
Expand Up @@ -2,9 +2,9 @@ name: CMake

on:
push:
branches: [ "main" ]
branches: [ "main", "asplos-dev" ]
pull_request:
branches: [ "main" ]
branches: [ "main", "asplos-dev" ]

env:
# Customize the CMake build type here (Release, Debug, RelWithDebInfo, etc.)
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1 change: 1 addition & 0 deletions artifact/gen_workloads.sh
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@@ -0,0 +1 @@
#!/bin/bash
File renamed without changes.
55 changes: 55 additions & 0 deletions artifact/mlc-sapphirerapids.txt
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@@ -0,0 +1,55 @@
Intel(R) Memory Latency Checker - v3.10
*** Unable to modify prefetchers (try executing 'modprobe msr')
*** So, enabling random access for latency measurements
Measuring idle latencies for random access (in ns)...
Numa node Numa node
Numa node 0 1
0 106.3 437.5

Measuring Peak Injection Memory Bandwidths for the system
Bandwidths are in MB/sec (1 MB/sec = 1,000,000 Bytes/sec)
Using all the threads from each core if Hyper-threading is enabled
Using traffic with the following read-write ratios
ALL Reads : 28611.9
3:1 Reads-Writes : 25057.1
2:1 Reads-Writes : 25078.0
1:1 Reads-Writes : 23965.9
Stream-triad like: 24943.3

Measuring Memory Bandwidths between nodes within system
Bandwidths are in MB/sec (1 MB/sec = 1,000,000 Bytes/sec)
Using all the threads from each core if Hyper-threading is enabled
Using Read-only traffic type
Numa node Numa node
Numa node 0 1
0 28612.0 19216.8

Measuring Loaded Latencies for the system
Using all the threads from each core if Hyper-threading is enabled
Using Read-only traffic type
Inject Latency Bandwidth
Delay (ns) MB/sec
==========================
00000 370.12 28393.2
00002 369.29 28435.4
00008 378.41 28490.5
00015 354.32 28414.2
00050 313.07 28323.0
00100 238.51 28010.5
00200 125.13 14566.0
00300 119.69 10232.0
00400 116.76 7905.3
00500 115.33 6500.4
00700 113.89 4858.3
01000 113.03 3594.6
01300 112.57 2906.9
01700 112.09 2363.9
02500 111.51 1798.9
03500 111.21 1520.8
05000 110.77 1193.2
09000 110.38 922.3
20000 110.14 735.6

Measuring cache-to-cache transfer latency (in ns)...
Local Socket L2->L2 HIT latency 67.3
Local Socket L2->L2 HITM latency 67.5
7 changes: 3 additions & 4 deletions src/incore.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -103,13 +103,12 @@ int Incore::read_cpu_elems(struct CPUElem *elem) {
}
Incore::Incore(const pid_t pid, const int cpu, struct PerfConfig *perf_config) : perf_config(perf_config) {
/* reset all pmc values */
// this->init_all_dram_rds(pid, cpu);
this->init_all_dram_rds(pid, cpu);
this->init_cpu_mem_read(pid, cpu);
this->init_cpu_l2stall(pid, cpu);
this->init_cpu_llcl_hits(pid, cpu);
this->init_cpu_llcl_miss(pid, cpu);
this->init_cpu_ebpf(pid, cpu);
// this->init_cpu_mem_write(pid, cpu);
this->init_cpu_mem_write(pid, cpu);
}
bool get_cpu_info(struct CPUInfo *cpu_info) {
char buffer[1024];
Expand All @@ -127,7 +126,7 @@ bool get_cpu_info(struct CPUInfo *cpu_info) {
buf.ibuf[1] = cpuinfo.array[3];
buf.ibuf[2] = cpuinfo.array[2];

if (strncmp(buf.cbuf, "GenuineIntel", 4 * 3) != 0) {
if (strncmp(buf.cbuf, "GenuineIntel", 12) != 0) {
LOG(ERROR) << fmt::format("We only Support Intel CPU\n");
return false;
}
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