diff --git a/fec_integration_tests/interface/interface_functions/test_database_interface.py b/fec_integration_tests/interface/interface_functions/test_database_interface.py index 34202c2254..237f892315 100644 --- a/fec_integration_tests/interface/interface_functions/test_database_interface.py +++ b/fec_integration_tests/interface/interface_functions/test_database_interface.py @@ -116,7 +116,7 @@ def _place_vertices(app_vertexes, placements): def test_database_interface(): unittest_setup() - set_config("Machine", "versions", VersionStrings.ANY.value) + set_config("Machine", "versions", VersionStrings.ANY.text) set_config("Database", "create_database", "True") set_config("Database", "create_routing_info_to_neuron_id_mapping", "True") diff --git a/unittests/data/test_simulator_data.py b/unittests/data/test_simulator_data.py index a7c719c2b1..c663d62c28 100644 --- a/unittests/data/test_simulator_data.py +++ b/unittests/data/test_simulator_data.py @@ -575,7 +575,7 @@ def test_executable_targets(self): def test_gatherer_map(self): writer = FecDataWriter.mock() - set_config("Machine", "versions", VersionStrings.FOUR_PLUS.value) + set_config("Machine", "versions", VersionStrings.FOUR_PLUS.text) with self.assertRaises(DataNotYetAvialable): FecDataView.get_gatherer_by_xy(0, 0) with self.assertRaises(DataNotYetAvialable): @@ -624,7 +624,7 @@ def test_gatherer_map(self): def test_monitor_map(self): writer = FecDataWriter.mock() - set_config("Machine", "versions", VersionStrings.FOUR_PLUS.value) + set_config("Machine", "versions", VersionStrings.FOUR_PLUS.text) self.assertFalse(FecDataView.has_monitors()) with self.assertRaises(DataNotYetAvialable): FecDataView.get_monitor_by_xy(0, 0) diff --git a/unittests/interface/buffer_management/test_buffered_database.py b/unittests/interface/buffer_management/test_buffered_database.py index e03279039b..63eaa402b4 100644 --- a/unittests/interface/buffer_management/test_buffered_database.py +++ b/unittests/interface/buffer_management/test_buffered_database.py @@ -30,7 +30,7 @@ def setUp(self): unittest_setup() def test_use_database(self): - set_config("Machine", "versions", VersionStrings.ANY.value) + set_config("Machine", "versions", VersionStrings.ANY.text) f = BufferDatabase.default_database_file() self.assertFalse(os.path.isfile(f), "no existing DB at first") @@ -52,7 +52,7 @@ def test_use_database(self): self.assertTrue(os.path.isfile(f), "DB still exists") def test_placements(self): - set_config("Machine", "versions", VersionStrings.BIG.value) + set_config("Machine", "versions", VersionStrings.BIG.text) writer = FecDataWriter.mock() info = Placements([]) p1 = Placement(SimpleMachineVertex(None, label="V1"), 1, 2, 3) diff --git a/unittests/interface/ds/test_ds.py b/unittests/interface/ds/test_ds.py index c1061fd73f..c0056d6236 100644 --- a/unittests/interface/ds/test_ds.py +++ b/unittests/interface/ds/test_ds.py @@ -55,7 +55,7 @@ def setUp(self): unittest_setup() def test_init(self): - set_config("Machine", "versions", VersionStrings.FOUR_PLUS.value) + set_config("Machine", "versions", VersionStrings.FOUR_PLUS.text) vertex1 = _TestVertexWithBinary( "off_board__system", ExecutableType.SYSTEM) with DsSqlliteDatabase() as db: @@ -63,14 +63,14 @@ def test_init(self): DataSpecificationReloader(0, 1, 2, db) def test_none_ds_vertex(self): - set_config("Machine", "versions", VersionStrings.FOUR_PLUS.value) + set_config("Machine", "versions", VersionStrings.FOUR_PLUS.text) vertex = SimpleMachineVertex(0) with DsSqlliteDatabase() as db: with self.assertRaises(AttributeError): DataSpecificationGenerator(0, 1, 2, vertex, db) def test_bad_x_y_ds_vertex(self): - set_config("Machine", "versions", VersionStrings.FOUR_PLUS.value) + set_config("Machine", "versions", VersionStrings.FOUR_PLUS.text) vertex = _TestVertexWithBinary( "off_board__system", ExecutableType.SYSTEM) width, height = FecDataView.get_machine_version().board_shape @@ -80,7 +80,7 @@ def test_bad_x_y_ds_vertex(self): DataSpecificationGenerator(width, height, 2, vertex, db) def test_repeat_x_y_ds_vertex(self): - set_config("Machine", "versions", VersionStrings.FOUR_PLUS.value) + set_config("Machine", "versions", VersionStrings.FOUR_PLUS.text) vertex1 = _TestVertexWithBinary( "v1", ExecutableType.SYSTEM) vertex2 = _TestVertexWithBinary( @@ -115,7 +115,7 @@ def test_core_infos(self): self.assertEqual(app_infos, db.get_core_infos(False)) def test_bad_ethernet(self): - set_config("Machine", "versions", VersionStrings.ANY.value) + set_config("Machine", "versions", VersionStrings.ANY.text) router = Router([], 123) width, height = FecDataView.get_machine_version().board_shape bad = Chip(width, height, 15, router, 100, 8, 8) @@ -127,7 +127,7 @@ def test_bad_ethernet(self): DataSpecificationGenerator(width, height, 2, vertex, db) def test_reserve_memory_region(self): - set_config("Machine", "versions", VersionStrings.FOUR_PLUS.value) + set_config("Machine", "versions", VersionStrings.FOUR_PLUS.text) vertex = _TestVertexWithBinary( "binary", ExecutableType.SYSTEM) with DsSqlliteDatabase() as db: @@ -169,7 +169,7 @@ def test_reserve_memory_region(self): self.assertEqual(0, db.get_total_regions_size(0, 1, 3)) def test_switch_write_focus(self): - set_config("Machine", "versions", VersionStrings.ANY.value) + set_config("Machine", "versions", VersionStrings.ANY.text) vertex = _TestVertexWithBinary( "binary", ExecutableType.SYSTEM) with DsSqlliteDatabase() as db: @@ -183,7 +183,7 @@ def test_switch_write_focus(self): dsg.switch_write_focus(8) def test_pointers(self): - set_config("Machine", "versions", VersionStrings.FOUR_PLUS.value) + set_config("Machine", "versions", VersionStrings.FOUR_PLUS.text) # You can use a reference before defining it vertex = _TestVertexWithBinary( "binary1", ExecutableType.SYSTEM) @@ -249,7 +249,7 @@ def test_pointers(self): db.get_region_pointer(1, 2, 3, 9) def test_write(self): - set_config("Machine", "versions", VersionStrings.FOUR_PLUS.value) + set_config("Machine", "versions", VersionStrings.FOUR_PLUS.text) vertex = _TestVertexWithBinary( "binary", ExecutableType.SYSTEM) @@ -302,7 +302,7 @@ def test_write(self): 0, 1, 4, 5, bytearray(b'\x0c\x00\x00\x00'), "test") def test_ds_cores(self): - set_config("Machine", "versions", VersionStrings.FOUR_PLUS.value) + set_config("Machine", "versions", VersionStrings.FOUR_PLUS.text) vertex = _TestVertexWithBinary( "binary", ExecutableType.SYSTEM) with DsSqlliteDatabase() as db: @@ -320,7 +320,7 @@ def test_ds_cores(self): self.assertIn((1, 0, 3), cores) def test_memory_to_write(self): - set_config("Machine", "versions", VersionStrings.FOUR_PLUS.value) + set_config("Machine", "versions", VersionStrings.FOUR_PLUS.text) vertex = _TestVertexWithBinary( "binary", ExecutableType.SYSTEM) with DsSqlliteDatabase() as db: diff --git a/unittests/interface/interface_functions/test_front_end_common_dsg_region_reloader.py b/unittests/interface/interface_functions/test_front_end_common_dsg_region_reloader.py index df781a8797..749e7479d4 100644 --- a/unittests/interface/interface_functions/test_front_end_common_dsg_region_reloader.py +++ b/unittests/interface/interface_functions/test_front_end_common_dsg_region_reloader.py @@ -130,7 +130,7 @@ class TestFrontEndCommonDSGRegionReloader(unittest.TestCase): def setUp(self): unittest_setup() - set_config("Machine", "versions", VersionStrings.ANY.value) + set_config("Machine", "versions", VersionStrings.ANY.text) def test_with_good_sizes(self): """ Test that an application vertex's data is rewritten correctly diff --git a/unittests/interface/interface_functions/test_load_data_specification.py b/unittests/interface/interface_functions/test_load_data_specification.py index 22dd96cf16..9a46ab88db 100644 --- a/unittests/interface/interface_functions/test_load_data_specification.py +++ b/unittests/interface/interface_functions/test_load_data_specification.py @@ -96,7 +96,7 @@ def setUp(self): set_config("Machine", "enable_advanced_monitor_support", "False") def test_call(self): - set_config("Machine", "versions", VersionStrings.ANY.value) + set_config("Machine", "versions", VersionStrings.ANY.text) writer = FecDataWriter.mock() transceiver = _MockTransceiver() writer.set_transceiver(transceiver) @@ -163,7 +163,7 @@ def test_call(self): header_and_table_size + 16) def test_multi_spec_with_references(self): - set_config("Machine", "versions", VersionStrings.ANY.value) + set_config("Machine", "versions", VersionStrings.ANY.text) writer = FecDataWriter.mock() transceiver = _MockTransceiver() writer.set_transceiver(transceiver) @@ -237,7 +237,7 @@ def test_multi_spec_with_references(self): self.assertEqual(header_data[2][2 * 3], header_data[1][2 * 3]) def test_multispec_with_reference_error(self): - set_config("Machine", "versions", VersionStrings.ANY.value) + set_config("Machine", "versions", VersionStrings.ANY.text) writer = FecDataWriter.mock() transceiver = _MockTransceiver() writer.set_transceiver(transceiver) @@ -265,7 +265,7 @@ def test_multispec_with_reference_error(self): load_application_data_specs() def test_multispec_with_double_reference(self): - set_config("Machine", "versions", VersionStrings.ANY.value) + set_config("Machine", "versions", VersionStrings.ANY.text) writer = FecDataWriter.mock() transceiver = _MockTransceiver() writer.set_transceiver(transceiver) @@ -279,7 +279,7 @@ def test_multispec_with_double_reference(self): spec.reserve_memory_region(1, 12, reference=1) def test_multispec_with_wrong_chip_reference(self): - set_config("Machine", "versions", VersionStrings.FOUR_PLUS.value) + set_config("Machine", "versions", VersionStrings.FOUR_PLUS.text) writer = FecDataWriter.mock() transceiver = _MockTransceiver() writer.set_transceiver(transceiver)