diff --git a/.github/workflows/python_actions.yml b/.github/workflows/python_actions.yml index 883873b..eb1e109 100644 --- a/.github/workflows/python_actions.yml +++ b/.github/workflows/python_actions.yml @@ -45,7 +45,8 @@ jobs: python-version: ${{ matrix.python-version }} - name: Install pip, etc uses: ./support/actions/python-tools - + - name: Install mypy + run: pip install mypy - name: Install Spinnaker Dependencies uses: ./support/actions/install-spinn-deps with: @@ -91,3 +92,6 @@ jobs: # uses: ./support/actions/sphinx # with: # directory: doc/source + + - name: Lint with mypy + run: mypy spinn_pdp2 diff --git a/__init__.py b/__init__.py deleted file mode 100644 index c617e64..0000000 --- a/__init__.py +++ /dev/null @@ -1,15 +0,0 @@ -# Copyright (c) 2015 The University of Manchester -# -# This program is free software: you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation, either version 3 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program. If not, see . - diff --git a/spinn_pdp2/input_vertex.py b/spinn_pdp2/input_vertex.py index 1c6460e..1ad1184 100644 --- a/spinn_pdp2/input_vertex.py +++ b/spinn_pdp2/input_vertex.py @@ -14,8 +14,12 @@ # along with this program. If not, see . import struct +from typing import Iterable, Optional + +from spinn_machine.tags import IPTag, ReverseIPTag from pacman.model.graphs.machine.machine_vertex import MachineVertex +from pacman.model.placements import Placement from pacman.model.resources import ConstantSDRAM from spinn_utilities.overrides import overrides @@ -25,7 +29,8 @@ from spinn_front_end_common.abstract_models.impl \ import MachineDataSpecableVertex from spinn_front_end_common.data import FecDataView -from spinn_front_end_common.interface.ds import DataType +from spinn_front_end_common.interface.ds import ( + DataSpecificationGenerator, DataSpecificationReloader, DataType) from spinn_front_end_common.utilities.constants \ import SYSTEM_BYTES_REQUIREMENT @@ -193,17 +198,18 @@ def config (self): @property @overrides (MachineVertex.sdram_required) - def sdram_required (self): + def sdram_required (self) -> ConstantSDRAM: return ConstantSDRAM(SYSTEM_BYTES_REQUIREMENT + self._sdram_usage) @overrides (MachineVertex.get_n_keys_for_partition) - def get_n_keys_for_partition (self, partition_id): + def get_n_keys_for_partition(self, partition_id: str) -> int: return MLPConstants.KEY_SPACE_SIZE - @overrides(MachineDataSpecableVertex.generate_machine_data_specification) def generate_machine_data_specification( - self, spec, placement, iptags, reverse_iptags): + self, spec: DataSpecificationGenerator, placement: Placement, + iptags: Optional[Iterable[IPTag]], + reverse_iptags: Optional[Iterable[ReverseIPTag]]): routing_info = FecDataView.get_routing_infos() # Generate the system data region for simulation.c requirements @@ -288,12 +294,16 @@ def generate_machine_data_specification( spec.switch_write_focus (MLPRegions.ROUTING.value) # write link keys: fwd - spec.write_value (routing_info.get_first_key_from_pre_vertex ( - self, self.fwd_link), data_type = DataType.UINT32) + key = routing_info.get_first_key_from_pre_vertex( + self, self.fwd_link) + assert key is not None + spec.write_value(key, data_type=DataType.UINT32) # write link keys: bkp - spec.write_value (routing_info.get_first_key_from_pre_vertex ( - self, self.bkp_link), data_type = DataType.UINT32) + key = routing_info.get_first_key_from_pre_vertex( + self, self.bkp_link) + assert key is not None + spec.write_value (key, data_type = DataType.UINT32) # write link keys: bps (padding) spec.write_value (0, data_type = DataType.UINT32) @@ -321,7 +331,8 @@ def generate_machine_data_specification( @overrides(AbstractRewritesDataSpecification.regenerate_data_specification) - def regenerate_data_specification(self, spec, placement): + def regenerate_data_specification( + self, spec: DataSpecificationReloader, placement: Placement): # Reserve and write the stage configuration region spec.reserve_memory_region (MLPRegions.STAGE.value, self._STAGE_CONFIGURATION_BYTES) @@ -336,12 +347,12 @@ def regenerate_data_specification(self, spec, placement): @overrides(AbstractRewritesDataSpecification.reload_required) - def reload_required(self): + def reload_required(self) -> bool: return True @overrides(AbstractRewritesDataSpecification.set_reload_required) - def set_reload_required(self, new_value): + def set_reload_required(self, new_value: bool): """ TODO: not really sure what this method is used for! """ diff --git a/spinn_pdp2/py.typed b/spinn_pdp2/py.typed new file mode 100644 index 0000000..91eaa0c --- /dev/null +++ b/spinn_pdp2/py.typed @@ -0,0 +1,13 @@ +# Copyright (c) 2023 The University of Manchester +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# https://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. diff --git a/spinn_pdp2/sum_vertex.py b/spinn_pdp2/sum_vertex.py index c302c46..9158283 100644 --- a/spinn_pdp2/sum_vertex.py +++ b/spinn_pdp2/sum_vertex.py @@ -14,11 +14,15 @@ # along with this program. If not, see . import struct +from typing import Iterable, Optional + +from spinn_machine.tags import IPTag, ReverseIPTag import spinnaker_graph_front_end as gfe from pacman.model.graphs.machine import MachineEdge from pacman.model.graphs.machine.machine_vertex import MachineVertex +from pacman.model.placements import Placement from pacman.model.resources import ConstantSDRAM from spinn_utilities.overrides import overrides @@ -28,7 +32,8 @@ from spinn_front_end_common.abstract_models.impl \ import MachineDataSpecableVertex from spinn_front_end_common.data import FecDataView -from spinn_front_end_common.interface.ds import DataType +from spinn_front_end_common.interface.ds import ( + DataSpecificationGenerator, DataSpecificationReloader, DataType) from spinn_front_end_common.utilities.constants \ import SYSTEM_BYTES_REQUIREMENT @@ -248,18 +253,20 @@ def config (self): @property @overrides (MachineVertex.sdram_required) - def sdram_required (self): + def sdram_required (self) -> ConstantSDRAM: return ConstantSDRAM(SYSTEM_BYTES_REQUIREMENT + self._sdram_usage) @overrides (MachineVertex.get_n_keys_for_partition) - def get_n_keys_for_partition (self, partition_id): + def get_n_keys_for_partition(self, partition_id: str) -> int: return MLPConstants.KEY_SPACE_SIZE @overrides(MachineDataSpecableVertex.generate_machine_data_specification) def generate_machine_data_specification( - self, spec, placement, iptags, reverse_iptags): + self, spec: DataSpecificationGenerator, placement: Placement, + iptags: Optional[Iterable[IPTag]], + reverse_iptags: Optional[Iterable[ReverseIPTag]]): routing_info = FecDataView.get_routing_infos() # Generate the system data region for simulation.c requirements generate_steps_system_data_region(spec, MLPRegions.SYSTEM.value, self) @@ -312,12 +319,16 @@ def generate_machine_data_specification( spec.switch_write_focus (MLPRegions.ROUTING.value) # write link keys: fwd - spec.write_value (routing_info.get_first_key_from_pre_vertex ( - self, self.fwd_link), data_type = DataType.UINT32) + key = routing_info.get_first_key_from_pre_vertex( + self, self.fwd_link) + assert key is not None + spec.write_value(key, data_type=DataType.UINT32) # write link keys: bkp - spec.write_value (routing_info.get_first_key_from_pre_vertex ( - self, self.bkp_link), data_type = DataType.UINT32) + key = routing_info.get_first_key_from_pre_vertex( + self, self.bkp_link) + assert key is not None + spec.write_value(key, data_type=DataType.UINT32) # write link keys: bps (padding) spec.write_value (0, data_type = DataType.UINT32) @@ -326,12 +337,16 @@ def generate_machine_data_specification( spec.write_value (0, data_type = DataType.UINT32) # write link keys: lds - spec.write_value (routing_info.get_first_key_from_pre_vertex ( - self, self.lds_link), data_type = DataType.UINT32) + key = routing_info.get_first_key_from_pre_vertex( + self, self.lds_link) + assert key is not None + spec.write_value(key, data_type=DataType.UINT32) # write link keys: fsg - spec.write_value (routing_info.get_first_key_from_pre_vertex ( - self, self.fsg_link), data_type = DataType.UINT32) + key = routing_info.get_first_key_from_pre_vertex ( + self, self.fsg_link) + assert key is not None + spec.write_value(key, data_type=DataType.UINT32) # Reserve and write the stage configuration region spec.reserve_memory_region (MLPRegions.STAGE.value, @@ -347,7 +362,8 @@ def generate_machine_data_specification( @overrides(AbstractRewritesDataSpecification.regenerate_data_specification) - def regenerate_data_specification(self, spec, placement): + def regenerate_data_specification( + self, spec: DataSpecificationReloader, placement: Placement): # Reserve and write the stage configuration region spec.reserve_memory_region (MLPRegions.STAGE.value, self._STAGE_CONFIGURATION_BYTES) @@ -362,12 +378,12 @@ def regenerate_data_specification(self, spec, placement): @overrides(AbstractRewritesDataSpecification.reload_required) - def reload_required(self): + def reload_required(self) -> bool: return True @overrides(AbstractRewritesDataSpecification.set_reload_required) - def set_reload_required(self, new_value): + def set_reload_required(self, new_value: bool): """ TODO: not really sure what this method is used for! """ diff --git a/spinn_pdp2/threshold_vertex.py b/spinn_pdp2/threshold_vertex.py index 7bd5b7e..e290738 100644 --- a/spinn_pdp2/threshold_vertex.py +++ b/spinn_pdp2/threshold_vertex.py @@ -14,9 +14,13 @@ # along with this program. If not, see . import struct +from typing import Iterable, List, Optional + +from spinn_machine.tags import IPTag, ReverseIPTag from pacman.model.graphs.machine.machine_vertex import MachineVertex -from pacman.model.resources import VariableSDRAM, ConstantSDRAM +from pacman.model.placements import Placement +from pacman.model.resources import AbstractSDRAM, ConstantSDRAM, VariableSDRAM from spinn_utilities.overrides import overrides @@ -25,7 +29,8 @@ from spinn_front_end_common.abstract_models.impl \ import MachineDataSpecableVertex from spinn_front_end_common.data import FecDataView -from spinn_front_end_common.interface.ds import DataType +from spinn_front_end_common.interface.ds import ( + DataSpecificationGenerator, DataSpecificationReloader, DataType) from spinn_front_end_common.utilities.constants \ import SYSTEM_BYTES_REQUIREMENT, BYTES_PER_WORD from spinn_front_end_common.interface.buffer_management.buffer_models import ( @@ -341,7 +346,7 @@ def config (self): @property @overrides (MachineVertex.sdram_required) - def sdram_required (self): + def sdram_required (self) -> AbstractSDRAM: if self.group.output_grp: return VariableSDRAM(self._sdram_fixed, self._sdram_variable) else: @@ -349,7 +354,7 @@ def sdram_required (self): @overrides (MachineVertex.get_n_keys_for_partition) - def get_n_keys_for_partition (self, partition_id): + def get_n_keys_for_partition(self, partition_id: str) -> int: return MLPConstants.KEY_SPACE_SIZE @@ -373,7 +378,9 @@ def read(self, placement, buffer_manager, channel): @overrides(MachineDataSpecableVertex.generate_machine_data_specification) def generate_machine_data_specification( - self, spec, placement, iptags, reverse_iptags): + self, spec: DataSpecificationGenerator, placement: Placement, + iptags: Optional[Iterable[IPTag]], + reverse_iptags: Optional[Iterable[ReverseIPTag]]): routing_info = FecDataView.get_routing_infos() # Generate the system data region for simulation.c requirements generate_steps_system_data_region(spec, MLPRegions.SYSTEM.value, self) @@ -477,19 +484,25 @@ def generate_machine_data_specification( spec.switch_write_focus (MLPRegions.ROUTING.value) # write link keys: fwd - spec.write_value (routing_info.get_first_key_from_pre_vertex ( - self, self.fwd_link), data_type = DataType.UINT32) + key = routing_info.get_first_key_from_pre_vertex( + self, self.fwd_link) + assert key is not None + spec.write_value(key, data_type=DataType.UINT32) # write link keys: bkp - spec.write_value (routing_info.get_first_key_from_pre_vertex ( - self, self.bkp_link), data_type = DataType.UINT32) + key = routing_info.get_first_key_from_pre_vertex( + self, self.bkp_link) + assert key is not None + spec.write_value (key, data_type = DataType.UINT32) # write link keys: bps (padding) spec.write_value (0, data_type = DataType.UINT32) # write link keys: stp - spec.write_value (routing_info.get_first_key_from_pre_vertex ( - self, self.stp_link), data_type = DataType.UINT32) + key = routing_info.get_first_key_from_pre_vertex( + self, self.stp_link) + assert key is not None + spec.write_value(key, data_type=DataType.UINT32) # write link keys: lds (padding) spec.write_value (0, data_type = DataType.UINT32) @@ -531,7 +544,8 @@ def generate_machine_data_specification( @overrides(AbstractRewritesDataSpecification.regenerate_data_specification) - def regenerate_data_specification(self, spec, placement): + def regenerate_data_specification( + self, spec: DataSpecificationReloader, placement: Placement): # reserve and write the stage configuration region spec.reserve_memory_region (MLPRegions.STAGE.value, self._STAGE_CONFIGURATION_BYTES) @@ -546,12 +560,12 @@ def regenerate_data_specification(self, spec, placement): @overrides(AbstractRewritesDataSpecification.reload_required) - def reload_required(self): + def reload_required(self) -> bool: return True @overrides(AbstractRewritesDataSpecification.set_reload_required) - def set_reload_required(self, new_value): + def set_reload_required(self, new_value: bool): """ TODO: not really sure what this method is used for! """ @@ -560,7 +574,7 @@ def set_reload_required(self, new_value): @overrides(AbstractReceiveBuffersToHost.get_recorded_region_ids) - def get_recorded_region_ids(self): + def get_recorded_region_ids(self) -> List[int]: if self.group.output_grp: ids = [ch.value for ch in MLPVarSizeRecordings] ids.extend([ch.value for ch in MLPConstSizeRecordings]) @@ -575,6 +589,6 @@ def get_recorded_region_ids(self): @overrides(AbstractReceiveBuffersToHost.get_recording_region_base_address) - def get_recording_region_base_address(self, placement): + def get_recording_region_base_address(self, placement: Placement) -> int: return locate_memory_region_for_placement( placement, MLPRegions.REC_INFO.value) diff --git a/spinn_pdp2/weight_vertex.py b/spinn_pdp2/weight_vertex.py index 6d036d5..f7598dd 100644 --- a/spinn_pdp2/weight_vertex.py +++ b/spinn_pdp2/weight_vertex.py @@ -14,8 +14,12 @@ # along with this program. If not, see . import struct +from typing import Iterable, Optional + +from spinn_machine.tags import IPTag, ReverseIPTag from pacman.model.graphs.machine.machine_vertex import MachineVertex +from pacman.model.placements import Placement from pacman.model.resources import ConstantSDRAM from spinn_utilities.overrides import overrides @@ -25,7 +29,8 @@ from spinn_front_end_common.abstract_models.impl \ import MachineDataSpecableVertex from spinn_front_end_common.data import FecDataView -from spinn_front_end_common.interface.ds import DataType +from spinn_front_end_common.interface.ds import ( + DataSpecificationGenerator, DataSpecificationReloader, DataType) from spinn_front_end_common.utilities.constants \ import SYSTEM_BYTES_REQUIREMENT @@ -259,18 +264,20 @@ def config (self): @property @overrides (MachineVertex.sdram_required) - def sdram_required (self): + def sdram_required (self) -> ConstantSDRAM: return ConstantSDRAM(SYSTEM_BYTES_REQUIREMENT + self._sdram_usage) @overrides (MachineVertex.get_n_keys_for_partition) - def get_n_keys_for_partition (self, partition_id): + def get_n_keys_for_partition(self, partition_id: str) -> int: return MLPConstants.KEY_SPACE_SIZE @overrides(MachineDataSpecableVertex.generate_machine_data_specification) def generate_machine_data_specification( - self, spec, placement, iptags, reverse_iptags): + self, spec: DataSpecificationGenerator, placement: Placement, + iptags: Optional[Iterable[IPTag]], + reverse_iptags: Optional[Iterable[ReverseIPTag]]): routing_info = FecDataView.get_routing_infos() # Generate the system data region for simulation.c requirements @@ -346,12 +353,16 @@ def generate_machine_data_specification( spec.switch_write_focus (MLPRegions.ROUTING.value) # write link keys: fwd - spec.write_value (routing_info.get_first_key_from_pre_vertex ( - self, self.fwd_link), data_type = DataType.UINT32) + key = routing_info.get_first_key_from_pre_vertex( + self, self.fwd_link) + assert key is not None + spec.write_value(key, data_type=DataType.UINT32) # write link keys: bkp - spec.write_value (routing_info.get_first_key_from_pre_vertex ( - self, self.bkp_link), data_type = DataType.UINT32) + key = routing_info.get_first_key_from_pre_vertex( + self, self.bkp_link) + assert key is not None + spec.write_value(key, data_type=DataType.UINT32) # write link keys: bps (padding) spec.write_value (0, data_type = DataType.UINT32) @@ -360,12 +371,16 @@ def generate_machine_data_specification( spec.write_value (0, data_type = DataType.UINT32) # write link keys: lds - spec.write_value (routing_info.get_first_key_from_pre_vertex ( - self, self.lds_link), data_type = DataType.UINT32) + key = routing_info.get_first_key_from_pre_vertex( + self, self.lds_link) + assert key is not None + spec.write_value(key, data_type=DataType.UINT32) # write link keys: fsg - spec.write_value (routing_info.get_first_key_from_pre_vertex ( - self, self.fsg_link), data_type = DataType.UINT32) + key = routing_info.get_first_key_from_pre_vertex( + self, self.fsg_link) + assert key is not None + spec.write_value(key, data_type=DataType.UINT32) # Reserve and write the stage configuration region spec.reserve_memory_region (MLPRegions.STAGE.value, @@ -381,7 +396,8 @@ def generate_machine_data_specification( @overrides(AbstractRewritesDataSpecification.regenerate_data_specification) - def regenerate_data_specification(self, spec, placement): + def regenerate_data_specification( + self, spec: DataSpecificationReloader, placement: Placement): # Reserve and write the stage configuration region spec.reserve_memory_region (MLPRegions.STAGE.value, self._STAGE_CONFIGURATION_BYTES) @@ -396,12 +412,12 @@ def regenerate_data_specification(self, spec, placement): @overrides(AbstractRewritesDataSpecification.reload_required) - def reload_required(self): + def reload_required(self) -> bool: return True @overrides(AbstractRewritesDataSpecification.set_reload_required) - def set_reload_required(self, new_value): + def set_reload_required(self, new_value: bool): """ TODO: not really sure what this method is used for! """