Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Add system-level test of SRAM memory interface #68

Open
sgherbst opened this issue May 5, 2020 · 1 comment
Open

Add system-level test of SRAM memory interface #68

sgherbst opened this issue May 5, 2020 · 1 comment
Assignees

Comments

@sgherbst
Copy link
Contributor

sgherbst commented May 5, 2020

Right now we have the tests SRAM and SRAM_MULTI, but they are block-level tests. We need a system-level test to show that we can read out some data from the ADC in the right order. We implemented part of this for ButterPHY in the test LOOPBACK_JTAG, but the test was never passing, so it needs to be updated for DragonPHY and debugged.

@sgherbst
Copy link
Contributor Author

sgherbst commented Oct 7, 2020

It looks like this was addressed in cpu_system_tests/loopback_sram, but there is still some leftover code from the old approach. I think we should revisit this to make sure we're checking what we think we're checking.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

No branches or pull requests

2 participants