Detailed routing time for mock-array as a function of area

[oharboe]

Using The-OpenROAD-Project/OpenROAD-flow-scripts#1211 and The-OpenROAD-Project/OpenROAD-flow-scripts#1212, I've plotted detailed routing times for the same Verilog 8x8 8 bit datapath mock-array, changing only the size of the element macros.

Any thoughts on these running times for the mock-array for detailed routing? Expected? Unexpected?

The algorithm seems to be MUCH faster for smaller areas

Biggest array:

The element-element wires are not straight, lots of little deviations from horizontal/vertical:

Smallest array:

"All" element to element wires are horizontal/vertical (didn't check exhaustively):

[maliberty]

How do the number of routing iterations and iter0 DRCs compare between datapoints?

[oharboe]

I wasn't able to follow up on this in a timely manner.