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LAN8710A-EZC.lib
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LAN8710A-EZC.lib
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EESchema-LIBRARY Version 2.3
#encoding utf-8
#(c) SnapEDA 2016 (snapeda.com)
#This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License (CC BY-SA) with Design Exception 1.0
#
# LAN8710A-EZC
#
DEF LAN8710A-EZC U 0 40 Y Y 1 L N
F0 "U" -1001 1640 50 H V L BNN
F1 "LAN8710A-EZC" -1002 -1660 50 H V L BNN
F2 "QFN50P500X500X100-33N" 0 0 50 H I L BNN
F3 "" 0 0 50 H I L BNN
F4 "QFN-32 Microchip" 0 0 50 H I L BNN "PACKAGE"
F5 "IPC-7351B" 0 0 50 H I L BNN "STANDARD"
F6 "1.31 USD" 0 0 50 H I L BNN "PRICE"
F7 "Good" 0 0 50 H I L BNN "AVAILABILITY"
F8 "LAN8710A-EZC" 0 0 50 H I L BNN "MP"
F9 "LAN8710A Series Single Chip MII/RMII Ethernet Physical Layer Transceiver- QFN-32" 0 0 50 H I L BNN "DESCRIPTION"
F10 "Microchip" 0 0 50 H I L BNN "MF"
DRAW
S -1000 -1500 1000 1600 0 0 16 f
X TXCLK 20 -1200 -500 200 R 40 40 0 0 O C
X COL/CRS_DV/MODE2 15 -1200 -1200 200 R 40 40 0 0 B
X CRS 14 -1200 -1100 200 R 40 40 0 0 O
X LED1/REGOFF 3 1200 300 200 L 40 40 0 0 B
X LED2/NINTSEL 2 1200 200 200 L 40 40 0 0 B
X MDC 17 -1200 -800 200 R 40 40 0 0 B
X MDIO 16 -1200 -900 200 R 40 40 0 0 B
X NINT/TXER/TXD4 18 -1200 -400 200 R 40 40 0 0 B
X NRST 19 -1200 1000 200 R 40 40 0 0 B
X RBIAS 32 1200 -1200 200 L 40 40 0 0 P
X RXCLK/PHYAD1 7 -1200 300 200 R 40 40 0 0 B C
X RXD1/MODE1 10 -1200 700 200 R 40 40 0 0 B
X RXD2/RMIISEL 9 -1200 600 200 R 40 40 0 0 B
X RXD3/PHYAD2 8 -1200 500 200 R 40 40 0 0 B
X VDD1A 27 1200 1500 200 L 40 40 0 0 W
X VDD2A 1 1200 1400 200 L 40 40 0 0 W
X VDDCR 6 1200 1300 200 L 40 40 0 0 W
X VDDIO 12 1200 1200 200 L 40 40 0 0 W
X RXD0/MODE0 11 -1200 800 200 R 40 40 0 0 B
X RXDV 26 -1200 200 200 R 40 40 0 0 O
X RXER/RXD4/PHYAD0 13 -1200 400 200 R 40 40 0 0 B
X RXN 30 1200 800 200 L 40 40 0 0 B
X RXP 31 1200 700 200 L 40 40 0 0 B
X TXD1 23 -1200 -100 200 R 40 40 0 0 I
X TXD2 24 -1200 -200 200 R 40 40 0 0 I
X TXD3 25 -1200 -300 200 R 40 40 0 0 I
X TXD0 22 -1200 0 200 R 40 40 0 0 I
X TXEN 21 -1200 -600 200 R 40 40 0 0 I
X TXN 28 1200 600 200 L 40 40 0 0 B
X TXP 29 1200 500 200 L 40 40 0 0 B
X XTAL1/CLKIN 5 1200 -300 200 L 40 40 0 0 B C
X XTAL2 4 1200 -400 200 L 40 40 0 0 B
X VSS 33 1200 -1400 200 L 40 40 0 0 W
ENDDRAW
ENDDEF
#
# End Library