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This repository is in a very early planning phase. Although the VHPIDIRECT bridge for GHDL is functional, breaking changes are being discussed in VUnit/vunit#603.

'docs' workflow Status 'push' workflow Status

Interfacing VHDL and foreign languages with VUnit

Three main approaches are used to co-simulate (co-execute) VHDL sources along with software applications written in a different language (typically C/C++):

  • Verilog Procedural Interface (VPI), also known as Program Language Interface (PLI) 2.0.
  • VHDL Procedural Interface (VHPI), or specific implementations, such as Foreign Language Interface (FLI).
  • Generation of C/C++ models/sources through a transpiler.

This repository aims to gather resources to use these techniques with VUnit. The content is organised in bridges, examples and utils:

  • Bridges contain VHDL packages, (optionally) matching C headers and Python classes. Each bridge provides the glue logic between a VHDL API (or another bridge) and some other API in VHDL and/or C (bindings).
  • Examples are working demo projects that use some utils and/or bridges. Dockerfiles are included in the examples that require additional FOSS tools.
  • Utils contains helper functions in Python (based on ctypes, base64, numpy and Pillow) which are useful for interacting with C-alike executables.