diff --git a/.github/workflows/ci-interpreter.yml b/.github/workflows/ci-interpreter.yml index 5f57448dd..81b55f544 100644 --- a/.github/workflows/ci-interpreter.yml +++ b/.github/workflows/ci-interpreter.yml @@ -3,11 +3,11 @@ name: CI for interpreter & tests on: push: branches: [ main ] - paths: [ interpreter/**, test/** ] + paths: [ .github/**, interpreter/**, test/** ] pull_request: branches: [ main ] - paths: [ interpreter/**, test/** ] + paths: [ .github/**, interpreter/**, test/** ] # Allows you to run this workflow manually from the Actions tab workflow_dispatch: diff --git a/.github/workflows/ci-spec.yml b/.github/workflows/ci-spec.yml index 7610b33b0..e88a224d6 100644 --- a/.github/workflows/ci-spec.yml +++ b/.github/workflows/ci-spec.yml @@ -3,11 +3,11 @@ name: CI for specs on: push: branches: [ main ] - paths: [ document/** ] + paths: [ .github/**, document/** ] pull_request: branches: [ main ] - paths: [ document/** ] + paths: [ .github/**, document/** ] # Allows you to run this workflow manually from the Actions tab workflow_dispatch: diff --git a/.github/workflows/w3c-publish.yml b/.github/workflows/w3c-publish.yml new file mode 100644 index 000000000..d68183abf --- /dev/null +++ b/.github/workflows/w3c-publish.yml @@ -0,0 +1,37 @@ +name: Publish to W3C TR space + +on: + push: + branches: [ main ] + paths: [ .github/**, document/** ] + + # Allows you to run this workflow manually from the Actions tab + workflow_dispatch: + +jobs: + publish-to-w3c-TR: + if: github.repository == 'WebAssembly/spec' + runs-on: ubuntu-latest + steps: + - name: Checkout repo + uses: actions/checkout@v2 + with: + submodules: "recursive" + - name: Setup Node.js + uses: actions/setup-node@v3 + with: + node-version: 16 + - name: Setup Bikeshed + run: pip install bikeshed && bikeshed update + - name: Setup TexLive + run: sudo apt-get update -y && sudo apt-get install -y latexmk texlive-latex-recommended texlive-latex-extra texlive-fonts-recommended + - name: Setup Sphinx + run: pip install six && pip install sphinx==5.1.0 + - name: Publish all specs to their https://www.w3.org/TR/ URLs + run: cd document && make -e WD-echidna-CI + env: + STATUS: --md-status=WD + W3C_ECHIDNA_TOKEN_CORE: ${{ secrets.W3C_ECHIDNA_TOKEN_CORE }} + W3C_ECHIDNA_TOKEN_JSAPI: ${{ secrets.W3C_ECHIDNA_TOKEN_JSAPI }} + W3C_ECHIDNA_TOKEN_WEBAPI: ${{ secrets.W3C_ECHIDNA_TOKEN_WEBAPI }} + YARN_ENABLE_IMMUTABLE_INSTALLS: false diff --git a/document/Makefile b/document/Makefile index 875efc720..01a6d9342 100644 --- a/document/Makefile +++ b/document/Makefile @@ -1,6 +1,7 @@ -DIRS = core js-api web-api +DIRS = js-api web-api core FILES = index.html BUILDDIR = _build +TAR = tar # Global targets. @@ -24,6 +25,25 @@ clean: $(DIRS:%=clean-%) .PHONY: diff diff: $(DIRS:%=diff-%) +# macOS: do “brew install tar” & run “make” as: TAR=gtar make -e WD-tar +.PHONY: WD-tar +WD-tar: + for dir in $(DIRS); \ + do STATUS=--md-status=WD TAR=$(TAR) $(MAKE) -e -C $$dir $@;\ + done + +# macOS: do “brew install tar” & run “make” as: TAR=gtar make -e WD-echidna +.PHONY: WD-echidna +WD-echidna: + for dir in $(DIRS); \ + do $(MAKE) -e -C $$dir $@;\ + done + +.PHONY: WD-echidna-CI +WD-echidna-CI: + for dir in $(DIRS); \ + do $(MAKE) -e -C $$dir $@;\ + done # Directory-specific targets. diff --git a/document/core/Makefile b/document/core/Makefile index 8a3650ec9..3ac2f1c81 100644 --- a/document/core/Makefile +++ b/document/core/Makefile @@ -9,6 +9,8 @@ BUILDDIR = _build STATICDIR = _static DOWNLOADDIR = _download NAME = WebAssembly +DECISION_URL = https://github.com/WebAssembly/meetings/blob/main/main/2017/WG-12-06.md +TAR = tar # Internal variables. PAPEROPT_a4 = -D latex_paper_size=a4 @@ -78,7 +80,7 @@ publish-main: clean main bikeshed-keep deploy all: pdf html bikeshed .PHONY: main -main: pdf html +main: macrosok pdf html # Dirty hack to avoid rebuilding the Bikeshed version for every push. .PHONY: bikeshed-keep @@ -95,6 +97,10 @@ GENERATED = appendix/index-instructions.rst %.rst: %.py (cd `dirname $@`; ./`basename $^`) +.PHONY: macrosok +macrosok: $(GENERATED) + sh util/check_macros.sh + .PHONY: pdf pdf: $(GENERATED) latexpdf mkdir -p $(BUILDDIR)/html/$(DOWNLOADDIR) @@ -148,7 +154,7 @@ bikeshed: $(GENERATED) @echo @echo ========================================================================= mkdir -p $(BUILDDIR)/bikeshed_mathjax/ - bikeshed spec index.bs $(BUILDDIR)/bikeshed_mathjax/index.html + bikeshed spec $(STATUS) index.bs $(BUILDDIR)/bikeshed_mathjax/index.html mkdir -p $(BUILDDIR)/html/bikeshed/ (cd util/katex/ && yarn && yarn build && npm install --only=prod) python3 util/mathjax2katex.py $(BUILDDIR)/bikeshed_mathjax/index.html \ @@ -163,9 +169,11 @@ bikeshed: $(GENERATED) @echo "Build finished. The HTML page is in $(BUILDDIR)/html/bikeshed/." .PHONY: WD-tar +# macOS tar has no “--transform” option (only GNU tar does), so on macOS, +# do “brew install tar” & run “make” like this: “TAR=gtar make -e WD-tar” WD-tar: bikeshed @echo "Building tar file..." - tar cvf \ + $(TAR) cvf \ $(BUILDDIR)/WD.tar \ --transform='s|$(BUILDDIR)/html/bikeshed/||' \ --transform='s|index.html|Overview.html|' \ @@ -190,6 +198,20 @@ WD-echidna: WD-tar @echo @echo "Published working draft. Check its status at https://labs.w3.org/echidna/api/status?id=`cat $(BUILDDIR)/WD-echidna-id.txt`" +.PHONY: WD-echidna-CI +WD-echidna-CI: WD-tar + @if [ -z $(W3C_ECHIDNA_TOKEN_CORE) ] || \ + [ -z $(DECISION_URL) ] ; then \ + echo "Must provide W3C_ECHIDNA_TOKEN_CORE and DECISION_URL environment variables"; \ + exit 1; \ + fi + curl 'https://labs.w3.org/echidna/api/request' \ + -F "tar=@$(BUILDDIR)/WD.tar" \ + -F "token=$(W3C_ECHIDNA_TOKEN_CORE)" \ + -F "decision=$(DECISION_URL)" | tee $(BUILDDIR)/WD-echidna-id.txt + @echo + @echo "Published working draft. Check its status at https://labs.w3.org/echidna/api/status?id=`cat $(BUILDDIR)/WD-echidna-id.txt`" + .PHONY: diff diff: bikeshed @echo "Downloading the old single-file html spec..." diff --git a/document/core/appendix/index-instructions.py b/document/core/appendix/index-instructions.py index a824f26ed..17566ae95 100755 --- a/document/core/appendix/index-instructions.py +++ b/document/core/appendix/index-instructions.py @@ -405,48 +405,48 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat Instruction(r'\F32X4.\REPLACELANE~\laneidx', r'\hex{FD}~~\hex{20}', r'[\V128~\F32] \to [\V128]', r'valid-vec-replace_lane', r'exec-vec-replace_lane'), Instruction(r'\F64X2.\EXTRACTLANE~\laneidx', r'\hex{FD}~~\hex{21}', r'[\V128] \to [\F64]', r'valid-vec-extract_lane', r'exec-vec-extract_lane'), Instruction(r'\F64X2.\REPLACELANE~\laneidx', r'\hex{FD}~~\hex{22}', r'[\V128~\F64] \to [\V128]', r'valid-vec-replace_lane', r'exec-vec-replace_lane'), - Instruction(r'\I8X16.\VEQ', r'\hex{FD}~~\hex{23}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ieq'), - Instruction(r'\I8X16.\VNE', r'\hex{FD}~~\hex{24}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ine'), - Instruction(r'\I8X16.\VLT\K{\_s}', r'\hex{FD}~~\hex{25}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_s'), - Instruction(r'\I8X16.\VLT\K{\_u}', r'\hex{FD}~~\hex{26}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_u'), - Instruction(r'\I8X16.\VGT\K{\_s}', r'\hex{FD}~~\hex{27}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_s'), - Instruction(r'\I8X16.\VGT\K{\_u}', r'\hex{FD}~~\hex{28}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_u'), - Instruction(r'\I8X16.\VLE\K{\_s}', r'\hex{FD}~~\hex{29}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_s'), - Instruction(r'\I8X16.\VLE\K{\_u}', r'\hex{FD}~~\hex{2A}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_u'), - Instruction(r'\I8X16.\VGE\K{\_s}', r'\hex{FD}~~\hex{2B}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_s'), - Instruction(r'\I8X16.\VGE\K{\_u}', r'\hex{FD}~~\hex{2C}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_u'), - Instruction(r'\I16X8.\VEQ', r'\hex{FD}~~\hex{2D}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ieq'), - Instruction(r'\I16X8.\VNE', r'\hex{FD}~~\hex{2E}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ine'), - Instruction(r'\I16X8.\VLT\K{\_s}', r'\hex{FD}~~\hex{2F}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_s'), - Instruction(r'\I16X8.\VLT\K{\_u}', r'\hex{FD}~~\hex{30}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_u'), - Instruction(r'\I16X8.\VGT\K{\_s}', r'\hex{FD}~~\hex{31}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_s'), - Instruction(r'\I16X8.\VGT\K{\_u}', r'\hex{FD}~~\hex{32}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_u'), - Instruction(r'\I16X8.\VLE\K{\_s}', r'\hex{FD}~~\hex{33}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_s'), - Instruction(r'\I16X8.\VLE\K{\_u}', r'\hex{FD}~~\hex{34}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_u'), - Instruction(r'\I16X8.\VGE\K{\_s}', r'\hex{FD}~~\hex{35}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_s'), - Instruction(r'\I16X8.\VGE\K{\_u}', r'\hex{FD}~~\hex{36}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_u'), - Instruction(r'\I32X4.\VEQ', r'\hex{FD}~~\hex{37}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ieq'), - Instruction(r'\I32X4.\VNE', r'\hex{FD}~~\hex{38}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ine'), - Instruction(r'\I32X4.\VLT\K{\_s}', r'\hex{FD}~~\hex{39}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_s'), - Instruction(r'\I32X4.\VLT\K{\_u}', r'\hex{FD}~~\hex{3A}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ilt_u'), - Instruction(r'\I32X4.\VGT\K{\_s}', r'\hex{FD}~~\hex{3B}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_s'), - Instruction(r'\I32X4.\VGT\K{\_u}', r'\hex{FD}~~\hex{3C}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-igt_u'), - Instruction(r'\I32X4.\VLE\K{\_s}', r'\hex{FD}~~\hex{3D}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_s'), - Instruction(r'\I32X4.\VLE\K{\_u}', r'\hex{FD}~~\hex{3E}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ile_u'), - Instruction(r'\I32X4.\VGE\K{\_s}', r'\hex{FD}~~\hex{3F}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_s'), - Instruction(r'\I32X4.\VGE\K{\_u}', r'\hex{FD}~~\hex{40}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-ige_u'), - Instruction(r'\F32X4.\VEQ', r'\hex{FD}~~\hex{41}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-feq'), - Instruction(r'\F32X4.\VNE', r'\hex{FD}~~\hex{42}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fne'), - Instruction(r'\F32X4.\VLT', r'\hex{FD}~~\hex{43}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-flt'), - Instruction(r'\F32X4.\VGT', r'\hex{FD}~~\hex{44}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fgt'), - Instruction(r'\F32X4.\VLE', r'\hex{FD}~~\hex{45}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fle'), - Instruction(r'\F32X4.\VGE', r'\hex{FD}~~\hex{46}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fge'), - Instruction(r'\F64X2.\VEQ', r'\hex{FD}~~\hex{47}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-feq'), - Instruction(r'\F64X2.\VNE', r'\hex{FD}~~\hex{48}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fne'), - Instruction(r'\F64X2.\VLT', r'\hex{FD}~~\hex{49}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-flt'), - Instruction(r'\F64X2.\VGT', r'\hex{FD}~~\hex{4A}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fgt'), - Instruction(r'\F64X2.\VLE', r'\hex{FD}~~\hex{4B}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fle'), - Instruction(r'\F64X2.\VGE', r'\hex{FD}~~\hex{4C}', r'[\V128~\V128] \to [\V128]', r'valid-vbinop', r'exec-vbinop', r'op-fge'), + Instruction(r'\I8X16.\VEQ', r'\hex{FD}~~\hex{23}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ieq'), + Instruction(r'\I8X16.\VNE', r'\hex{FD}~~\hex{24}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ine'), + Instruction(r'\I8X16.\VLT\K{\_s}', r'\hex{FD}~~\hex{25}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ilt_s'), + Instruction(r'\I8X16.\VLT\K{\_u}', r'\hex{FD}~~\hex{26}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ilt_u'), + Instruction(r'\I8X16.\VGT\K{\_s}', r'\hex{FD}~~\hex{27}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-igt_s'), + Instruction(r'\I8X16.\VGT\K{\_u}', r'\hex{FD}~~\hex{28}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-igt_u'), + Instruction(r'\I8X16.\VLE\K{\_s}', r'\hex{FD}~~\hex{29}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ile_s'), + Instruction(r'\I8X16.\VLE\K{\_u}', r'\hex{FD}~~\hex{2A}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ile_u'), + Instruction(r'\I8X16.\VGE\K{\_s}', r'\hex{FD}~~\hex{2B}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ige_s'), + Instruction(r'\I8X16.\VGE\K{\_u}', r'\hex{FD}~~\hex{2C}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ige_u'), + Instruction(r'\I16X8.\VEQ', r'\hex{FD}~~\hex{2D}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ieq'), + Instruction(r'\I16X8.\VNE', r'\hex{FD}~~\hex{2E}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ine'), + Instruction(r'\I16X8.\VLT\K{\_s}', r'\hex{FD}~~\hex{2F}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ilt_s'), + Instruction(r'\I16X8.\VLT\K{\_u}', r'\hex{FD}~~\hex{30}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ilt_u'), + Instruction(r'\I16X8.\VGT\K{\_s}', r'\hex{FD}~~\hex{31}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-igt_s'), + Instruction(r'\I16X8.\VGT\K{\_u}', r'\hex{FD}~~\hex{32}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-igt_u'), + Instruction(r'\I16X8.\VLE\K{\_s}', r'\hex{FD}~~\hex{33}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ile_s'), + Instruction(r'\I16X8.\VLE\K{\_u}', r'\hex{FD}~~\hex{34}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ile_u'), + Instruction(r'\I16X8.\VGE\K{\_s}', r'\hex{FD}~~\hex{35}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ige_s'), + Instruction(r'\I16X8.\VGE\K{\_u}', r'\hex{FD}~~\hex{36}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ige_u'), + Instruction(r'\I32X4.\VEQ', r'\hex{FD}~~\hex{37}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ieq'), + Instruction(r'\I32X4.\VNE', r'\hex{FD}~~\hex{38}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ine'), + Instruction(r'\I32X4.\VLT\K{\_s}', r'\hex{FD}~~\hex{39}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ilt_s'), + Instruction(r'\I32X4.\VLT\K{\_u}', r'\hex{FD}~~\hex{3A}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ilt_u'), + Instruction(r'\I32X4.\VGT\K{\_s}', r'\hex{FD}~~\hex{3B}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-igt_s'), + Instruction(r'\I32X4.\VGT\K{\_u}', r'\hex{FD}~~\hex{3C}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-igt_u'), + Instruction(r'\I32X4.\VLE\K{\_s}', r'\hex{FD}~~\hex{3D}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ile_s'), + Instruction(r'\I32X4.\VLE\K{\_u}', r'\hex{FD}~~\hex{3E}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ile_u'), + Instruction(r'\I32X4.\VGE\K{\_s}', r'\hex{FD}~~\hex{3F}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ige_s'), + Instruction(r'\I32X4.\VGE\K{\_u}', r'\hex{FD}~~\hex{40}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-ige_u'), + Instruction(r'\F32X4.\VEQ', r'\hex{FD}~~\hex{41}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-feq'), + Instruction(r'\F32X4.\VNE', r'\hex{FD}~~\hex{42}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-fne'), + Instruction(r'\F32X4.\VLT', r'\hex{FD}~~\hex{43}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-flt'), + Instruction(r'\F32X4.\VGT', r'\hex{FD}~~\hex{44}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-fgt'), + Instruction(r'\F32X4.\VLE', r'\hex{FD}~~\hex{45}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-fle'), + Instruction(r'\F32X4.\VGE', r'\hex{FD}~~\hex{46}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-fge'), + Instruction(r'\F64X2.\VEQ', r'\hex{FD}~~\hex{47}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-feq'), + Instruction(r'\F64X2.\VNE', r'\hex{FD}~~\hex{48}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-fne'), + Instruction(r'\F64X2.\VLT', r'\hex{FD}~~\hex{49}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-flt'), + Instruction(r'\F64X2.\VGT', r'\hex{FD}~~\hex{4A}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-fgt'), + Instruction(r'\F64X2.\VLE', r'\hex{FD}~~\hex{4B}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-fle'), + Instruction(r'\F64X2.\VGE', r'\hex{FD}~~\hex{4C}', r'[\V128~\V128] \to [\V128]', r'valid-vrelop', r'exec-vrelop', r'op-fge'), Instruction(r'\V128.\VNOT', r'\hex{FD}~~\hex{4D}', r'[\V128] \to [\V128]', r'valid-vvunop', r'exec-vvunop', r'op-inot'), Instruction(r'\V128.\VAND', r'\hex{FD}~~\hex{4E}', r'[\V128~\V128] \to [\V128]', r'valid-vvbinop', r'exec-vvbinop', r'op-iand'), Instruction(r'\V128.\VANDNOT', r'\hex{FD}~~\hex{4F}', r'[\V128~\V128] \to [\V128]', r'valid-vvbinop', r'exec-vvbinop', r'op-iandnot'), diff --git a/document/core/appendix/properties.rst b/document/core/appendix/properties.rst index 1067ff2b0..ec04f07d3 100644 --- a/document/core/appendix/properties.rst +++ b/document/core/appendix/properties.rst @@ -21,7 +21,7 @@ In order to state and prove soundness precisely, the typing rules must be extend .. index:: context, recursive type, recursive type index -.. context-rec: +.. _context-ext: Contexts ~~~~~~~~ @@ -717,10 +717,14 @@ where :math:`\val_1 \gg^+_S \val_2` denotes the transitive closure of the follow * Let :math:`\reftype^\ast` be the concatenation of all :math:`\reftype_i` in order. +* Let :math:`m` be the length of :math:`\moduleinst.\MIFUNCS`. + * Let :math:`n` be the length of :math:`\moduleinst.\MIDATAS`. +* Let :math:`x^\ast` be the sequence of :ref:`function indices ` from :math:`0` to :math:`m-1`. + * Then the module instance is valid with :ref:`context ` - :math:`\{\CTYPES~\deftype^\ast,` :math:`\CFUNCS~\functype^\ast,` :math:`\CTABLES~\tabletype^\ast,` :math:`\CMEMS~\memtype^\ast,` :math:`\CGLOBALS~\globaltype^\ast,` :math:`\CELEMS~\reftype^\ast,` :math:`\CDATAS~{\ok}^n\}`. + :math:`\{\CTYPES~\deftype^\ast,` :math:`\CFUNCS~\functype^\ast,` :math:`\CTABLES~\tabletype^\ast,` :math:`\CMEMS~\memtype^\ast,` :math:`\CGLOBALS~\globaltype^\ast,` :math:`\CELEMS~\reftype^\ast,` :math:`\CDATAS~{\ok}^n,` :math:`\CREFS~x^\ast\}`. .. math:: ~\\[-1ex] @@ -762,7 +766,8 @@ where :math:`\val_1 \gg^+_S \val_2` denotes the transitive closure of the follow \CMEMS & \memtype^\ast, \\ \CGLOBALS & \globaltype^\ast, \\ \CELEMS & \reftype^\ast, \\ - \CDATAS & {\ok}^n ~\} + \CDATAS & {\ok}^n, \\ + \CREFS & 0 \dots (|\funcaddr^\ast|-1) ~\} \end{array} \end{array} } diff --git a/document/core/binary/modules.rst b/document/core/binary/modules.rst index e52f4d10c..ac405f4ee 100644 --- a/document/core/binary/modules.rst +++ b/document/core/binary/modules.rst @@ -105,6 +105,9 @@ Id Section 12 :ref:`data count section ` == =============================================== +.. note:: + Section ids do not always correspond to the :ref:`order of sections ` in the encoding of a module. + .. index:: ! custom section pair: binary format; custom section diff --git a/document/core/exec/instructions.rst b/document/core/exec/instructions.rst index 428064eca..e1c5f43b6 100644 --- a/document/core/exec/instructions.rst +++ b/document/core/exec/instructions.rst @@ -1776,7 +1776,7 @@ Most other vector instructions are defined in terms of numeric operators that ar :math:`\shape\K{.}\SPLAT` ......................... -1. Let :math:`t` be the type :math:`\unpacked(\shape)`. +1. Let :math:`t` be the type :math:`\unpackshape(\shape)`. 2. Assert: due to :ref:`validation `, a value of :ref:`value type ` :math:`t` is on the top of the stack. @@ -1791,7 +1791,7 @@ Most other vector instructions are defined in terms of numeric operators that ar .. math:: \begin{array}{lcl@{\qquad}l} (t\K{.}\CONST~c_1)~\shape\K{.}\SPLAT &\stepto& (\V128\K{.}\VCONST~c) - & (\iff t = \unpacked(\shape) + & (\iff t = \unpackshape(\shape) \wedge c = \lanes^{-1}_{\shape}(c_1^{\dim(\shape)})) \\ \end{array} @@ -1810,7 +1810,7 @@ Most other vector instructions are defined in terms of numeric operators that ar 4. Let :math:`i^\ast` be the result of computing :math:`\lanes_{t_1\K{x}N}(c_1)`. -5. Let :math:`t_2` be the type :math:`\unpacked(t_1\K{x}N)`. +5. Let :math:`t_2` be the type :math:`\unpackshape(t_1\K{x}N)`. 6. Let :math:`c_2` be the result of computing :math:`\extend^{sx^?}_{t_1,t_2}(i^\ast[x])`. @@ -1823,7 +1823,7 @@ Most other vector instructions are defined in terms of numeric operators that ar \end{array} \\ \qquad \begin{array}[t]{@{}r@{~}l@{}} - (\iff & t_2 = \unpacked(t_1\K{x}N) \\ + (\iff & t_2 = \unpackshape(t_1\K{x}N) \\ \wedge & c_2 = \extend^{sx^?}_{t_1,t_2}(\lanes_{t_1\K{x}N}(c_1)[x])) \end{array} \end{array} @@ -1836,7 +1836,7 @@ Most other vector instructions are defined in terms of numeric operators that ar 1. Assert: due to :ref:`validation `, :math:`x < \dim(\shape)`. -2. Let :math:`t_2` be the type :math:`\unpacked(\shape)`. +2. Let :math:`t_2` be the type :math:`\unpackshape(\shape)`. 3. Assert: due to :ref:`validation `, a value of :ref:`value type ` :math:`t_1` is on the top of the stack. @@ -1880,7 +1880,7 @@ Most other vector instructions are defined in terms of numeric operators that ar .. math:: \begin{array}{lcl@{\qquad}l} - (\V128\K{.}\VCONST~c_1)~\V128\K{.}\vunop &\stepto& (\V128\K{.}\VCONST~c) + (\V128\K{.}\VCONST~c_1)~\shape\K{.}\vunop &\stepto& (\V128\K{.}\VCONST~c) & (\iff c = \vunop_{\shape}(c_1)) \end{array} diff --git a/document/core/exec/runtime.rst b/document/core/exec/runtime.rst index f7b17be31..c1ca0bc57 100644 --- a/document/core/exec/runtime.rst +++ b/document/core/exec/runtime.rst @@ -506,7 +506,7 @@ Conventions .. math:: \begin{array}{@{}lcl} \packval_{\valtype}(\val) &=& \val \\ - \packval_{\packedtype}(\I32.\CONST~i) &=& \packedtype.\PACK~(\wrap_{32,|\packtype|}(i)) + \packval_{\packedtype}(\I32.\CONST~i) &=& \packedtype.\PACK~(\wrap_{32,|\packedtype|}(i)) \end{array} * The inverse conversion of a :ref:`field value ` to a regular :ref:`value ` is defined as follows: @@ -622,6 +622,7 @@ Conventions .. _syntax-trap: .. _syntax-reffuncaddr: .. _syntax-invoke: +.. _syntax-return_invoke: .. _syntax-instr-admin: Administrative Instructions diff --git a/document/core/index.bs b/document/core/index.bs index d27a96999..830c0595c 100644 --- a/document/core/index.bs +++ b/document/core/index.bs @@ -3,14 +3,16 @@ Title: WebAssembly Core Specification Shortname: wasm-core Group: wasm Status: ED +Issue Tracking: GitHub https://github.com/WebAssembly/spec/issues Level: 2 TR: https://www.w3.org/TR/wasm-core-2/ ED: https://webassembly.github.io/spec/core/bikeshed/ -Editor: Andreas Rossberg (Dfinity Stiftung) +Editor: Andreas Rossberg, w3cid 82328 Repository: WebAssembly/spec Markup Shorthands: css no, markdown no, algorithm no, idl no Abstract: This document describes release 2.0 of the core WebAssembly standard, a safe, portable, low-level code format designed for efficient execution and compact representation. Prepare For TR: true +Date: now 
diff --git a/document/core/syntax/types.rst b/document/core/syntax/types.rst
index 8cf9a7a44..406eebde7 100644
--- a/document/core/syntax/types.rst
+++ b/document/core/syntax/types.rst
@@ -82,6 +82,7 @@ Conventions
 .. _type-concrete:
 .. _syntax-i31:
 .. _syntax-heaptype:
+.. _syntax-absheaptype:
 
 Heap Types
 ~~~~~~~~~~
@@ -290,12 +291,21 @@ Structures are heterogeneous, but require static indexing, while arrays need to
    \end{array}
 
 .. _bitwidth-fieldtype:
+.. _aux-unpacktype:
 
 Conventions
 ...........
 
 * The notation :math:`|t|` for :ref:`bit width ` extends to packed types as well, that is, :math:`|\I8| = 8` and :math:`|\I16| = 16`.
 
+* The auxiliary function :math:`\unpacktype` maps a storage type to the :ref:`value type ` obtained when accessing a field:
+
+  .. math::
+     \begin{array}{lll}
+     \unpacktype(\valtype) &=& \valtype \\
+     \unpacktype(\packedtype) &=& \I32 \\
+     \end{array}
+
 
 .. index:: ! composite type, function type, aggreagate type, structure type, array type
    pair: abstract syntax; composite type
diff --git a/document/core/text/lexical.rst b/document/core/text/lexical.rst
index 4584b0c42..684688d49 100644
--- a/document/core/text/lexical.rst
+++ b/document/core/text/lexical.rst
@@ -71,8 +71,9 @@ Any token that does not fall into any of the other categories is considered *res
 
 .. index:: ! white space, character, ASCII
    single: text format; white space
-.. _text-format:
 .. _text-space:
+.. _text-format:
+.. _text-newline:
 
 White Space
 ~~~~~~~~~~~
diff --git a/document/core/text/modules.rst b/document/core/text/modules.rst
index 0e13e1922..591ca2e0a 100644
--- a/document/core/text/modules.rst
+++ b/document/core/text/modules.rst
@@ -573,7 +573,7 @@ As another abbreviation, element segments may also be specified inline with :ref
    single: data; segment
 .. _text-datastring:
 .. _text-data:
-.. _test-memuse:
+.. _text-memuse:
 
 Data Segments
 ~~~~~~~~~~~~~
diff --git a/document/core/util/bikeshed_fixup.py b/document/core/util/bikeshed_fixup.py
index 568c67b57..7041d875d 100755
--- a/document/core/util/bikeshed_fixup.py
+++ b/document/core/util/bikeshed_fixup.py
@@ -3,6 +3,7 @@
 
 import os
 import sys
+import re
 
 
 SCRIPT_DIR = os.path.dirname(os.path.realpath(__file__))
@@ -63,6 +64,28 @@ def Main():
       "[[!IEEE-754-2019]]"
   )
 
+  # Fix this problem that causes an  element to be generated in the output
+  # as a child of another  element, and for which the HTML validator reports
+  # an error — which in turn causes the W3C pubrules checker to refuse to
+  # autopublish the resulting bikeshed output.
+  data = data.replace(
+      """\href{#binary-sint}{\href{#syntax-int}""",
+      """{\href{#syntax-int}""")
+
+  # Strip the entire  element from the the sphinx output — because it
+  # contains several ,