diff --git a/Libraries/PeriphDrivers/Include/MAX78002/spi.h b/Libraries/PeriphDrivers/Include/MAX78002/spi.h index 5e68a225b9..78d7237246 100644 --- a/Libraries/PeriphDrivers/Include/MAX78002/spi.h +++ b/Libraries/PeriphDrivers/Include/MAX78002/spi.h @@ -707,6 +707,18 @@ unsigned int MXC_SPI_ReadRXFIFO(mxc_spi_regs_t *spi, unsigned char *bytes, unsig * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. */ int MXC_SPI_SetDefaultTXData(mxc_spi_regs_t *spi, unsigned int defaultTXData); + +/** + * @brief Enable/Disable HW CS control feature. + * + * Depending on the application, the user might need to manually drive the slave select pin. + * The SPI driver automatically drives the SS pin and this function enables/disables this + * feature. + * + * @param spi Pointer to SPI registers (selects the SPI block used.) + * @param state Non-zero values: enable HW SS mode. Zero: disable HW SS mode. + */ +void MXC_SPI_HWSSControl(mxc_spi_regs_t *spi, int state); //////<<< Previous Implementation /* ** DMA Functions ** */ diff --git a/Libraries/PeriphDrivers/Source/SPI/spi_ai87.c b/Libraries/PeriphDrivers/Source/SPI/spi_ai87.c index 3105f9c729..e124809090 100644 --- a/Libraries/PeriphDrivers/Source/SPI/spi_ai87.c +++ b/Libraries/PeriphDrivers/Source/SPI/spi_ai87.c @@ -477,6 +477,11 @@ void MXC_SPI_AsyncHandler(mxc_spi_regs_t *spi) MXC_SPI_RevA1_AsyncHandler((mxc_spi_reva_regs_t *)spi); } +void MXC_SPI_HWSSControl(mxc_spi_regs_t *spi, int state) +{ + MXC_SPI_RevA1_HWSSControl((mxc_spi_reva_regs_t *)spi, state); +} + /* ** SPI v2 functions to prevent build errors ** */ int MXC_SPI_Config(mxc_spi_cfg_t *cfg) diff --git a/Libraries/PeriphDrivers/Source/SPI/spi_ai87_v2.c b/Libraries/PeriphDrivers/Source/SPI/spi_ai87_v2.c index d6e778afb1..b04c975b34 100644 --- a/Libraries/PeriphDrivers/Source/SPI/spi_ai87_v2.c +++ b/Libraries/PeriphDrivers/Source/SPI/spi_ai87_v2.c @@ -812,3 +812,8 @@ int MXC_SPI_SetDefaultTXData(mxc_spi_regs_t *spi, unsigned int defaultTXData) { return MXC_SPI_RevA2_SetDummyTX((mxc_spi_reva_regs_t *)spi, defaultTXData); } + +void MXC_SPI_HWSSControl(mxc_spi_regs_t *spi, int state) +{ + MXC_ASSERT(0); +}