From 3ea0c6a8126ec4dbfbfe2bf21f003664f5f831ee Mon Sep 17 00:00:00 2001 From: mean Date: Tue, 3 Dec 2024 19:34:58 +0100 Subject: [PATCH] Arm-v8m : update watchpoing / dwtv2 --- src/target/cortexm.c | 18 +++++++++--------- src/target/cortexm.h | 15 +++++++-------- 2 files changed, 16 insertions(+), 17 deletions(-) diff --git a/src/target/cortexm.c b/src/target/cortexm.c index bd1d8a20b34..fe999bafb0a 100644 --- a/src/target/cortexm.c +++ b/src/target/cortexm.c @@ -1062,23 +1062,23 @@ static uint32_t cortexm_dwt_func(target_s *target, target_breakwatch_e type) } } -static uint32_t cortexm_dwt_func_v8m(target_s *target, target_breakwatch_e type, size_t len) +static uint32_t cortexm_dwtv2_func(target_breakwatch_e type, size_t len) { - uint32_t x = CORTEXM_DWT_FUNC_ACTION_DEBUG_EVENT_V8M; + uint32_t value = CORTEXM_DWTv2_FUNC_ACTION_DEBUG_EVENT | CORTEXM_DWTv2_FUNC_LEN_VALUE(len); switch (type) { case TARGET_WATCH_WRITE: - x |= CORTEXM_DWT_FUNC_MATCH_WRITE_V8M; + value |= CORTEXM_DWTv2_FUNC_MATCH_WRITE; break; case TARGET_WATCH_READ: - x |= CORTEXM_DWT_FUNC_MATCH_READ_V8M; + value |= CORTEXM_DWTv2_FUNC_MATCH_READ; break; case TARGET_WATCH_ACCESS: - x |= CORTEXM_DWT_FUNC_MATCH_ACCESS_V8M; + value |= CORTEXM_DWTv2_FUNC_MATCH_ACCESS; + break; default: - return -1; + return 0U; } - x |= CORTEXM_DWT_FUNC_LEN_VALUE(len); - return x; + return value; } static int cortexm_breakwatch_set(target_s *target, breakwatch_s *breakwatch) @@ -1125,7 +1125,7 @@ static int cortexm_breakwatch_set(target_s *target, breakwatch_s *breakwatch) if ((target->target_options & CORTEXM_TOPT_FLAVOUR_V8M)) { target_mem32_write32(target, CORTEXM_DWT_COMP(i), val); target_mem32_write32( - target, CORTEXM_DWT_FUNC(i), cortexm_dwt_func_v8m(target, breakwatch->type, breakwatch->size)); + target, CORTEXM_DWT_FUNC(i), cortexm_dwtv2_func( breakwatch->type, breakwatch->size)); } else { target_mem32_write32(target, CORTEXM_DWT_COMP(i), val); target_mem32_write32(target, CORTEXM_DWT_MASK(i), cortexm_dwt_mask(breakwatch->size)); diff --git a/src/target/cortexm.h b/src/target/cortexm.h index b00cfe650d8..6af4ae432d6 100644 --- a/src/target/cortexm.h +++ b/src/target/cortexm.h @@ -165,14 +165,13 @@ extern unsigned cortexm_wait_timeout; #define CORTEXM_DWT_FUNC_FUNC_WRITE (6U << 0U) #define CORTEXM_DWT_FUNC_FUNC_ACCESS (7U << 0U) /* Variant for V8M */ -#define CORTEXM_DWT_FUNC_MATCH_READ_V8M (6U << 0U) -#define CORTEXM_DWT_FUNC_MATCH_WRITE_V8M (5U << 0U) -#define CORTEXM_DWT_FUNC_MATCH_ACCESS_V8M (4U << 0U) -#define CORTEXM_DWT_FUNC_ACTION_TRIGGER_V8M (0U << 4U) -#define CORTEXM_DWT_FUNC_ACTION_DEBUG_EVENT_V8M (1U << 4U) -#define CORTEXM_DWT_FUNC_LEN_VALUE(len) (((len) >> 1) << 10U) - -/* */ +#define CORTEXM_DWTv2_FUNC_MATCH_READ (6U << 0U) +#define CORTEXM_DWTv2_FUNC_MATCH_WRITE (5U << 0U) +#define CORTEXM_DWTv2_FUNC_MATCH_ACCESS (4U << 0U) +#define CORTEXM_DWTv2_FUNC_ACTION_TRIGGER (0U << 4U) +#define CORTEXM_DWTv2_FUNC_ACTION_DEBUG_EVENT (1U << 4U) +#define CORTEXM_DWTv2_FUNC_LEN_VALUE(len) (((len) >> 1) << 10U) + #define CORTEXM_XPSR_THUMB (1U << 24U) #define CORTEXM_XPSR_EXCEPTION_MASK 0x0000001fU