diff --git a/src/target/riscv_debug.c b/src/target/riscv_debug.c
index df4066b2697..aa5e74e5e3e 100644
--- a/src/target/riscv_debug.c
+++ b/src/target/riscv_debug.c
@@ -847,6 +847,7 @@ static void riscv_reset(target_s *const target)
 	}
 	/* Acknowledge the reset */
 	riscv_dm_write(hart->dbg_module, RV_DM_CONTROL, hart->hartsel | RV_DM_CTRL_HART_ACK_RESET);
+	riscv_halt_request(target);
 	target_check_error(target);
 }