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another code duplication fix in CPUDB code
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@stlintel
stlintel committed Oct 6, 2023
1 parent 20dfe7c commit 6d83b52
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Showing 29 changed files with 192 additions and 805 deletions.
20 changes: 1 addition & 19 deletions bochs/cpu/cpudb/amd/amd_k6_2_chomper.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -134,25 +134,7 @@ void amd_k6_2_chomper_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf) const
// [29:29] TM: Thermal Monitor
// [30:30] Reserved
// [31:31] PBE: Pending Break Enable

leaf->edx = BX_CPUID_STD_X87 |
BX_CPUID_STD_VME |
BX_CPUID_STD_DEBUG_EXTENSIONS |
BX_CPUID_STD_PSE |
BX_CPUID_STD_TSC |
BX_CPUID_STD_MSR |
BX_CPUID_STD_MCE |
BX_CPUID_STD_CMPXCHG8B |
#if BX_PHY_ADDRESS_LONG
BX_CPUID_STD_PSE36 |
#endif
BX_CPUID_STD_MMX;
#if BX_SUPPORT_APIC
// if MSR_APICBASE APIC Global Enable bit has been cleared,
// the CPUID feature flag for the APIC is set to 0.
if (cpu->msr.apicbase & 0x800)
leaf->edx |= BX_CPUID_STD_APIC; // APIC on chip
#endif
leaf->edx = get_std_cpuid_leaf_1_edx(BX_CPUID_STD_MCE);
}

// leaf 0x80000000 //
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28 changes: 1 addition & 27 deletions bochs/cpu/cpudb/amd/athlon64_clawhammer.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -167,33 +167,7 @@ void athlon64_clawhammer_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf) const
// [29:29] TM: Thermal Monitor
// [30:30] Reserved
// [31:31] PBE: Pending Break Enable
leaf->edx = BX_CPUID_STD_X87 |
BX_CPUID_STD_VME |
BX_CPUID_STD_DEBUG_EXTENSIONS |
BX_CPUID_STD_PSE |
BX_CPUID_STD_TSC |
BX_CPUID_STD_MSR |
BX_CPUID_STD_PAE |
BX_CPUID_STD_MCE |
BX_CPUID_STD_CMPXCHG8B |
BX_CPUID_STD_SYSENTER_SYSEXIT |
BX_CPUID_STD_MTRR |
BX_CPUID_STD_GLOBAL_PAGES |
BX_CPUID_STD_MCA |
BX_CPUID_STD_CMOV |
BX_CPUID_STD_PAT |
BX_CPUID_STD_PSE36 |
BX_CPUID_STD_CLFLUSH |
BX_CPUID_STD_MMX |
BX_CPUID_STD_FXSAVE_FXRSTOR |
BX_CPUID_STD_SSE |
BX_CPUID_STD_SSE2;
#if BX_SUPPORT_APIC
// if MSR_APICBASE APIC Global Enable bit has been cleared,
// the CPUID feature flag for the APIC is set to 0.
if (cpu->msr.apicbase & 0x800)
leaf->edx |= BX_CPUID_STD_APIC; // APIC on chip
#endif
leaf->edx = get_std_cpuid_leaf_1_edx(BX_CPUID_STD_MCE | BX_CPUID_STD_MCA);
}

// leaf 0x80000000 //
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28 changes: 1 addition & 27 deletions bochs/cpu/cpudb/amd/athlon64_venice.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -201,33 +201,7 @@ void athlon64_venice_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf) const
// [29:29] TM: Thermal Monitor
// [30:30] Reserved
// [31:31] PBE: Pending Break Enable
leaf->edx = BX_CPUID_STD_X87 |
BX_CPUID_STD_VME |
BX_CPUID_STD_DEBUG_EXTENSIONS |
BX_CPUID_STD_PSE |
BX_CPUID_STD_TSC |
BX_CPUID_STD_MSR |
BX_CPUID_STD_PAE |
BX_CPUID_STD_MCE |
BX_CPUID_STD_CMPXCHG8B |
BX_CPUID_STD_SYSENTER_SYSEXIT |
BX_CPUID_STD_MTRR |
BX_CPUID_STD_GLOBAL_PAGES |
BX_CPUID_STD_MCA |
BX_CPUID_STD_CMOV |
BX_CPUID_STD_PAT |
BX_CPUID_STD_PSE36 |
BX_CPUID_STD_CLFLUSH |
BX_CPUID_STD_MMX |
BX_CPUID_STD_FXSAVE_FXRSTOR |
BX_CPUID_STD_SSE |
BX_CPUID_STD_SSE2;
#if BX_SUPPORT_APIC
// if MSR_APICBASE APIC Global Enable bit has been cleared,
// the CPUID feature flag for the APIC is set to 0.
if (cpu->msr.apicbase & 0x800)
leaf->edx |= BX_CPUID_STD_APIC; // APIC on chip
#endif
leaf->edx = get_std_cpuid_leaf_1_edx(BX_CPUID_STD_MCE | BX_CPUID_STD_MCA);
}

// leaf 0x80000000 //
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31 changes: 2 additions & 29 deletions bochs/cpu/cpudb/amd/phenomx3_8650_toliman.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -258,36 +258,9 @@ void phenom_8650_toliman_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf) const
// [29:29] TM: Thermal Monitor
// [30:30] Reserved
// [31:31] PBE: Pending Break Enable
leaf->edx = BX_CPUID_STD_X87 |
BX_CPUID_STD_VME |
BX_CPUID_STD_DEBUG_EXTENSIONS |
BX_CPUID_STD_PSE |
BX_CPUID_STD_TSC |
BX_CPUID_STD_MSR |
BX_CPUID_STD_PAE |
BX_CPUID_STD_MCE |
BX_CPUID_STD_CMPXCHG8B |
BX_CPUID_STD_SYSENTER_SYSEXIT |
BX_CPUID_STD_MTRR |
BX_CPUID_STD_GLOBAL_PAGES |
BX_CPUID_STD_MCA |
BX_CPUID_STD_CMOV |
BX_CPUID_STD_PAT |
BX_CPUID_STD_PSE36 |
BX_CPUID_STD_CLFLUSH |
BX_CPUID_STD_MMX |
BX_CPUID_STD_FXSAVE_FXRSTOR |
BX_CPUID_STD_SSE |
BX_CPUID_STD_SSE2
leaf->edx = get_std_cpuid_leaf_1_edx(BX_CPUID_STD_MCE | BX_CPUID_STD_MCA);
#if BX_SUPPORT_SMP
| BX_CPUID_STD_HT
#endif
;
#if BX_SUPPORT_APIC
// if MSR_APICBASE APIC Global Enable bit has been cleared,
// the CPUID feature flag for the APIC is set to 0.
if (cpu->msr.apicbase & 0x800)
leaf->edx |= BX_CPUID_STD_APIC; // APIC on chip
leaf->edx |= BX_CPUID_STD_HT;
#endif
}

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31 changes: 2 additions & 29 deletions bochs/cpu/cpudb/amd/ryzen.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -312,36 +312,9 @@ void ryzen_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf) const
// [29:29] TM: Thermal Monitor
// [30:30] Reserved
// [31:31] PBE: Pending Break Enable
leaf->edx = BX_CPUID_STD_X87 |
BX_CPUID_STD_VME |
BX_CPUID_STD_DEBUG_EXTENSIONS |
BX_CPUID_STD_PSE |
BX_CPUID_STD_TSC |
BX_CPUID_STD_MSR |
BX_CPUID_STD_PAE |
BX_CPUID_STD_MCE |
BX_CPUID_STD_CMPXCHG8B |
BX_CPUID_STD_SYSENTER_SYSEXIT |
BX_CPUID_STD_MTRR |
BX_CPUID_STD_GLOBAL_PAGES |
BX_CPUID_STD_MCA |
BX_CPUID_STD_CMOV |
BX_CPUID_STD_PAT |
BX_CPUID_STD_PSE36 |
BX_CPUID_STD_CLFLUSH |
BX_CPUID_STD_MMX |
BX_CPUID_STD_FXSAVE_FXRSTOR |
BX_CPUID_STD_SSE |
BX_CPUID_STD_SSE2
leaf->edx = get_std_cpuid_leaf_1_edx(BX_CPUID_STD_MCE | BX_CPUID_STD_MCA);
#if BX_SUPPORT_SMP
| BX_CPUID_STD_HT
#endif
;
#if BX_SUPPORT_APIC
// if MSR_APICBASE APIC Global Enable bit has been cleared,
// the CPUID feature flag for the APIC is set to 0.
if (cpu->msr.apicbase & 0x800)
leaf->edx |= BX_CPUID_STD_APIC; // APIC on chip
leaf->edx |= BX_CPUID_STD_HT;
#endif
}

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31 changes: 2 additions & 29 deletions bochs/cpu/cpudb/amd/trinity_apu.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -296,36 +296,9 @@ void trinity_apu_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf) const
// [29:29] TM: Thermal Monitor
// [30:30] Reserved
// [31:31] PBE: Pending Break Enable
leaf->edx = BX_CPUID_STD_X87 |
BX_CPUID_STD_VME |
BX_CPUID_STD_DEBUG_EXTENSIONS |
BX_CPUID_STD_PSE |
BX_CPUID_STD_TSC |
BX_CPUID_STD_MSR |
BX_CPUID_STD_PAE |
BX_CPUID_STD_MCE |
BX_CPUID_STD_CMPXCHG8B |
BX_CPUID_STD_SYSENTER_SYSEXIT |
BX_CPUID_STD_MTRR |
BX_CPUID_STD_GLOBAL_PAGES |
BX_CPUID_STD_MCA |
BX_CPUID_STD_CMOV |
BX_CPUID_STD_PAT |
BX_CPUID_STD_PSE36 |
BX_CPUID_STD_CLFLUSH |
BX_CPUID_STD_MMX |
BX_CPUID_STD_FXSAVE_FXRSTOR |
BX_CPUID_STD_SSE |
BX_CPUID_STD_SSE2
leaf->edx = get_std_cpuid_leaf_1_edx(BX_CPUID_STD_MCE | BX_CPUID_STD_MCA);
#if BX_SUPPORT_SMP
| BX_CPUID_STD_HT
#endif
;
#if BX_SUPPORT_APIC
// if MSR_APICBASE APIC Global Enable bit has been cleared,
// the CPUID feature flag for the APIC is set to 0.
if (cpu->msr.apicbase & 0x800)
leaf->edx |= BX_CPUID_STD_APIC; // APIC on chip
leaf->edx |= BX_CPUID_STD_HT;
#endif
}

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31 changes: 2 additions & 29 deletions bochs/cpu/cpudb/amd/turion64_tyler.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -214,36 +214,9 @@ void turion64_tyler_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf) const
// [29:29] TM: Thermal Monitor
// [30:30] Reserved
// [31:31] PBE: Pending Break Enable
leaf->edx = BX_CPUID_STD_X87 |
BX_CPUID_STD_VME |
BX_CPUID_STD_DEBUG_EXTENSIONS |
BX_CPUID_STD_PSE |
BX_CPUID_STD_TSC |
BX_CPUID_STD_MSR |
BX_CPUID_STD_PAE |
BX_CPUID_STD_MCE |
BX_CPUID_STD_CMPXCHG8B |
BX_CPUID_STD_SYSENTER_SYSEXIT |
BX_CPUID_STD_MTRR |
BX_CPUID_STD_GLOBAL_PAGES |
BX_CPUID_STD_MCA |
BX_CPUID_STD_CMOV |
BX_CPUID_STD_PAT |
BX_CPUID_STD_PSE36 |
BX_CPUID_STD_CLFLUSH |
BX_CPUID_STD_MMX |
BX_CPUID_STD_FXSAVE_FXRSTOR |
BX_CPUID_STD_SSE |
BX_CPUID_STD_SSE2
leaf->edx = get_std_cpuid_leaf_1_edx(BX_CPUID_STD_MCE | BX_CPUID_STD_MCA);
#if BX_SUPPORT_SMP
| BX_CPUID_STD_HT
#endif
;
#if BX_SUPPORT_APIC
// if MSR_APICBASE APIC Global Enable bit has been cleared,
// the CPUID feature flag for the APIC is set to 0.
if (cpu->msr.apicbase & 0x800)
leaf->edx |= BX_CPUID_STD_APIC; // APIC on chip
leaf->edx |= BX_CPUID_STD_HT;
#endif
}

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31 changes: 2 additions & 29 deletions bochs/cpu/cpudb/amd/zambezi.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -289,36 +289,9 @@ void zambezi_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf) const
// [29:29] TM: Thermal Monitor
// [30:30] Reserved
// [31:31] PBE: Pending Break Enable
leaf->edx = BX_CPUID_STD_X87 |
BX_CPUID_STD_VME |
BX_CPUID_STD_DEBUG_EXTENSIONS |
BX_CPUID_STD_PSE |
BX_CPUID_STD_TSC |
BX_CPUID_STD_MSR |
BX_CPUID_STD_PAE |
BX_CPUID_STD_MCE |
BX_CPUID_STD_CMPXCHG8B |
BX_CPUID_STD_SYSENTER_SYSEXIT |
BX_CPUID_STD_MTRR |
BX_CPUID_STD_GLOBAL_PAGES |
BX_CPUID_STD_MCA |
BX_CPUID_STD_CMOV |
BX_CPUID_STD_PAT |
BX_CPUID_STD_PSE36 |
BX_CPUID_STD_CLFLUSH |
BX_CPUID_STD_MMX |
BX_CPUID_STD_FXSAVE_FXRSTOR |
BX_CPUID_STD_SSE |
BX_CPUID_STD_SSE2
leaf->edx = get_std_cpuid_leaf_1_edx(BX_CPUID_STD_MCE | BX_CPUID_STD_MCA);
#if BX_SUPPORT_SMP
| BX_CPUID_STD_HT
#endif
;
#if BX_SUPPORT_APIC
// if MSR_APICBASE APIC Global Enable bit has been cleared,
// the CPUID feature flag for the APIC is set to 0.
if (cpu->msr.apicbase & 0x800)
leaf->edx |= BX_CPUID_STD_APIC; // APIC on chip
leaf->edx |= BX_CPUID_STD_HT;
#endif
}

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43 changes: 8 additions & 35 deletions bochs/cpu/cpudb/intel/atom_n270.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -237,43 +237,16 @@ void atom_n270_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf) const
// * [29:29] TM: Thermal Monitor
// [30:30] Reserved
// * [31:31] PBE: Pending Break Enable
leaf->edx = BX_CPUID_STD_X87 |
BX_CPUID_STD_VME |
BX_CPUID_STD_DEBUG_EXTENSIONS |
BX_CPUID_STD_PSE |
BX_CPUID_STD_TSC |
BX_CPUID_STD_MSR |
BX_CPUID_STD_PAE |
BX_CPUID_STD_MCE |
BX_CPUID_STD_CMPXCHG8B |
BX_CPUID_STD_SYSENTER_SYSEXIT |
BX_CPUID_STD_MTRR |
BX_CPUID_STD_GLOBAL_PAGES |
BX_CPUID_STD_MCA |
BX_CPUID_STD_CMOV |
BX_CPUID_STD_PAT |
#if BX_PHY_ADDRESS_LONG
BX_CPUID_STD_PSE36 |
#endif
BX_CPUID_STD_CLFLUSH |
BX_CPUID_STD_DEBUG_STORE |
BX_CPUID_STD_ACPI |
BX_CPUID_STD_MMX |
BX_CPUID_STD_FXSAVE_FXRSTOR |
BX_CPUID_STD_SSE |
BX_CPUID_STD_SSE2 |
BX_CPUID_STD_SELF_SNOOP |
leaf->edx = get_std_cpuid_leaf_1_edx(BX_CPUID_STD_MCE |
BX_CPUID_STD_MCA |
BX_CPUID_STD_DEBUG_STORE |
BX_CPUID_STD_ACPI |
BX_CPUID_STD_SELF_SNOOP |
#if BX_SUPPORT_SMP
BX_CPUID_STD_HT |
#endif
BX_CPUID_STD_THERMAL_MONITOR |
BX_CPUID_STD_PBE;
#if BX_SUPPORT_APIC
// if MSR_APICBASE APIC Global Enable bit has been cleared,
// the CPUID feature flag for the APIC is set to 0.
if (cpu->msr.apicbase & 0x800)
leaf->edx |= BX_CPUID_STD_APIC; // APIC on chip
BX_CPUID_STD_HT |
#endif
BX_CPUID_STD_THERMAL_MONITOR |
BX_CPUID_STD_PBE);
}

// leaf 0x00000002 //
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41 changes: 8 additions & 33 deletions bochs/cpu/cpudb/intel/broadwell_ult.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -342,41 +342,16 @@ void broadwell_ult_t::get_std_cpuid_leaf_1(cpuid_function_t *leaf) const
// * [29:29] TM: Thermal Monitor
// [30:30] Reserved
// * [31:31] PBE: Pending Break Enable
leaf->edx = BX_CPUID_STD_X87 |
BX_CPUID_STD_VME |
BX_CPUID_STD_DEBUG_EXTENSIONS |
BX_CPUID_STD_PSE |
BX_CPUID_STD_TSC |
BX_CPUID_STD_MSR |
BX_CPUID_STD_PAE |
BX_CPUID_STD_MCE |
BX_CPUID_STD_CMPXCHG8B |
BX_CPUID_STD_SYSENTER_SYSEXIT |
BX_CPUID_STD_MTRR |
BX_CPUID_STD_GLOBAL_PAGES |
BX_CPUID_STD_MCA |
BX_CPUID_STD_CMOV |
BX_CPUID_STD_PAT |
BX_CPUID_STD_PSE36 |
BX_CPUID_STD_CLFLUSH |
BX_CPUID_STD_DEBUG_STORE |
BX_CPUID_STD_ACPI |
BX_CPUID_STD_MMX |
BX_CPUID_STD_FXSAVE_FXRSTOR |
BX_CPUID_STD_SSE |
BX_CPUID_STD_SSE2 |
BX_CPUID_STD_SELF_SNOOP |
leaf->edx = get_std_cpuid_leaf_1_edx(BX_CPUID_STD_MCE |
BX_CPUID_STD_MCA |
BX_CPUID_STD_DEBUG_STORE |
BX_CPUID_STD_ACPI |
BX_CPUID_STD_SELF_SNOOP |
#if BX_SUPPORT_SMP
BX_CPUID_STD_HT |
#endif
BX_CPUID_STD_THERMAL_MONITOR |
BX_CPUID_STD_PBE;
#if BX_SUPPORT_APIC
// if MSR_APICBASE APIC Global Enable bit has been cleared,
// the CPUID feature flag for the APIC is set to 0.
if (cpu->msr.apicbase & 0x800)
leaf->edx |= BX_CPUID_STD_APIC; // APIC on chip
BX_CPUID_STD_HT |
#endif
BX_CPUID_STD_THERMAL_MONITOR |
BX_CPUID_STD_PBE);
}

// leaf 0x00000002 //
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