diff --git a/bin/klaus.bin b/bin/klaus_6502.bin similarity index 100% rename from bin/klaus.bin rename to bin/klaus_6502.bin diff --git a/bin/klaus_65C02.bin b/bin/klaus_65C02.bin new file mode 100644 index 0000000..b1ea946 Binary files /dev/null and b/bin/klaus_65C02.bin differ diff --git a/src/cpu/execute.rs b/src/cpu/execute.rs index a2279a4..a19402e 100644 --- a/src/cpu/execute.rs +++ b/src/cpu/execute.rs @@ -2,6 +2,8 @@ use crate::cpu::fetch::Fetch; use crate::cpu::registers::{flags, Alu}; use crate::cpu::{InterruptHandler, MemoryIO, Mos6502, Stack}; +use super::Mos6502Variant; + pub trait Execute { /// Execute the given opcode, returning either the number of cycles used or an error. fn execute(&mut self, opcode: u8) -> Result; @@ -11,7 +13,7 @@ impl Execute for Mos6502 { fn execute(&mut self, opcode: u8) -> Result { match opcode { // === LOAD === - 0xA1 | 0xA5 | 0xA9 | 0xAD | 0xB1 | 0xB5 | 0xB9 | 0xBD => { + 0xA1 | 0xA5 | 0xA9 | 0xAD | 0xB1 | 0xB2 | 0xB5 | 0xB9 | 0xBD => { // LDA let (value, cycles) = self.fetch_operand_value(opcode); self.registers.a = value; @@ -36,7 +38,7 @@ impl Execute for Mos6502 { } // === STORE === - 0x81 | 0x85 | 0x8D | 0x91 | 0x95 | 0x99 | 0x9D => { + 0x81 | 0x85 | 0x8D | 0x91 | 0x92 | 0x95 | 0x99 | 0x9D => { // STA let (address, cycles) = self.fetch_operand_address(opcode); self.write(address, self.registers.a); @@ -133,6 +135,10 @@ impl Execute for Mos6502 { // ASL let (address, cycles) = self.fetch_operand_address(opcode); let value = self.read(address); + + if let Mos6502Variant::NMOS = self.variant { + self.write(address, value); + } let result = value << 1; self.registers.sr.write(flags::CARRY, value & 0x80 != 0); @@ -154,6 +160,11 @@ impl Execute for Mos6502 { // LSR let (address, cycles) = self.fetch_operand_address(opcode); let value = self.read(address); + + if let Mos6502Variant::NMOS = self.variant { + self.write(address, value); + } + let result = value >> 1; self.registers.sr.write(flags::CARRY, value & 0x01 != 0); @@ -176,6 +187,11 @@ impl Execute for Mos6502 { // ROL let (address, cycles) = self.fetch_operand_address(opcode); let value = self.read(address); + + if let Mos6502Variant::NMOS = self.variant { + self.write(address, value); + } + let result = (value << 1) | (self.registers.sr.read(flags::CARRY) as u8); self.registers.sr.write(flags::CARRY, value & 0x80 != 0); @@ -198,6 +214,11 @@ impl Execute for Mos6502 { // ROR let (address, cycles) = self.fetch_operand_address(opcode); let value = self.read(address); + + if let Mos6502Variant::NMOS = self.variant { + self.write(address, value); + } + let result = value >> 1 | (self.registers.sr.read(flags::CARRY) as u8) << 7; self.registers.sr.write(flags::CARRY, value & 0x01 != 0); @@ -207,7 +228,7 @@ impl Execute for Mos6502 { } // === LOGIC === - 0x21 | 0x25 | 0x29 | 0x2D | 0x31 | 0x35 | 0x39 | 0x3D => { + 0x21 | 0x25 | 0x29 | 0x2D | 0x31 | 0x32 | 0x35 | 0x39 | 0x3D => { // AND let (value, cycles) = self.fetch_operand_value(opcode); self.registers.a &= value; @@ -227,7 +248,7 @@ impl Execute for Mos6502 { Ok(cycles) } - 0x41 | 0x45 | 0x49 | 0x4D | 0x51 | 0x55 | 0x59 | 0x5D => { + 0x41 | 0x45 | 0x49 | 0x4D | 0x51 | 0x52 | 0x55 | 0x59 | 0x5D => { // EOR let (value, cycles) = self.fetch_operand_value(opcode); self.registers.a ^= value; @@ -235,7 +256,7 @@ impl Execute for Mos6502 { Ok(cycles) } - 0x01 | 0x05 | 0x09 | 0x0D | 0x11 | 0x15 | 0x19 | 0x1D => { + 0x01 | 0x05 | 0x09 | 0x0D | 0x11 | 0x12 | 0x15 | 0x19 | 0x1D => { // ORA let (value, cycles) = self.fetch_operand_value(opcode); self.registers.a |= value; @@ -244,14 +265,14 @@ impl Execute for Mos6502 { } // === ARITHMETIC === - 0x61 | 0x65 | 0x69 | 0x6D | 0x71 | 0x75 | 0x79 | 0x7D => { + 0x61 | 0x65 | 0x69 | 0x6D | 0x71 | 0x72 | 0x75 | 0x79 | 0x7D => { // ADC let (value, cycles) = self.fetch_operand_value(opcode); self.registers.alu_add(value); Ok(cycles) } - 0xC1 | 0xC5 | 0xC9 | 0xCD | 0xD1 | 0xD5 | 0xD9 | 0xDD => { + 0xC1 | 0xC5 | 0xC9 | 0xCD | 0xD1 | 0xD2 | 0xD5 | 0xD9 | 0xDD => { // CMP let (value, cycles) = self.fetch_operand_value(opcode); self.registers.alu_compare(self.registers.a, value); @@ -272,7 +293,7 @@ impl Execute for Mos6502 { Ok(cycles) } - 0xE1 | 0xE5 | 0xE9 | 0xED | 0xF1 | 0xF5 | 0xF9 | 0xFD => { + 0xE1 | 0xE5 | 0xE9 | 0xED | 0xF1 | 0xF2 | 0xF5 | 0xF9 | 0xFD => { // SBC let (value, cycles) = self.fetch_operand_value(opcode); self.registers.alu_subtract(value); @@ -341,7 +362,15 @@ impl Execute for Mos6502 { 0x4C => (self.fetch_word(), 3), 0x6C => { let indirect = self.fetch_word(); - (self.read_word(indirect), 5) + + if self.variant == Mos6502Variant::NMOS && indirect & 0xFF == 0xFF { + let lo = self.read(indirect); + let hi = self.read(indirect & 0xFF00); + ((hi as u16) << 8 | lo as u16, 5) + } else { + // normal behavior + (self.read_word(indirect), 5) + } } _ => unreachable!(), }; @@ -426,26 +455,19 @@ impl Execute for Mos6502 { Ok(2) } - // === ILLEGAL OPCODES === - // TODO: Verify cycle counts - 0x04 | 0x0C | 0x14 | 0x1A | 0x1C | 0x34 | 0x3A | 0x3C | 0x44 | 0x54 | 0x5A | 0x5C | 0x64 - | 0x74 | 0x7A | 0x7C | 0x80 | 0x82 | 0x89 | 0xC2 | 0xD4 | 0xDA | 0xDC | 0xE2 | 0xF4 - | 0xFA | 0xFC => { - // NOP - match opcode { - 0x1A | 0x3A | 0x5A | 0x7A | 0xDA | 0xFA => { - // No address - Ok(2) - } - _ => { - // Address - let (_value, cycles) = self.fetch_operand_value(opcode); - Ok(cycles) - } - } - } + _ => match self.variant { + Mos6502Variant::NMOS => self.execute_nmos_extensions(opcode), + Mos6502Variant::CMOS => self.execute_cmos_extensions(opcode), + }, + } + } +} - 0x02 | 0x12 | 0x22 | 0x32 | 0x42 | 0x52 | 0x62 | 0x72 | 0x92 | 0xB2 | 0xD2 | 0xF2 => { +impl Mos6502 { + fn execute_nmos_extensions(&mut self, opcode: u8) -> Result { + match opcode { + // === ILLEGAL OPCODES === + 0x02 | 0x22 | 0x42 | 0x62 => { // STP or KIL or JAM or HLT depending on who you ask println!("Execution stopped"); Err(()) @@ -712,6 +734,216 @@ impl Execute for Mos6502 { Ok(cycles) } + + // TODO: Verify cycle counts + _ => { + // NOP + match opcode { + 0x1A | 0x3A | 0x5A | 0x7A | 0xDA | 0xFA => { + // No address + Ok(2) + } + _ => { + // Address + let (_value, cycles) = self.fetch_operand_value(opcode); + Ok(cycles) + } + } + } + } + } + + fn execute_cmos_extensions(&mut self, opcode: u8) -> Result { + match opcode { + 0x89 | 0x34 | 0x3C => { + // BIT (3 extra addressing modes) + let (value, cycles) = self.fetch_operand_value(opcode); + + if opcode != 0x89 { + // N, V flags not set for immediate + self.registers.sr.write(flags::NEGATIVE, value & 0x80 != 0); + self.registers.sr.write(flags::OVERFLOW, value & 0x40 != 0); + } + + self + .registers + .sr + .write(flags::ZERO, value & self.registers.a == 0); + Ok(cycles) + } + + 0x3A => { + // DEC (like DEX/DEY but for accumulator) + self.registers.a = self.registers.a.wrapping_sub(1); + self.registers.sr.set_nz(self.registers.a); + Ok(2) + } + + 0x1A => { + // INC (like INX/INY but for accumulator) + self.registers.a = self.registers.a.wrapping_add(1); + self.registers.sr.set_nz(self.registers.a); + Ok(2) + } + + 0x7C => { + // JMP (abs,X) + let address = self.fetch_word(); + let pointer = address + self.registers.x as u16; + let address = self.read_word(pointer); + self.registers.pc.load(address); + Ok(6) + } + + 0x80 => { + // BRA (branch Always) + let offset = self.fetch() as i8; + self.registers.pc.offset(offset); + Ok(3) + } + + // New Stack Instructions + 0xDA => { + // PHX (push X onto stack) + self.push(self.registers.x); + Ok(3) + } + 0x5A => { + // PHY (push Y onto stack) + self.push(self.registers.y); + Ok(3) + } + 0xFA => { + // PLX (pull X from stack) + let value = self.pop(); + self.registers.x = value; + self.registers.sr.set_nz(value); + Ok(4) + } + 0x7A => { + // PLY (pull Y from stack) + let value = self.pop(); + self.registers.y = value; + self.registers.sr.set_nz(value); + Ok(4) + } + + 0x64 | 0x74 | 0x9C | 0x9E => { + // STZ (store zero) + // Note: 0x9C breaks the typical addressing mode pattern + let (address, cycles) = match opcode { + 0x9C => (self.fetch_word(), 4), + 0x9E => { + let base = self.fetch_word(); + let indexed = base + self.registers.x as u16; + (indexed, 4) + } + _ => self.fetch_operand_address(opcode), + }; + + self.write(address, 0); + Ok(cycles) + } + + 0x14 | 0x1C => { + // TRB (test and reset bits) + let (address, cycles) = match opcode { + 0x14 => (self.fetch() as u16, 3), + 0x1C => (self.fetch_word(), 4), + _ => unreachable!(), + }; + let value = self.read(address); + + self + .registers + .sr + .write(flags::ZERO, value & self.registers.a == 0); + + self.write(address, value & !self.registers.a); + Ok(cycles) + } + + 0x04 | 0x0C => { + // TSB (test and set bits) + let (address, cycles) = match opcode { + 0x04 => (self.fetch() as u16, 3), + 0x0C => (self.fetch_word(), 4), + _ => unreachable!(), + }; + let value = self.read(address); + + self + .registers + .sr + .write(flags::ZERO, value & self.registers.a == 0); + + self.write(address, value | self.registers.a); + Ok(cycles) + } + + 0x0F | 0x1F | 0x2F | 0x3F | 0x4F | 0x5F | 0x6F | 0x7F | 0x8F | 0x9F | 0xAF | 0xBF | 0xCF + | 0xDF | 0xEF | 0xFF => { + // BBS and BBR + let address = self.fetch() as u16; + let value = self.read(address); + let offset = self.fetch() as i8; + + let bit = (opcode >> 4) & 0b111; + let bit_value = ((1 << bit) & value) != 0; + let target_value = opcode & 0x80 != 0; + + if target_value == bit_value { + self.registers.pc.offset(offset); + Ok(3) + } else { + Ok(2) + } + } + + 0x07 | 0x17 | 0x27 | 0x37 | 0x47 | 0x57 | 0x67 | 0x77 | 0x87 | 0x97 | 0xA7 | 0xB7 | 0xC7 + | 0xD7 | 0xE7 | 0xF7 => { + // RMB and SMB + let address = self.fetch() as u16; + let value = self.read(address); + + let bit = (opcode >> 4) & 0b111; + + let value = if opcode & 0x80 == 0 { + value & !(1 << bit) + } else { + value | (1 << bit) + }; + self.write(address, value); + + Ok(2) + } + + 0x02 | 0x22 | 0x42 | 0x62 | 0x82 | 0xA2 | 0xC2 | 0xE2 => { + // NOP (2-byte) + self.fetch(); + Ok(2) + } + 0x44 => { + self.fetch(); + Ok(3) + } + 0x54 | 0xD4 | 0xF4 => { + self.fetch(); + Ok(4) + } + 0x5C => { + self.fetch_word(); + Ok(8) + } + 0xDC | 0xFC => { + self.fetch_word(); + Ok(4) + } + + _ => { + // NOP + Ok(1) + } } } } diff --git a/src/cpu/fetch.rs b/src/cpu/fetch.rs index d4afd39..e1615ed 100644 --- a/src/cpu/fetch.rs +++ b/src/cpu/fetch.rs @@ -1,5 +1,7 @@ use crate::cpu::{MemoryIO, Mos6502}; +use super::Mos6502Variant; + /// Fetch values or addresses from memory, optionally dependent on the current /// opcode. pub trait Fetch { @@ -36,7 +38,6 @@ impl Fetch for Mos6502 { match opcode & 0x1F { 0x00 | 0x02 | 0x09 | 0x0B => (self.fetch(), 2), // Immediate 0x08 | 0x18 | 0x1A => panic!("Implied operand has no value"), - 0x12 => panic!("Invalid opcode"), 0x0A => (self.registers.a, 0), _ => { let (address, cycles) = self.fetch_operand_address(opcode); @@ -65,7 +66,18 @@ impl Fetch for Mos6502 { let pointer = self.read_word(base as u16); (pointer + self.registers.y as u16, 5) } - 0x12 => panic!("Invalid opcode"), + 0x12 => match self.variant { + Mos6502Variant::NMOS => { + // These all halt the processor on an NMOS chip + panic!("Invalid opcode"); + } + Mos6502Variant::CMOS => { + // (Indirect) + let base = self.fetch(); + let pointer = self.read_word(base as u16); + (pointer, 5) + } + }, 0x14 | 0x15 => { // Zero page,X let base = self.fetch(); @@ -88,15 +100,29 @@ impl Fetch for Mos6502 { 0x1C | 0x1D => { // Absolute,X let base = self.fetch_word(); - (base + self.registers.x as u16, 4) + let indexed = base + self.registers.x as u16; + + if self.variant == Mos6502Variant::NMOS && base & 0xFF00 != indexed & 0xFF00 { + self.read(base & 0xFF00 | indexed & 0x00FF); + (indexed, 5) + } else { + (indexed, 4) + } } 0x1E | 0x1F => { // Absolute,X or Absolute,Y let base = self.fetch_word(); - if opcode & 0xC0 == 0x80 { - (base + self.registers.y as u16, 4) + let indexed = if opcode & 0xC0 == 0x80 { + base + self.registers.y as u16 + } else { + base + self.registers.x as u16 + }; + + if self.variant == Mos6502Variant::NMOS && base & 0xFF00 != indexed & 0xFF00 { + self.read(base & 0xFF00 | indexed & 0x00FF); + (indexed, 5) } else { - (base + self.registers.x as u16, 4) + (indexed, 4) } } _ => unreachable!(), diff --git a/src/cpu/mod.rs b/src/cpu/mod.rs index ef258c7..616ac7d 100644 --- a/src/cpu/mod.rs +++ b/src/cpu/mod.rs @@ -8,12 +8,21 @@ use registers::{flags, Registers}; const CLOCKS_PER_POLL: u32 = 100; +#[derive(Copy, Clone, PartialEq)] +pub enum Mos6502Variant { + /// 6502 + NMOS, + /// 65C02 + CMOS, +} + /// The MOS 6502 CPU and its associated memory. pub struct Mos6502 { pub registers: Registers, pub memory: Box, cycle_count: u64, cycles_since_poll: u32, + variant: Mos6502Variant, } /// Read and write from the system's memory. @@ -110,6 +119,10 @@ impl InterruptHandler for Mos6502 { self.push(self.registers.sr.get() & !flags::BREAK); } + if let Mos6502Variant::CMOS = self.variant { + self.registers.sr.clear(flags::DECIMAL); + } + self.registers.sr.set(flags::INTERRUPT); let dest = match maskable { @@ -122,12 +135,13 @@ impl InterruptHandler for Mos6502 { } impl Mos6502 { - pub fn new(memory: Box) -> Mos6502 { + pub fn new(memory: impl Memory + 'static, variant: Mos6502Variant) -> Mos6502 { Mos6502 { registers: Registers::new(), - memory, + memory: Box::new(memory), cycle_count: 0, cycles_since_poll: 0, + variant, } } diff --git a/src/main.rs b/src/main.rs index d214f35..77c4e01 100644 --- a/src/main.rs +++ b/src/main.rs @@ -55,6 +55,8 @@ struct Args { #[cfg(not(target_arch = "wasm32"))] fn main() { + use libnoentiendo::{cpu::Mos6502Variant, systems::klaus::KlausSystemConfig}; + let args = Args::parse(); let mut platform: Box = match args.platform { @@ -75,7 +77,14 @@ fn main() { let system = match args.system { SystemArg::Basic => BasicSystemBuilder::build(romfile.unwrap(), (), platform.provider()), SystemArg::Easy => Easy6502SystemBuilder::build(romfile.unwrap(), (), platform.provider()), - SystemArg::Klaus => KlausSystemBuilder::build(romfile.unwrap(), None, platform.provider()), + SystemArg::Klaus => KlausSystemBuilder::build( + romfile.unwrap(), + KlausSystemConfig { + pc_report: None, + variant: Mos6502Variant::NMOS, + }, + platform.provider(), + ), SystemArg::Pet => PetSystemBuilder::build( PetSystemRoms::from_disk(), PetSystemConfig { mapping }, diff --git a/src/systems/basic.rs b/src/systems/basic.rs index 408106b..f4e90fc 100644 --- a/src/systems/basic.rs +++ b/src/systems/basic.rs @@ -1,6 +1,6 @@ use instant::Duration; -use crate::cpu::Mos6502; +use crate::cpu::{Mos6502, Mos6502Variant}; use crate::memory::{ActiveInterrupt, Memory, SystemInfo}; use crate::memory::{BlockMemory, BranchMemory}; use crate::platform::{PlatformProvider, WindowConfig}; @@ -79,7 +79,7 @@ impl SystemBuilder for BasicSystemBuilder { .map(0x4000, io) .map(0x8000, rom); - let cpu = Mos6502::new(Box::new(memory)); + let cpu = Mos6502::new(memory, Mos6502Variant::NMOS); Box::new(BasicSystem { cpu }) } diff --git a/src/systems/c64/mod.rs b/src/systems/c64/mod.rs index 7266588..5670a09 100644 --- a/src/systems/c64/mod.rs +++ b/src/systems/c64/mod.rs @@ -5,7 +5,7 @@ use std::{ }; use crate::{ - cpu::Mos6502, + cpu::{Mos6502, Mos6502Variant}, keyboard::{ commodore::{C64KeyboardAdapter, C64SymbolAdapter, C64VirtualAdapter}, KeyAdapter, KeyMappingStrategy, SymbolAdapter, @@ -303,7 +303,7 @@ impl SystemBuilder for C64SystemBuild .map(0xD000, region6) .map(0xE000, region7); - let cpu = Mos6502::new(Box::new(memory)); + let cpu = Mos6502::new(memory, Mos6502Variant::NMOS); Box::new(C64System { cpu, vic: vic_ii }) } diff --git a/src/systems/easy.rs b/src/systems/easy.rs index f335649..a4ca918 100644 --- a/src/systems/easy.rs +++ b/src/systems/easy.rs @@ -1,6 +1,6 @@ use instant::Duration; -use crate::cpu::{MemoryIO, Mos6502}; +use crate::cpu::{MemoryIO, Mos6502, Mos6502Variant}; use crate::keyboard::KeyPosition; use crate::memory::{ActiveInterrupt, BlockMemory, BranchMemory, Memory, SystemInfo}; use crate::platform::{Color, PlatformProvider, WindowConfig}; @@ -79,7 +79,7 @@ impl SystemBuilder for Easy6502SystemBuilder { .map(0x0600, high_ram) .map(0x8000, rom); - let cpu = Mos6502::new(Box::new(memory)); + let cpu = Mos6502::new(memory, Mos6502Variant::NMOS); Box::new(Easy6502System { cpu }) } diff --git a/src/systems/klaus.rs b/src/systems/klaus.rs index 3a26a00..a43f1d9 100644 --- a/src/systems/klaus.rs +++ b/src/systems/klaus.rs @@ -1,6 +1,6 @@ use instant::Duration; -use crate::cpu::Mos6502; +use crate::cpu::{Mos6502, Mos6502Variant}; use crate::memory::BlockMemory; use crate::platform::{PlatformProvider, WindowConfig}; use crate::roms::RomFile; @@ -11,21 +11,29 @@ use std::sync::Arc; use super::SystemBuilder; +pub struct KlausSystemConfig { + pub pc_report: Option>>, + pub variant: Mos6502Variant, +} + /// A factory for creating a system that runs Klaus Dormann's 6502 CPU test suite. pub struct KlausSystemBuilder; -impl SystemBuilder>>> for KlausSystemBuilder { +impl SystemBuilder for KlausSystemBuilder { fn build( rom: RomFile, - config: Option>>, + config: KlausSystemConfig, _platform: Arc, ) -> Box { let rom = BlockMemory::from_file(0x10000, rom).set_writeable(true); - let mut cpu = Mos6502::new(Box::new(rom)); + let mut cpu = Mos6502::new(rom, config.variant); cpu.registers.pc.load(0x0400); - Box::new(KlausSystem { cpu, pc: config }) + Box::new(KlausSystem { + cpu, + pc: config.pc_report, + }) } } @@ -61,11 +69,19 @@ mod tests { use super::*; #[test] - fn test_klaus() { - let roms = RomFile::from_file("bin/klaus.bin"); + fn test_klaus_6502() { + let roms = RomFile::from_file("bin/klaus_6502.bin"); let platform = TextPlatform::new(); let pc = Rc::new(Cell::new(0)); - let mut system = KlausSystemBuilder::build(roms, Some(pc.clone()), platform.provider()); + + let mut system = KlausSystemBuilder::build( + roms, + KlausSystemConfig { + pc_report: Some(pc.clone()), + variant: Mos6502Variant::NMOS, + }, + platform.provider(), + ); for _ in 0..=100000000 { system.tick(); @@ -73,4 +89,26 @@ mod tests { assert_eq!(pc.get(), 0x3469); } + + #[test] + fn test_klaus_65c02() { + let roms = RomFile::from_file("bin/klaus_65C02.bin"); + let platform = TextPlatform::new(); + let pc = Rc::new(Cell::new(0)); + + let mut system = KlausSystemBuilder::build( + roms, + KlausSystemConfig { + pc_report: Some(pc.clone()), + variant: Mos6502Variant::CMOS, + }, + platform.provider(), + ); + + for _ in 0..=100000000 { + system.tick(); + } + + assert_eq!(pc.get(), 0x24f1); + } } diff --git a/src/systems/pet/mod.rs b/src/systems/pet/mod.rs index 7809c57..222f043 100644 --- a/src/systems/pet/mod.rs +++ b/src/systems/pet/mod.rs @@ -1,4 +1,4 @@ -use crate::cpu::{MemoryIO, Mos6502}; +use crate::cpu::{MemoryIO, Mos6502, Mos6502Variant}; use crate::keyboard::{KeyAdapter, KeyMappingStrategy, SymbolAdapter}; use crate::memory::mos652x::{Pia, Via}; use crate::memory::{BlockMemory, BranchMemory, NullMemory, NullPort, Port, SystemInfo}; @@ -194,7 +194,7 @@ impl SystemBuilder for PetSystemBuild .map(0xE840, via) .map(0xF000, kernel_rom); - let cpu = Mos6502::new(Box::new(memory)); + let cpu = Mos6502::new(memory, Mos6502Variant::NMOS); Box::new(PetSystem { cpu, diff --git a/src/systems/vic/mod.rs b/src/systems/vic/mod.rs index 84c1623..8293a53 100644 --- a/src/systems/vic/mod.rs +++ b/src/systems/vic/mod.rs @@ -1,4 +1,4 @@ -use crate::cpu::Mos6502; +use crate::cpu::{Mos6502, Mos6502Variant}; use crate::keyboard::commodore::C64VirtualAdapter; use crate::keyboard::{ commodore::{C64KeyboardAdapter, C64SymbolAdapter}, @@ -298,7 +298,7 @@ impl SystemBuilder for Vic20Sys .map(0xC000, basic_rom) .map(0xE000, kernel_rom); - let cpu = Mos6502::new(Box::new(memory)); + let cpu = Mos6502::new(memory, Mos6502Variant::NMOS); Box::new(Vic20System { cpu, vic: vic_chip }) }