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JSC often needs to move a literal capability into a register. For plain address pointers, it uses a movz/movk sequence, but this can't work for capabilities, so instead it puts a whole capability in the instruction stream, jumps over it, then loads the capability using a PCC-relative load:
b after
brk #0 // Alignment padding.
...
capability<127:96>
capability<95:64>
capability<63:32>
capability<31:0>
after:
ldr c0, [pc, #-16]
This, in effect, is a one-entry literal pool.
A much better technique would be to batch them up and dump them (resolving ldr-literal offsets) at a convenient time. This is a standard technique for AArch64 (and AArch32) assembly, but JSC doesn't seem to use them today (for AArch64).
The AArch64 ldr-literal range is probably large enough that for research purposes we can reasonably implement this naively, dumping pools at the end of their respective functions, and aborting if any ldr can't reach its literal.
The text was updated successfully, but these errors were encountered:
JSC often needs to move a literal capability into a register. For plain address pointers, it uses a
movz
/movk
sequence, but this can't work for capabilities, so instead it puts a whole capability in the instruction stream, jumps over it, then loads the capability using a PCC-relative load:This, in effect, is a one-entry literal pool.
A much better technique would be to batch them up and dump them (resolving ldr-literal offsets) at a convenient time. This is a standard technique for AArch64 (and AArch32) assembly, but JSC doesn't seem to use them today (for AArch64).
The AArch64 ldr-literal range is probably large enough that for research purposes we can reasonably implement this naively, dumping pools at the end of their respective functions, and aborting if any ldr can't reach its literal.
The text was updated successfully, but these errors were encountered: