From 4a6ff1dc4fbebf1caa1e4f0f2c156e8402a4ef7f Mon Sep 17 00:00:00 2001 From: Schuyler Eldridge Date: Mon, 18 Nov 2024 11:45:11 -0500 Subject: [PATCH] Bump emitted FIRRTL to 4.1.0 (#4513) FIRRTL spec version 4.0.0 was released. Chisel is currently emitting things _beyond_ this and it should now mark the emitted FIRRTL as being 4.1.0. Signed-off-by: Schuyler Eldridge --- firrtl/src/main/scala/firrtl/ir/Serializer.scala | 2 +- firrtl/src/test/scala/firrtlTests/ExtModuleTests.scala | 2 +- src/test/scala/circtTests/stage/ChiselStageSpec.scala | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/firrtl/src/main/scala/firrtl/ir/Serializer.scala b/firrtl/src/main/scala/firrtl/ir/Serializer.scala index 8199b0ca587..cc9e3b359f5 100644 --- a/firrtl/src/main/scala/firrtl/ir/Serializer.scala +++ b/firrtl/src/main/scala/firrtl/ir/Serializer.scala @@ -15,7 +15,7 @@ object Serializer { val Indent = " " // The version supported by the serializer. - val version = Version(4, 0, 0) + val version = Version(4, 1, 0) /** Converts a `FirrtlNode` into its string representation with * default indentation. diff --git a/firrtl/src/test/scala/firrtlTests/ExtModuleTests.scala b/firrtl/src/test/scala/firrtlTests/ExtModuleTests.scala index fd5e4e13537..607fb4d4324 100644 --- a/firrtl/src/test/scala/firrtlTests/ExtModuleTests.scala +++ b/firrtl/src/test/scala/firrtlTests/ExtModuleTests.scala @@ -8,7 +8,7 @@ import firrtl.testutils._ class ExtModuleTests extends FirrtlFlatSpec { "extmodule" should "serialize and re-parse equivalently" in { val input = - """|FIRRTL version 4.0.0 + """|FIRRTL version 4.1.0 |circuit Top : | extmodule Top : | input y : UInt<0> diff --git a/src/test/scala/circtTests/stage/ChiselStageSpec.scala b/src/test/scala/circtTests/stage/ChiselStageSpec.scala index e69ee082857..0c9b7343f22 100644 --- a/src/test/scala/circtTests/stage/ChiselStageSpec.scala +++ b/src/test/scala/circtTests/stage/ChiselStageSpec.scala @@ -1089,7 +1089,7 @@ class ChiselStageSpec extends AnyFunSpec with Matchers with chiselTests.Utils { val text = ChiselStage.emitCHIRRTL(new ChiselStageSpec.Foo(hasDontTouch = true)) info("found a version string") - text should include("FIRRTL version 4.0.0") + text should include("FIRRTL version 4.1.0") info("found an Annotation") text should include("firrtl.transforms.DontTouchAnnotation") info("found a circuit")