Firrtl internal exception for adding LoadMemoryFromFile in generators/rocket-chip/src/main/scala/amba/axi4/SRAM.scala

[chithize]

HI I tried with Chipyard with a large Boom SOC config, in this config I modifed some code, add external sram via AXI4, tried to make the memory can be initialized by loading memory hex file, the below is the code I modified, and the building step, but firrtl report interal exception error:

/** Memory with AXI port for use in elaboratable test harnesses. */
generators/chipyard/src/main/scala/HarnessBinders.scala:
class WithExtAXIMem(memFile:String="") extends OverrideHarnessBinder({
(system: CanHaveMasterAXI4MemPort, th: HasHarnessSignalReferences, ports: Seq[ClockedAndResetIO[AXI4Bundle]]) => {
val p: Parameters = chipyard.iobinders.GetSystemParameters(system)
(ports zip system.memAXI4Node.edges.in).map { case (port, edge) =>
val mem = LazyModule(new SimAXIMem(edge, size=p(ExtMem).get.master.size,0,memFile)(p))
withClockAndReset(port.clock, port.reset) {
Module(mem.module).suggestName("mem")
}
mem.io_axi4.head <> port.bits
}
}
})
generators/rocket-chip/src/main/scala/system/SimAXIMem.scala:
class SimAXIMem(edge: AXI4EdgeParameters, size: BigInt, base: BigInt = 0,memFile:String="")(implicit p: Parameters) extends SimpleLazyModule {
val node = AXI4MasterNode(List(edge.master))
val srams = AddressSet.misaligned(base, size).map { aSet =>
LazyModule(new AXI4RAM(
address = aSet,
beatBytes = edge.bundle.dataBits/8,
wcorrupt=edge.slave.requestKeys.contains(AMBACorrupt),
memFile=memFile))
}
val xbar = AXI4Xbar()
srams.foreach{ s => s.node := AXI4Buffer() := AXI4Fragmenter() := xbar }
xbar := node
val io_axi4 = InModuleBody { node.makeIOs() }

generators/chipyard/src/main/scala/config/BoomConfigs.scala
class LargeBoomConfig extends Config(
new chipyard.harness.WithExtAXIMem("/root/chipyard/tests/testcase.hex") ++
new boom.common.WithNLargeBooms(1) ++ // large boom config new boom.common.WithNLargeBooms(1) ++ // large boom config
new chipyard.config.AbstractConfig)

make -C sims/vcs CONFIG=LargeBoomConfig run-binary-debug BINARY=/root/chipyard/tests/gcd.riscv | tee build.log

the build report the error is as below:

[info] running (fork) barstools.tapeout.transforms.GenerateTopAndHarness --allow-unrecognized-annotations --output-file /root/chipyard/sims/vcs/generated-src/chipyard.TestHarness.LargeBoomConfig/chipyard.TestHarness.LargeBoomConfig.top.v --harness-o /root/chipyard/sims/vcs/generated-src/chipyard.TestHarness.LargeBoomConfig/chipyard.TestHarness.LargeBoomConfig.harness.v --input-file /root/chipyard/sims/vcs/generated-src/chipyard.TestHarness.LargeBoomConfig/chipyard.TestHarness.LargeBoomConfig.fir --syn-top ChipTop --harness-top TestHarness --annotation-file /root/chipyard/sims/vcs/generated-src/chipyard.TestHarness.LargeBoomConfig/chipyard.TestHarness.LargeBoomConfig.anno.json --top-anno-out /root/chipyard/sims/vcs/generated-src/chipyard.TestHarness.LargeBoomConfig/chipyard.TestHarness.LargeBoomConfig.top.anno.json --top-dotf-out /root/chipyard/sims/vcs/generated-src/chipyard.TestHarness.LargeBoomConfig/firrtl_black_box_resource_files.top.f --top-fir /root/chipyard/sims/vcs/generated-src/chipyard.TestHarness.LargeBoomConfig/chipyard.TestHarness.LargeBoomConfig.top.fir --harness-anno-out /root/chipyard/sims/vcs/generated-src/chipyard.TestHarness.LargeBoomConfig/chipyard.TestHarness.LargeBoomConfig.harness.anno.json --harness-dotf-out /root/chipyard/sims/vcs/generated-src/chipyard.TestHarness.LargeBoomConfig/firrtl_black_box_resource_files.harness.f --harness-fir /root/chipyard/sims/vcs/generated-src/chipyard.TestHarness.LargeBoomConfig/chipyard.TestHarness.LargeBoomConfig.harness.fir --infer-rw --repl-seq-mem -c:TestHarness:-o:/root/chipyard/sims/vcs/generated-src/chipyard.TestHarness.LargeBoomConfig/chipyard.TestHarness.LargeBoomConfig.top.mems.conf -thconf /root/chipyard/sims/vcs/generated-src/chipyard.TestHarness.LargeBoomConfig/chipyard.TestHarness.LargeBoomConfig.harness.mems.conf --target-dir /root/chipyard/sims/vcs/generated-src/chipyard.TestHarness.LargeBoomConfig --log-level error
[error] Picked up JAVA_TOOL_OPTIONS: -Xmx8G -Xss8M -Djava.io.tmpdir=/root/chipyard/.java_tmp
[error] Exception in thread "main" firrtl.FirrtlInternalException: Internal Error! Please file an issue at https://github.com/ucb-bar/firrtl/issues
[error] at firrtl.Utils$.error(Utils.scala:471)
[error] at firrtl.Utils$.throwInternalError(Utils.scala:175)
[error] at firrtl.stage.phases.CatchExceptions.transform(CatchExceptions.scala:31)
[error] at firrtl.stage.phases.CatchExceptions.transform(CatchExceptions.scala:10)
[error] at firrtl.options.phases.DeletedWrapper.internalTransform(DeletedWrapper.scala:38)
[error] at firrtl.options.phases.DeletedWrapper.internalTransform(DeletedWrapper.scala:15)
[error] at firrtl.options.Translator.transform(Phase.scala:248)
[error] at firrtl.options.Translator.transform$(Phase.scala:248)
[error] at firrtl.options.phases.DeletedWrapper.transform(DeletedWrapper.scala:15)
[error] at firrtl.options.DependencyManager.$anonfun$transform$5(DependencyManager.scala:280)
[error] at firrtl.options.DependencyManager$$Lambda$557/1685134322.apply(Unknown Source)
[error] at firrtl.Utils$.time(Utils.scala:181)
[error] at firrtl.options.DependencyManager.$anonfun$transform$3(DependencyManager.scala:280)
[error] at firrtl.options.DependencyManager$$Lambda$555/454440929.apply(Unknown Source)
[error] at scala.collection.LinearSeqOptimized.foldLeft(LinearSeqOptimized.scala:126)
[error] at scala.collection.LinearSeqOptimized.foldLeft$(LinearSeqOptimized.scala:122)
[error] at scala.collection.immutable.List.foldLeft(List.scala:91)
[error] at firrtl.options.DependencyManager.transform(DependencyManager.scala:269)
[error] at firrtl.options.DependencyManager.transform$(DependencyManager.scala:255)
[error] at firrtl.options.PhaseManager.transform(DependencyManager.scala:443)
[error] at firrtl.stage.FirrtlStage.run(FirrtlStage.scala:38)
[error] at firrtl.options.Stage$$anon$1.transform(Stage.scala:43)
[error] at firrtl.options.Stage$$anon$1.transform(Stage.scala:43)
[error] at firrtl.options.phases.DeletedWrapper.internalTransform(DeletedWrapper.scala:38)
[error] at firrtl.options.phases.DeletedWrapper.internalTransform(DeletedWrapper.scala:15)
[error] at firrtl.options.Translator.transform(Phase.scala:248)
[error] at firrtl.options.Translator.transform$(Phase.scala:248)
[error] at firrtl.options.phases.DeletedWrapper.transform(DeletedWrapper.scala:15)
[error] at firrtl.options.Stage.$anonfun$transform$5(Stage.scala:47)
[error] at firrtl.options.Stage$$Lambda$299/332873513.apply(Unknown Source)
[error] at scala.collection.LinearSeqOptimized.foldLeft(LinearSeqOptimized.scala:126)
[error] at scala.collection.LinearSeqOptimized.foldLeft$(LinearSeqOptimized.scala:122)
[error] at scala.collection.immutable.List.foldLeft(List.scala:91)
[error] at firrtl.options.Stage.$anonfun$transform$3(Stage.scala:47)
[error] at firrtl.options.Stage$$Lambda$291/1367937032.apply(Unknown Source)
[error] at logger.Logger$.$anonfun$makeScope$2(Logger.scala:137)
[error] at logger.Logger$$$Lambda$293/347978868.apply(Unknown Source)
[error] at scala.util.DynamicVariable.withValue(DynamicVariable.scala:62)
[error] at logger.Logger$.makeScope(Logger.scala:135)
[error] at firrtl.options.Stage.transform(Stage.scala:47)
[error] at firrtl.options.Stage.execute(Stage.scala:58)
[error] at barstools.tapeout.transforms.GenerateTopAndHarness.executeTopAndHarness(GenerateTopAndHarness.scala:112)
[error] at barstools.tapeout.transforms.stage.TapeoutStage.$anonfun$run$1(TapeoutStage.scala:173)
[error] at barstools.tapeout.transforms.stage.TapeoutStage$$Lambda$301/1096485705.apply(Unknown Source)
[error] at logger.Logger$.$anonfun$makeScope$2(Logger.scala:137)
[error] at logger.Logger$$$Lambda$293/347978868.apply(Unknown Source)
[error] at scala.util.DynamicVariable.withValue(DynamicVariable.scala:62)
[error] at logger.Logger$.makeScope(Logger.scala:135)
[error] at barstools.tapeout.transforms.stage.TapeoutStage.run(TapeoutStage.scala:169)
[error] at firrtl.options.Stage$$anon$1.transform(Stage.scala:43)

Your environment

in my build.sbt, chisel , firrtl version are:
val chiselVersion = "3.5.1"
val firrtlVersion = "1.5.1"
val chiselTestVersion = "2.5.1"
lazy val commonSettings = Seq(
organization := "edu.berkeley.cs",
version := "1.6",
scalaVersion := "2.12.10",
assembly / test := {},
assembly / assemblyMergeStrategy := { _ match {
case PathList("META-INF", "MANIFEST.MF") => MergeStrategy.discard
case _ => MergeStrategy.first}},
scalacOptions ++= Seq("-deprecation","-unchecked","-Xsource:2.11"),
addCompilerPlugin("org.scalamacros" % "paradise" % "2.1.1" cross CrossVersion.full),
unmanagedBase := (chipyardRoot / unmanagedBase).value,
allDependencies := {
// drop specific maven dependencies in subprojects in favor of Chipyard's version
val dropDeps = Seq(("edu.berkeley.cs", "rocketchip"))
allDependencies.value.filterNot { dep =>
dropDeps.contains((dep.organization, dep.name))
}
},
exportJars := true,
resolvers ++= Seq(
Resolver.sonatypeRepo("snapshots"),
Resolver.sonatypeRepo("releases"),
Resolver.mavenLocal))

val rocketChipDir = file("generators/rocket-chip")

lazy val firesimAsLibrary = sys.env.get("FIRESIM_STANDALONE") == None
lazy val firesimDir = if (firesimAsLibrary) {
file("sims/firesim/sim/")
} else {
file("../../sim")
}

OS : Ubuntu
DISTRIB_ID=Ubuntu
DISTRIB_RELEASE=18.04
DISTRIB_CODENAME=bionic
DISTRIB_DESCRIPTION="Ubuntu 18.04.6 LTS"