CircuitNet: An Open-Source Dataset for Machine Learning Applications in Electronic Design Automation (EDA)
This repository is intended to hosts codes and demos for CircuitNet, we hope this codebase would be helpful for users to reproduce exiting methods. More information about the dataset can be accessed from our web page https://circuitnet.github.io/.
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2024/11/09
Re-upload LEF/DEF, netlist and graph information to fix issue #38.
Add demo for building graph with the graph_information in the dataset here.
Add section FAQ on web page.
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2023/7/24
Code for feature extraction released. Users can use it to implement self-defined features with the LEF/DEF we released or extract features with LEF/DEF from other sources. Read the REAME for more information.
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2023/6/29
Code for net delay prediction released. A simple tutorial on net delay prediction is added to our website.
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2023/6/14
The original dataset is renamed to CircuitNet-N28, and timing features are released.
New dataset CircuitNet-N14 is released, supporting congestion, IR drop and timing prediction.
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2023/3/22
LEF/DEF is updated to include tech information (sanitized). Each tarfile contains 500 DEF files and can be decompressed separately. We also provide example DEF files.
Congestion features and graph features generated from ISPD2015 benchmark are available in the ISPD2015 dir.
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2022/12/29
LEF/DEF (sanitized) are available in the LEF&DEF dir.
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2022/12/12
Graph features are available in the graph_features dir.
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2022/9/6
Pretrained weights are available in Google Drive and Baidu Netdisk.
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2022/8/1
First release.
Dependencies can be installed using pip:
pip install -r requirements.txt
PyTorch is not included in requirement.txt, and you could install it following the instruction on PyTorch homepage https://pytorch.org/.
DGL is also not included in requirement.txt, and it is required for net delay prediction only. You could install it following the instruction on DGL homepage https://www.dgl.ai/pages/start.html.
Our experiments run on Python 3.9 and PyTorch 1.11. Other versions should work but are not tested.
Please follow the instructions on the download page to set up the CircuitNet dataset for a specific task(Congestion/DRC/IR Drop).
Dataset download links:
Change the configure in utils/config.py to fit your file path and adjust hyper-parameter before starting.
python test.py --task congestion_gpdl --pretrained PRETRAINED_WEIGHTS_PATH
python test.py --task drc_routenet --pretrained PRETRAINED_WEIGHTS_PATH --save_path work_dir/drc_routenet/ --plot_roc
python test.py --task irdrop_mavi --pretrained PRETRAINED_WEIGHTS_PATH --save_path work_dir/irdrop_mavi/ --plot_roc
python train.py --task congestion_gpdl --save_path work_dir/congestion_gpdl/
python train.py --task drc_routenet --save_path work_dir/drc_routenet/
python train.py --task irdrop_mavi --save_path work_dir/irdrop_mavi/
Graphs for net delay prediction can be built with the following script:
python build_graph.py --data_path DATA_PATH --save_path ./graph
where DATA_PATH is the path to the parent dir of the timing features: nodes, net_edges and pin_positions.
python train.py --checkpoint CHECKPOINT_NAME
where CHECKPOINT_NAME is the name of the dir for saving checkpoint.
python train.py --checkpoint CHECKPOINT_NAME --test_iter TEST_ITERATION
where TEST_ITERATION is the specific iteration for testing, corresponding to the saved checkpoint file name.
This repository is released under the BSD 3-Clause. license as found in the LICENSE file.
If you think our work is useful, please feel free to cite our TCAD paper😆 and ICLR paper.
@ARTICLE{10158384,
author={Chai, Zhuomin and Zhao, Yuxiang and Liu, Wei and Lin, Yibo and Wang, Runsheng and Huang, Ru},
journal={IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
title={CircuitNet: An Open-Source Dataset for Machine Learning in VLSI CAD Applications with Improved Domain-Specific Evaluation Metric and Learning Strategies},
year={2023},
doi={10.1109/TCAD.2023.3287970}}
}
@inproceedings{
2024circuitnet,
title={CircuitNet 2.0: An Advanced Dataset for Promoting Machine Learning Innovations in Realistic Chip Design Environment},
author={Xun, Jiang and Chai, Zhuomin and Zhao, Yuxiang and Lin, Yibo and Wang, Runsheng and Huang, Ru},
booktitle={The Twelfth International Conference on Learning Representations},
year={2024},
url={https://openreview.net/forum?id=nMFSUjxMIl}
}
For any questions, please do not hesitate to contact us.
Zhuomin Chai: zhuominchai@whu.edu.cn
Xun Jiang: xunjiang@stu.pku.edu.cn
Yuxiang Zhao: yuxiangzhao@stu.pku.edu.cn
Yibo Lin: yibolin@pku.edu.cn