From 267817117f2010f3639d5830ffa75da570a2c73f Mon Sep 17 00:00:00 2001 From: Kai Vehmanen Date: Mon, 1 Jul 2024 12:14:43 +0300 Subject: [PATCH] intel_adsp/ace: power: pad the hpsram_mask passed to power_down The power_down() function will lock dcache for the hpsram_mask array. On some platforms, the dcache lock will fail if the array is on cache line that can be used for window register context saves. Work around this by aligning and padding the hpsram_mask to cacheline size. (cherry picked from commit 2fcdbba534b788f7ee4c8b8c259f74a4996b19aa) Original-Link: https://github.com/thesofproject/sof/issues/9268 Original-Signed-off-by: Kai Vehmanen GitOrigin-RevId: 2fcdbba534b788f7ee4c8b8c259f74a4996b19aa Cr-Build-Id: 8740088176811114337 Cr-Build-Url: https://cr-buildbucket.appspot.com/build/8740088176811114337 Copybot-Job-Name: zephyr-main-copybot-downstream Change-Id: Ia4459bc8d6bbea78f2d1e4a4601d0396b2f3b7ef Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/zephyr/+/5776799 Tested-by: ChromeOS Prod (Robot) Commit-Queue: Jeremy Bettis Tested-by: Jeremy Bettis Reviewed-by: Jeremy Bettis --- soc/intel/intel_adsp/ace/power.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/soc/intel/intel_adsp/ace/power.c b/soc/intel/intel_adsp/ace/power.c index 6b70a4bfb83..5b9a6079374 100644 --- a/soc/intel/intel_adsp/ace/power.c +++ b/soc/intel/intel_adsp/ace/power.c @@ -340,18 +340,20 @@ void pm_state_set(enum pm_state state, uint8_t substate_id) sys_cache_data_flush_range((void *)imr_layout, sizeof(*imr_layout)); #endif /* CONFIG_ADSP_IMR_CONTEXT_SAVE */ #ifdef CONFIG_ADSP_POWER_DOWN_HPSRAM - /* This assumes a single HPSRAM segment */ - static uint32_t hpsram_mask; + const int dcache_words = XCHAL_DCACHE_LINESIZE / sizeof(uint32_t); + uint32_t hpsram_mask[dcache_words] __aligned(XCHAL_DCACHE_LINESIZE); + + hpsram_mask[0] = 0; /* turn off all HPSRAM banks - get a full bitmap */ uint32_t ebb_banks = ace_hpsram_get_bank_count(); - hpsram_mask = (1 << ebb_banks) - 1; + hpsram_mask[0] = (1 << ebb_banks) - 1; #define HPSRAM_MASK_ADDR sys_cache_cached_ptr_get(&hpsram_mask) #else #define HPSRAM_MASK_ADDR NULL #endif /* CONFIG_ADSP_POWER_DOWN_HPSRAM */ - /* do power down - this function won't return */ ret = pm_device_runtime_put(INTEL_ADSP_HST_DOMAIN_DEV); __ASSERT_NO_MSG(ret == 0); + /* do power down - this function won't return */ power_down(true, HPSRAM_MASK_ADDR, true); } else { power_gate_entry(cpu);