From 33ee25a42fb7df77a7d3a65549c67fd9b37611ca Mon Sep 17 00:00:00 2001 From: "Mike J. Chen" Date: Wed, 11 Oct 2023 17:57:25 -0700 Subject: [PATCH] drivers: mipi_dsi: dsi_mcux_2l add property to enable non-continuous hs clk Allows device tree to enable usage of the controller feature where HS clock is disabled when not in use, which is good for reducing power consumption if MIPI DSI is mostly idle. (cherry picked from commit 01aa8004644b3cbc291ad9ad3b59e504c289a926) Original-Signed-off-by: Mike J. Chen GitOrigin-RevId: 01aa8004644b3cbc291ad9ad3b59e504c289a926 Change-Id: I938be443feb10e81b3dd51c3b564613a6c51310c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/zephyr/+/4971828 Tested-by: ChromeOS Prod (Robot) Commit-Queue: Al Semjonovs Tested-by: Al Semjonovs Reviewed-by: Al Semjonovs --- drivers/mipi_dsi/dsi_mcux_2l.c | 3 +++ dts/bindings/mipi-dsi/nxp,mipi-dsi-2l.yaml | 6 ++++++ 2 files changed, 9 insertions(+) diff --git a/drivers/mipi_dsi/dsi_mcux_2l.c b/drivers/mipi_dsi/dsi_mcux_2l.c index 3c51eb4d8c4..de73d10e8ac 100644 --- a/drivers/mipi_dsi/dsi_mcux_2l.c +++ b/drivers/mipi_dsi/dsi_mcux_2l.c @@ -28,6 +28,7 @@ struct mcux_mipi_dsi_config { MIPI_DSI_HOST_Type *base; dsi_dpi_config_t dpi_config; bool auto_insert_eotp; + bool noncontinuous_hs_clk; const struct device *bit_clk_dev; clock_control_subsys_t bit_clk_subsys; const struct device *esc_clk_dev; @@ -224,6 +225,7 @@ static int dsi_mcux_attach(const struct device *dev, DSI_GetDefaultConfig(&dsi_config); dsi_config.numLanes = mdev->data_lanes; dsi_config.autoInsertEoTp = config->auto_insert_eotp; + dsi_config.enableNonContinuousHsClk = config->noncontinuous_hs_clk; /* Init the DSI module. */ DSI_Init(config->base, &dsi_config); @@ -502,6 +504,7 @@ static int mcux_mipi_dsi_init(const struct device *dev) (.irq_config_func = mipi_dsi_##n##_irq_config_func,)) \ .base = (MIPI_DSI_HOST_Type *)DT_INST_REG_ADDR(id), \ .auto_insert_eotp = DT_INST_PROP(id, autoinsert_eotp), \ + .noncontinuous_hs_clk = DT_INST_PROP(id, noncontinuous_hs_clk), \ .dphy_ref_freq = DT_INST_PROP_OR(id, dphy_ref_frequency, 0), \ .bit_clk_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR_BY_NAME(id, dphy)), \ .bit_clk_subsys = \ diff --git a/dts/bindings/mipi-dsi/nxp,mipi-dsi-2l.yaml b/dts/bindings/mipi-dsi/nxp,mipi-dsi-2l.yaml index fc0a69870c5..02871f29641 100644 --- a/dts/bindings/mipi-dsi/nxp,mipi-dsi-2l.yaml +++ b/dts/bindings/mipi-dsi/nxp,mipi-dsi-2l.yaml @@ -70,3 +70,9 @@ properties: description: Maximum clock speed supported by the device, in Hz. Leave at default if no DPHY PLL is present + + noncontinuous-hs-clk: + type: boolean + description: + Enable non-contiuous high speed clock. Saves power but introduces latency + when transitioning to high speed mode.