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Add debug port #6

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sameo opened this issue Mar 19, 2021 · 0 comments
Open

Add debug port #6

sameo opened this issue Mar 19, 2021 · 0 comments

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@sameo
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sameo commented Mar 19, 2021

We'd like to be able to have our processor dump debug information through a dedicated port, for diagnosis and debugging purposes.

I propose to use the 2 bytes at address 0x1e (top of the IO port range) for dumping debug bytes.

Essentially, any STI R2, 0x1e will be interpreted as a debug output and could be pushed to a debug device. In practice, we would e.g. hook it up to a named pipe (see mkfifo). A separate thread could then read from that debug device and print whatever it receives from it.

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