From 7b2dc26555db2ef75c4ef822613a63b8c1d25e85 Mon Sep 17 00:00:00 2001 From: Egor Bogatov Date: Fri, 26 May 2023 11:55:14 +0200 Subject: [PATCH] fix ISA outerloop tests (#86705) --- src/coreclr/jit/hwintrinsicxarch.cpp | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/src/coreclr/jit/hwintrinsicxarch.cpp b/src/coreclr/jit/hwintrinsicxarch.cpp index e62dc8ee4d246..379509a17180e 100644 --- a/src/coreclr/jit/hwintrinsicxarch.cpp +++ b/src/coreclr/jit/hwintrinsicxarch.cpp @@ -2565,18 +2565,23 @@ GenTree* Compiler::impSpecialIntrinsic(NamedIntrinsic intrinsic, { assert(sig->numArgs == 1); - op1 = impSIMDPopStack(); - #if defined(TARGET_X86) if (varTypeIsLong(simdBaseType)) { + if (!compExactlyDependsOn(InstructionSet_SSE41)) + { + // We need SSE41 to handle long, use software fallback + break; + } // Create a GetElement node which handles decomposition + op1 = impSIMDPopStack(); op2 = gtNewIconNode(0); retNode = gtNewSimdGetElementNode(retType, op1, op2, simdBaseJitType, simdSize); break; } #endif // TARGET_X86 + op1 = impSIMDPopStack(); retNode = gtNewSimdHWIntrinsicNode(retType, op1, intrinsic, simdBaseJitType, simdSize); break; }