diff --git a/rtl/axicb_mst_if.sv b/rtl/axicb_mst_if.sv index 110da93..730ad2f 100644 --- a/rtl/axicb_mst_if.sv +++ b/rtl/axicb_mst_if.sv @@ -127,8 +127,13 @@ module axicb_mst_if logic [ARCH_W -1:0] arch; logic [RCH_W -1:0] rch; logic rlast; + logic rlast_r; logic [AXI_ADDR_W -1:0] awaddr; logic [AXI_ADDR_W -1:0] araddr; + logic wlast_r; + + logic [BCH_W -1:0] bch_f; + logic [RCH_W -1:0] rch_f; generate @@ -232,7 +237,7 @@ module axicb_mst_if .rclk (o_aclk), .rrst_n (o_aresetn), .rinc (w_rinc), - .rdata ({o_wlast, wch}), + .rdata ({wlast_r, wch}), .rempty (w_empty), .arempty () ); @@ -241,6 +246,7 @@ module axicb_mst_if assign w_winc = i_wvalid & ~w_full; assign o_wvalid = ~w_empty; + assign o_wlast = (w_empty) ? 1'b0 : wlast_r; assign w_rinc = ~w_empty & o_wready; /////////////////////////////////////////////////////////////////////////// @@ -264,7 +270,7 @@ module axicb_mst_if .rclk (i_aclk), .rrst_n (i_aresetn), .rinc (b_rinc), - .rdata (i_bch), + .rdata (bch_f), .rempty (b_empty), .arempty () ); @@ -273,6 +279,7 @@ module axicb_mst_if assign b_winc = o_bvalid & ~b_full; assign i_bvalid = ~b_empty; + assign i_bch = (b_empty) ? '0 : bch_f; assign b_rinc = ~b_empty & i_bready; /////////////////////////////////////////////////////////////////////////// @@ -328,7 +335,7 @@ module axicb_mst_if .rclk (i_aclk), .rrst_n (i_aresetn), .rinc (r_rinc), - .rdata ({i_rlast, i_rch}), + .rdata ({rlast_r, rch_f}), .rempty (r_empty), .arempty () ); @@ -338,6 +345,20 @@ module axicb_mst_if assign i_rvalid = ~r_empty; assign r_rinc = ~r_empty & i_rready; + assign i_rlast = (r_empty) ? 1'b0 : rlast_r; + + always @ (*) begin + + // +2 = RESP width + i_rch[AXI_ID_W+2 +: (RCH_W-AXI_ID_W-2)] = rch_f[AXI_ID_W+2 +: (RCH_W-AXI_ID_W-2)]; + + // Tied off ID and RESP to ensure correct values + if (r_empty) begin + i_rch[0 +: (AXI_ID_W+2)] = '0; + end else begin + i_rch[0 +: (AXI_ID_W+2)] = rch_f[0 +: (AXI_ID_W+2)]; + end + end /////////////////////////////////////////////////////////////////////////// @@ -409,12 +430,13 @@ module axicb_mst_if .data_in ({i_wlast, i_wch}), .push (i_wvalid), .full (w_full), - .data_out ({o_wlast, wch}), + .data_out ({wlast_r, wch}), .pull (o_wready), .empty (w_empty) ); assign i_wready = ~w_full; assign o_wvalid = ~w_empty; + assign o_wlast = (w_empty) ? 1'b0 : wlast_r; /////////////////////////////////////////////////////////////////////////// // Write Response Channel @@ -435,12 +457,13 @@ module axicb_mst_if .data_in (bch), .push (o_bvalid), .full (b_full), - .data_out (i_bch), + .data_out (bch_f), .pull (i_bready), .empty (b_empty) ); assign i_bvalid = ~b_empty; + assign i_bch = (b_empty) ? '0 : bch_f; assign o_bready = ~b_full; /////////////////////////////////////////////////////////////////////////// @@ -489,14 +512,27 @@ module axicb_mst_if .data_in ({rlast, rch}), .push (o_rvalid), .full (r_full), - .data_out ({i_rlast,i_rch}), + .data_out ({rlast_r,rch_f}), .pull (i_rready), .empty (r_empty) ); assign i_rvalid = ~r_empty; + assign i_rlast = (r_empty) ? 1'b0 : rlast_r; assign o_rready = ~r_full; + always @ (*) begin + + // +2 = RESP width + i_rch[AXI_ID_W+2 +: (RCH_W-AXI_ID_W-2)] = rch_f[AXI_ID_W+2 +: (RCH_W-AXI_ID_W-2)]; + + // Tied off ID and RESP to ensure correct values + if (r_empty) begin + i_rch[0 +: (AXI_ID_W+2)] = '0; + end else begin + i_rch[0 +: (AXI_ID_W+2)] = rch_f[0 +: (AXI_ID_W+2)]; + end + end /////////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////// diff --git a/rtl/axicb_round_robin_core.sv b/rtl/axicb_round_robin_core.sv index f8f7620..30357a0 100644 --- a/rtl/axicb_round_robin_core.sv +++ b/rtl/axicb_round_robin_core.sv @@ -154,10 +154,10 @@ module axicb_round_robin_core always @ (posedge aclk or negedge aresetn) begin - if (~aresetn) begin - grant_r <= '1; + if (!aresetn) begin + grant_r <= '0; end else if (srst) begin - grant_r <= '1; + grant_r <= '0; end else begin if (en) begin grant_r <= grant_c; @@ -181,10 +181,10 @@ module axicb_round_robin_core always @ (posedge aclk or negedge aresetn) begin - if (~aresetn) begin - mask <= {REQ_NB{1'b1}}; + if (!aresetn) begin + mask <= '0; end else if (srst) begin - mask <= {REQ_NB{1'b1}}; + mask <= '0; end else begin if (en && |grant) begin if (grant[0]) mask <= 4'b1110; @@ -199,10 +199,10 @@ module axicb_round_robin_core always @ (posedge aclk or negedge aresetn) begin - if (~aresetn) begin - mask <= {REQ_NB{1'b1}}; + if (!aresetn) begin + mask <= '0; end else if (srst) begin - mask <= {REQ_NB{1'b1}}; + mask <= '0; end else begin if (en && |grant) begin if (grant[0]) mask <= 8'b11111110; diff --git a/rtl/axicb_slv_if.sv b/rtl/axicb_slv_if.sv index ce80fdc..8ca36cf 100644 --- a/rtl/axicb_slv_if.sv +++ b/rtl/axicb_slv_if.sv @@ -121,11 +121,14 @@ module axicb_slv_if /////////////////////////////////////////////////////////////////////////////// logic [AWCH_W -1:0] awch; + logic [AWCH_W -1:0] awch_f; logic [WCH_W -1:0] wch; logic [BCH_W -1:0] bch; logic [ARCH_W -1:0] arch; + logic [AWCH_W -1:0] arch_f; logic [RCH_W -1:0] rch; logic wlast; + logic wlast_r; /////////////////////////////////////////////////////////////////////////////// @@ -334,7 +337,7 @@ module axicb_slv_if .rclk (o_aclk), .rrst_n (o_aresetn), .rinc (aw_rinc), - .rdata (o_awch), + .rdata (awch_f), .rempty (aw_empty), .arempty () ); @@ -343,6 +346,13 @@ module axicb_slv_if assign aw_winc = i_awvalid & ~aw_full; assign o_awvalid = ~aw_empty; + + always @ (*) begin + o_awch[AXI_ADDR_W +: (AWCH_W-AXI_ADDR_W)] = awch_f[AXI_ADDR_W +: (AWCH_W-AXI_ADDR_W)]; + // tied off AWADDR to avoid x in switches + o_awch[0 +: AXI_ADDR_W] = (aw_empty) ? '0 : awch_f[0 +: AXI_ADDR_W];; + end + assign aw_rinc = ~aw_empty & o_awready; /////////////////////////////////////////////////////////////////////////// @@ -366,7 +376,7 @@ module axicb_slv_if .rclk (o_aclk), .rrst_n (o_aresetn), .rinc (w_rinc), - .rdata ({o_wlast, o_wch}), + .rdata ({wlast_r, o_wch}), .rempty (w_empty), .arempty () ); @@ -375,6 +385,7 @@ module axicb_slv_if assign w_winc = i_wvalid & ~w_full; assign o_wvalid = ~w_empty; + assign o_wlast = (w_empty) ? 1'b0 : wlast_r; assign w_rinc = ~w_empty & o_wready; /////////////////////////////////////////////////////////////////////////// @@ -430,7 +441,7 @@ module axicb_slv_if .rclk (o_aclk), .rrst_n (o_aresetn), .rinc (ar_rinc), - .rdata (o_arch), + .rdata (arch_f), .rempty (ar_empty), .arempty () ); @@ -441,6 +452,12 @@ module axicb_slv_if assign o_arvalid = ~ar_empty; assign ar_rinc = ~ar_empty & o_arready; + always @ (*) begin + o_arch[AXI_ADDR_W +: (ARCH_W-AXI_ADDR_W)] = arch_f[AXI_ADDR_W +: (ARCH_W-AXI_ADDR_W)]; + // tied off ARADDR to avoid x in switches + o_arch[0 +: AXI_ADDR_W] = (ar_empty) ? '0 : arch_f[0 +: AXI_ADDR_W];; + end + /////////////////////////////////////////////////////////////////////////// // Read Data Channel /////////////////////////////////////////////////////////////////////////// @@ -517,10 +534,17 @@ module axicb_slv_if .data_in (awch), .push (i_awvalid), .full (aw_full), - .data_out (o_awch), + .data_out (awch_f), .pull (o_awready), .empty (aw_empty) ); + + always @ (*) begin + o_awch[AXI_ADDR_W +: (AWCH_W-AXI_ADDR_W)] = awch_f[AXI_ADDR_W +: (AWCH_W-AXI_ADDR_W)]; + // tied off AWADDR to avoid x in switches + o_awch[0 +: AXI_ADDR_W] = (aw_empty) ? '0 : awch_f[0 +: AXI_ADDR_W];; + end + assign i_awready = ~aw_full; assign o_awvalid = ~aw_empty; @@ -544,12 +568,13 @@ module axicb_slv_if .data_in ({wlast, wch}), .push (i_wvalid), .full (w_full), - .data_out ({o_wlast, o_wch}), + .data_out ({wlast_r, o_wch}), .pull (o_wready), .empty (w_empty) ); assign i_wready = ~w_full; assign o_wvalid = ~w_empty; + assign o_wlast = (w_empty) ? 1'b0 : wlast_r; /////////////////////////////////////////////////////////////////////////// // Write Response Channel @@ -597,7 +622,7 @@ module axicb_slv_if .data_in (arch), .push (i_arvalid), .full (ar_full), - .data_out (o_arch), + .data_out (arch_f), .pull (o_arready), .empty (ar_empty) ); @@ -605,6 +630,12 @@ module axicb_slv_if assign i_arready = ~ar_full; assign o_arvalid = ~ar_empty; + always @ (*) begin + o_arch[AXI_ADDR_W +: (ARCH_W-AXI_ADDR_W)] = arch_f[AXI_ADDR_W +: (ARCH_W-AXI_ADDR_W)]; + // tied off ARADDR to avoid x in switches + o_arch[0 +: AXI_ADDR_W] = (ar_empty) ? '0 : arch_f[0 +: AXI_ADDR_W];; + end + /////////////////////////////////////////////////////////////////////////// // Read Data Channel /////////////////////////////////////////////////////////////////////////// diff --git a/rtl/axicb_slv_switch_rd.sv b/rtl/axicb_slv_switch_rd.sv index 8215fa6..74944fd 100644 --- a/rtl/axicb_slv_switch_rd.sv +++ b/rtl/axicb_slv_switch_rd.sv @@ -74,8 +74,8 @@ module axicb_slv_switch_rd logic [SLV_NB -1:0] slv_ar_targeted; logic rch_en; - logic rch_en_c; logic rch_en_r; + logic rfirst; logic [SLV_NB -1:0] rch_req; logic [SLV_NB -1:0] rch_grant; @@ -257,8 +257,6 @@ module axicb_slv_switch_rd .grant (rch_grant) ); - assign rch_en_c = |o_rvalid & i_rready & |o_rlast & rch_running; - always @ (posedge aclk or negedge aresetn) begin if (!aresetn) begin rch_en_r <= '0; @@ -270,7 +268,21 @@ module axicb_slv_switch_rd end end - assign rch_en = rch_en_c | rch_en_r; + // Indicates the first read completion dataphase + always @ (posedge aclk or negedge aresetn) begin + if (!aresetn) begin + rfirst <= 1'b1; + end else if (srst) begin + rfirst <= 1'b1; + end else begin + if (i_rvalid && i_rready) begin + if (i_rlast) rfirst <= 1'b1; + else rfirst <= 1'b0; + end + end + end + + assign rch_en = rfirst | rch_en_r; assign rch_req = o_rvalid; diff --git a/rtl/axicb_switch_top.sv b/rtl/axicb_switch_top.sv index f3d7a61..20bde1b 100644 --- a/rtl/axicb_switch_top.sv +++ b/rtl/axicb_switch_top.sv @@ -61,7 +61,7 @@ module axicb_switch_top parameter BCH_W = 8, parameter ARCH_W = 8, parameter RCH_W = 8 - )( + ) ( // Global interface input wire aclk, input wire aresetn, @@ -323,10 +323,10 @@ module axicb_switch_top /////////////////////////////////////////////////////////////////////////// // Reorder the valid/ready handshakes: // - // slave interface uses awvalid[0,1,2,3,...] to target master interface 0, + // Slave interfaces use awvalid[0,1,2,3,...] to target master interface 0, // master interface 1, master interface 2, master interface 3 ... // - // master interfaces must receive awvalid[0] of slv_if0 + awvalid[0] of + // Master interfaces must receive awvalid[0] of slv_if0 + awvalid[0] of // slv_if1 ... // // The same principle is applied for all channels targeted from slave @@ -491,7 +491,6 @@ module axicb_switch_top .o_data ({o_wlast[i], o_wch[i*WCH_W+:WCH_W]}) ); - axicb_pipeline #( .DATA_BUS_W (BCH_W), diff --git a/test/svut/axicb_crossbar_top_testbench.ron b/test/svut/axicb_crossbar_top_testbench.ron index eac2915..a16ba3a 100644 --- a/test/svut/axicb_crossbar_top_testbench.ron +++ b/test/svut/axicb_crossbar_top_testbench.ron @@ -1,187 +1,1380 @@ ( show_hierarchy: Some(true), - show_menu: Some(true), - show_ticks: None, - show_toolbar: Some(true), - show_tooltip: None, + show_menu: None, + show_ticks: Some(true), + show_toolbar: None, + show_tooltip: Some(false), show_overview: None, show_statusbar: None, - align_names_right: None, - show_variable_indices: None, - show_variable_direction: None, + align_names_right: Some(true), + show_variable_indices: Some(true), + show_variable_direction: Some(false), waves: Some(( source: File("/Users/damien/workspace/hdl/axi-crossbar/test/svut/axicb_crossbar_top_testbench.fst"), format: Fst, active_scope: Some(( strs: [ "axicb_crossbar_top_testbench", - "dut", - "switchs", - "MST_SWITCHS_GEN[0]", - "mst_switch", - "mst_switch_wr", + "slv_monitor1", ], )), displayed_items_order: [ - (1), - (2), - (11), - (3), - (4), - (5), - (6), - (10), - (7), - (8), + (36), + (165), + (198), + (271), + (226), + (229), + (227), + (228), + (244), + (233), + (230), + (231), + (232), + (211), + (272), + (275), + (276), + (273), + (274), + (286), + (282), + (283), + (284), + (285), + (212), + (280), + (259), + (281), + (260), + (261), + (262), + (263), + (278), + (266), + (267), + (268), + (269), + (270), + (265), + (256), + (257), + (258), + (264), + (213), + (214), + (215), + (216), + (217), + (218), + (219), + (220), + (221), + (222), + (201), + (204), + (207), + (208), + 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None, + display_name: "…slv_monitor0.arvalid", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (264): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + "switchs", + "SLV_SWITCHS_GEN[0]", + "slv_switch", + "slv_switch_rd", + ], + ), + name: "o_rch", + ), + color: None, + background_color: None, + display_name: "…slv_switch_rd.o_rch [183:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (274): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "slv_monitor1", + ], + ), + name: "arready", + ), + color: None, + background_color: None, + display_name: "…slv_monitor1.arready", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (228): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "slv_monitor0", + ], + ), + name: "arready", + ), + color: None, + background_color: None, + display_name: "…slv_monitor0.arready", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (280): Divider(( + color: None, + background_color: None, + name: None, + )), + (63): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + ], + ), + name: "i_bready", + ), + color: None, + background_color: None, + display_name: "i_bready [3:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (282): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "slv_monitor1", + ], + ), + name: "rvalid", + ), + color: None, + background_color: None, + display_name: "…slv_monitor1.rvalid", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (259): Divider(( + color: None, + background_color: Some("blue"), + name: Some("SlvSwitch0"), + )), + (74): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + ], + ), + name: "o_bvalid", + ), + color: None, + background_color: None, + display_name: "o_bvalid [3:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (58): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + ], + ), + name: "i_awready", + ), + color: None, + background_color: None, + display_name: "i_awready [3:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (283): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "slv_monitor1", + ], + ), + name: "rready", + ), + color: None, + background_color: None, + display_name: "…slv_monitor1.rready", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (213): Divider(( + color: None, + background_color: None, + name: None, + )), + (271): Divider(( + color: None, + background_color: Some("pink"), + name: Some("slv0"), + )), + (207): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + ], + ), + name: "AXI_ADDR_W", + ), + color: None, + background_color: None, + display_name: "AXI_ADDR_W", + display_name_type: Unique, + manual_name: None, + format: Some("Unsigned"), + field_formats: [], + )), + (206): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + ], + ), + name: "o_arch", + ), + color: None, + background_color: None, + display_name: "o_arch [227:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (72): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + ], + ), + name: "o_wready", + ), + color: None, + background_color: None, + display_name: "o_wready [3:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (265): Divider(( + color: None, + background_color: None, + name: None, + )), + (270): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + "switchs", + "SLV_SWITCHS_GEN[0]", + "slv_switch", + "slv_switch_rd", + ], + ), + name: "rch_grant", + ), + color: None, + background_color: None, + display_name: "rch_grant [3:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (169): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + ], + ), + name: "o_bch", + ), + color: None, + background_color: None, + display_name: "o_bch [55:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (167): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + ], + ), + name: "i_bch", + ), + color: None, + background_color: None, + display_name: "i_bch [55:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (260): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + "switchs", + "SLV_SWITCHS_GEN[0]", + "slv_switch", + "slv_switch_rd", + ], + ), + name: "i_rvalid", + ), + color: None, + background_color: None, + display_name: "…slv_switch_rd.i_rvalid", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (275): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "slv_monitor1", + ], + ), + name: "araddr", + ), + color: None, + background_color: None, + display_name: "…slv_monitor1.araddr [15:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (219): Divider(( + color: None, + background_color: None, + name: None, + )), + (286): Divider(( + color: None, + background_color: None, + name: None, + )), + (76): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + ], + ), + name: "o_arvalid", + ), + color: None, + background_color: None, + display_name: "o_arvalid [3:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (62): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + ], + ), + name: "i_bvalid", + ), + color: None, + background_color: None, + display_name: "i_bvalid [3:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (68): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + ], + ), + name: "o_awvalid", + ), + color: None, + background_color: None, + display_name: "o_awvalid [3:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (198): Divider(( + color: None, + background_color: None, + name: None, + )), + (267): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + "switchs", + "SLV_SWITCHS_GEN[0]", + "slv_switch", + "slv_switch_rd", + ], + ), + name: "rch_en_c", + ), + color: None, + background_color: None, + display_name: "rch_en_c", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (77): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + ], + ), + name: "o_arready", + ), + color: None, + background_color: None, + display_name: "o_arready [3:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (209): Divider(( + color: None, + background_color: None, + name: None, + )), + (59): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + ], + ), + name: "i_wvalid", + ), + color: None, + background_color: None, + display_name: "i_wvalid [3:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (222): Divider(( + color: None, + background_color: None, + name: None, + )), + (278): Divider(( + color: None, + background_color: None, + name: None, + )), + (203): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + "switchs", + ], + ), + name: "aclk", + ), + color: None, + background_color: None, + display_name: "aclk", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (232): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "slv_monitor0", + ], + ), + name: "rlast", + ), + color: None, + background_color: None, + display_name: "…slv_monitor0.rlast", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (36): Divider(( + color: None, + background_color: None, + name: None, + )), + (215): Divider(( + color: None, + background_color: None, + name: None, + )), + (55): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + ], + ), + name: "i_arvalid", + ), + color: None, + background_color: None, + display_name: "i_arvalid [3:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (61): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + ], + ), + name: "i_wlast", + ), + color: None, + background_color: None, + display_name: "i_wlast [3:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (56): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + ], + ), + name: "i_arready", + ), + color: None, + background_color: None, + display_name: "i_arready [3:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (212): Divider(( + color: None, + background_color: None, + name: None, + )), + (284): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "slv_monitor1", + ], + ), + name: "rlast", + ), + color: None, + background_color: None, + display_name: "…slv_monitor1.rlast", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (78): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + ], + ), + name: "o_rvalid", + ), + color: None, + background_color: None, + display_name: "…dut.o_rvalid [3:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (262): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + "switchs", + "SLV_SWITCHS_GEN[0]", + "slv_switch", + "slv_switch_rd", + ], + ), + name: "i_rlast", + ), + color: None, + background_color: None, + display_name: "…slv_switch_rd.i_rlast", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (66): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + ], + ), + name: "i_rlast", + ), + color: None, + background_color: None, + display_name: "…dut.i_rlast [3:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (73): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + ], + ), + name: "o_wlast", + ), + color: None, + background_color: None, + display_name: "o_wlast [3:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (201): Divider(( + color: None, + background_color: None, + name: Some("Top Level Signals"), + )), + (75): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + ], + ), + name: "o_bready", + ), + color: None, + background_color: None, + display_name: "o_bready [3:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (60): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + ], + ), + name: "i_wready", + ), + color: None, + background_color: None, + display_name: "i_wready [3:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (57): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + ], + ), + name: "i_awvalid", + ), + color: None, + background_color: None, + display_name: "i_awvalid [3:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (214): Divider(( + color: None, + background_color: None, + name: None, + )), + (216): Divider(( + color: None, + background_color: None, + name: None, + )), + (220): Divider(( + color: None, + background_color: None, + name: None, + )), + (208): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + ], + ), + name: "AXI_ID_W", + ), + color: None, + background_color: None, + display_name: "AXI_ID_W", + display_name_type: Unique, + manual_name: None, + format: Some("Unsigned"), + field_formats: [], + )), + (233): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "slv_monitor0", + ], + ), + name: "rid", + ), + color: None, + background_color: None, + display_name: "…slv_monitor0.rid [7:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (281): Divider(( + color: None, + background_color: None, + name: None, + )), + (244): Divider(( + color: None, + background_color: None, + name: None, + )), + (257): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + "switchs", + "SLV_SWITCHS_GEN[0]", + "slv_switch", + "slv_switch_rd", + ], + ), + name: "o_rready", + ), + color: None, + background_color: None, + display_name: "…slv_switch_rd.o_rready [3:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (70): Divider(( + color: None, + background_color: None, + name: None, + )), + (261): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + "switchs", + "SLV_SWITCHS_GEN[0]", + "slv_switch", + "slv_switch_rd", + ], + ), + name: "i_rready", + ), + color: None, + background_color: None, + display_name: "…slv_switch_rd.i_rready", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (218): Divider(( + color: None, + background_color: None, + name: None, + )), + (69): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + ], + ), + name: "o_awready", + ), + color: None, + background_color: None, + display_name: "o_awready [3:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (204): Divider(( + color: None, + background_color: None, + name: None, + )), + (168): Variable(( variable_ref: ( path: ( strs: [ "axicb_crossbar_top_testbench", "dut", - "switchs", - "MST_SWITCHS_GEN[0]", - "mst_switch", - "mst_switch_wr", ], ), - name: "i_awvalid", + name: "i_rch", ), - color: Some("pink"), + color: None, background_color: None, - display_name: "i_awvalid [3:0]", + display_name: "…dut.i_rch [183:0]", display_name_type: Unique, manual_name: None, format: None, field_formats: [], )), - (4): Variable(( + (221): Divider(( + color: None, + background_color: None, + name: None, + )), + (170): Variable(( variable_ref: ( path: ( strs: [ "axicb_crossbar_top_testbench", "dut", - "switchs", - "MST_SWITCHS_GEN[0]", - "mst_switch", - "mst_switch_wr", ], ), - name: "i_awready", + name: "o_rch", ), color: None, background_color: None, - display_name: "i_awready [3:0]", + display_name: "…dut.o_rch [183:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (71): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + ], + ), + name: "o_wvalid", + ), + color: None, + background_color: None, + display_name: "o_wvalid [3:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (80): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + ], + ), + name: "o_rlast", + ), + color: None, + background_color: None, + display_name: "…dut.o_rlast [3:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (81): Divider(( + color: None, + background_color: None, + name: None, + )), + (196): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + "slv0_if", + ], + ), + name: "i_araddr", + ), + color: None, + background_color: None, + display_name: "i_araddr [15:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (210): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + ], + ), + name: "i_awch", + ), + color: None, + background_color: None, + display_name: "i_awch [227:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (285): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "slv_monitor1", + ], + ), + name: "rid", + ), + color: None, + background_color: None, + display_name: "…slv_monitor1.rid [7:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (230): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "slv_monitor0", + ], + ), + name: "rvalid", + ), + color: None, + background_color: None, + display_name: "…slv_monitor0.rvalid", display_name_type: Unique, manual_name: None, format: None, field_formats: [], )), - (8): Variable(( + (268): Variable(( variable_ref: ( path: ( strs: [ "axicb_crossbar_top_testbench", "dut", "switchs", - "MST_SWITCHS_GEN[0]", - "mst_switch", - "mst_switch_wr", + "SLV_SWITCHS_GEN[0]", + "slv_switch", + "slv_switch_rd", ], ), - name: "o_bready", + name: "rch_en_r", ), color: None, background_color: None, - display_name: "o_bready", + display_name: "rch_en_r", display_name_type: Unique, manual_name: None, format: None, field_formats: [], )), - (7): Variable(( + (263): Variable(( variable_ref: ( path: ( strs: [ "axicb_crossbar_top_testbench", "dut", "switchs", - "MST_SWITCHS_GEN[0]", - "mst_switch", - "mst_switch_wr", + "SLV_SWITCHS_GEN[0]", + "slv_switch", + "slv_switch_rd", ], ), - name: "o_bvalid", + name: "i_rch", + ), + color: None, + background_color: None, + display_name: "…slv_switch_rd.i_rch [45:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (79): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + ], + ), + name: "o_rready", ), color: None, background_color: None, - display_name: "o_bvalid", + display_name: "…dut.o_rready [3:0]", display_name_type: Unique, manual_name: None, format: None, field_formats: [], )), - (2): Variable(( + (258): Variable(( variable_ref: ( path: ( strs: [ "axicb_crossbar_top_testbench", "dut", "switchs", - "MST_SWITCHS_GEN[0]", - "mst_switch", - "mst_switch_wr", + "SLV_SWITCHS_GEN[0]", + "slv_switch", + "slv_switch_rd", + ], + ), + name: "o_rlast", + ), + color: None, + background_color: None, + display_name: "…slv_switch_rd.o_rlast [3:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (231): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "slv_monitor0", + ], + ), + name: "rready", + ), + color: None, + background_color: None, + display_name: "…slv_monitor0.rready", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (205): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", ], ), - name: "aresetn", + name: "i_arch", ), color: None, background_color: None, - display_name: "aresetn", + display_name: "i_arch [227:0]", display_name_type: Unique, manual_name: None, format: None, field_formats: [], )), - (5): Variable(( + (269): Variable(( variable_ref: ( path: ( strs: [ "axicb_crossbar_top_testbench", "dut", "switchs", - "MST_SWITCHS_GEN[0]", - "mst_switch", - "mst_switch_wr", + "SLV_SWITCHS_GEN[0]", + "slv_switch", + "slv_switch_rd", ], ), - name: "o_awvalid", + name: "rch_req", ), color: None, background_color: None, - display_name: "o_awvalid", + display_name: "rch_req [3:0]", display_name_type: Unique, manual_name: None, format: None, field_formats: [], )), - (11): Divider(( + (217): Divider(( color: None, background_color: None, name: None, )), - (1): Variable(( + (266): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + "switchs", + "SLV_SWITCHS_GEN[0]", + "slv_switch", + "slv_switch_rd", + ], + ), + name: "rch_en", + ), + color: None, + background_color: None, + display_name: "rch_en", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (64): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + ], + ), + name: "i_rvalid", + ), + color: None, + background_color: None, + display_name: "…dut.i_rvalid [3:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (165): Variable(( variable_ref: ( path: ( strs: [ "axicb_crossbar_top_testbench", "dut", "switchs", - "MST_SWITCHS_GEN[0]", - "mst_switch", - "mst_switch_wr", ], ), name: "aclk", @@ -194,49 +1387,126 @@ format: None, field_formats: [], )), - (10): Divider(( + (256): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "dut", + "switchs", + "SLV_SWITCHS_GEN[0]", + "slv_switch", + "slv_switch_rd", + ], + ), + name: "o_rvalid", + ), + color: None, + background_color: None, + display_name: "…slv_switch_rd.o_rvalid [3:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (272): Divider(( + color: None, + background_color: Some("pink"), + name: Some("slv1"), + )), + (276): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "slv_monitor1", + ], + ), + name: "arid", + ), + color: None, + background_color: None, + display_name: "…slv_monitor1.arid [7:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (226): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "slv_monitor0", + ], + ), + name: "araddr", + ), + color: None, + background_color: None, + display_name: "…slv_monitor0.araddr [15:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (229): Variable(( + variable_ref: ( + path: ( + strs: [ + "axicb_crossbar_top_testbench", + "slv_monitor0", + ], + ), + name: "arid", + ), + color: None, + background_color: None, + display_name: "…slv_monitor0.arid [7:0]", + display_name_type: Unique, + manual_name: None, + format: None, + field_formats: [], + )), + (211): Divider(( color: None, background_color: None, name: None, )), - (6): Variable(( + (273): Variable(( variable_ref: ( path: ( strs: [ "axicb_crossbar_top_testbench", - "dut", - "switchs", - "MST_SWITCHS_GEN[0]", - "mst_switch", - "mst_switch_wr", + "slv_monitor1", ], ), - name: "o_awready", + name: "arvalid", ), color: None, background_color: None, - display_name: "o_awready", + display_name: "…slv_monitor1.arvalid", display_name_type: Unique, manual_name: None, format: None, field_formats: [], )), }, - display_item_ref_counter: 11, + display_item_ref_counter: 286, viewports: [ ( - curr_left: (0.5579130859374998), - curr_right: (0.5588896484374998), + curr_left: (0.1529179687499914), + curr_right: (0.1607304687499914), ), ], cursor: Some((1, [ - 50118000, + 3583173, ])), right_cursor: None, markers: {}, - focused_item: Some((3)), + focused_item: Some((26)), default_variable_name_type: Unique, - scroll_offset: 0.0, + scroll_offset: 320.0, display_variable_indices: true, )), drag_started: false, diff --git a/test/svut/src/axicb_crossbar_top_testbench.sv b/test/svut/src/axicb_crossbar_top_testbench.sv index 7363767..34f8e24 100644 --- a/test/svut/src/axicb_crossbar_top_testbench.sv +++ b/test/svut/src/axicb_crossbar_top_testbench.sv @@ -1,7 +1,7 @@ // distributed under the mit license // https://opensource.org/licenses/mit-license.php -/// Mandatory file to be able to launch SVUT flow +// Mandatory file to be able to launch SVUT flow `include "svut_h.sv" `timescale 1 ns / 1 ps