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9619_U12.pld
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9619_U12.pld
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GAL22V10
22V10
;STANDARD PIN DEFINITION
A8 A9 A15 A10 A14 A11 A13 A12 A7 A6 A5 GND
VEC U13 U17 U20 U7 U34 U11 U10 DEC VMA VUA VCC
;MEMORY MAP
;U7 : FFE0-FFFF - ROM
;U10: FFC0-FFDF - Internal I/O
;VEC: FFC0-FFC3 - Priority Interrupt Vector Generator at U4
;DEC: FF80-FFBF - External I/O and UTIL_DECODE
;U7 : E000-FF7F - ROM
;U13: C000-DFFF - RAM/ROM
;U17: A000-BFFF - RAM/ROM
;U34: 8000-9FFF * STANDARD 8K RAM, 0000-7FFF EXTERNAL "32K+ ON BOARD"
;U20: 0000-7FFF * OPTION FOR 32K RAM, "64K ON BOARD"
;4K RAM OPTION
;U34: 8000-8FFF
;U20: 9000-9FFF
;8000-9FFF U20,U34 4K RAM OPTION
;/U20 = A15 * /A14 * /A13 * A12
;/U34 = A15 * /A14 * /A13 * /A12
;8000-9FFF U34 8K RAM
/U34 = A15 * /A14 * /A13
; U20 EMPTY (GLITCHES IF UNDEFINED)
U20 = /A15 + A15 ; 32K+ ON BOARD
;0000-7FFF U20 32K RAM (64K total) OPTION
;/U20 = /A15 ; 64K ON BOARD
;A000-BFFF RAM/ROM
/U17 = A15 * /A14 * A13
;C000-DFFF RAM/ROM
/U13 = A15 * A14 * /A13
;E000-FF7F, FFE0-FFFF ROM
/U7 = A15 * A14 * A13 * DEC * U10
;FF80-FFBF - External I/O
/DEC = A15 * A14 * A13 * A12 * A11 * A10 * A9 * A8 * A7 * /A6
;FFC0-FFDF - Internal I/O (except for VEC)
/U10 = A15 * A14 * A13 * A12 * A11 * A10 * A9 * A8 * A7 * A6 * /A5
;VUA/VMA OPTIONS
;CONSISTENT WITH CMS 9639 (EXT MEM IS VMA, EXT IO IS VUA ?)
;VMA = /DEC ; 64K ON BOARD, CMS 9639 LOGIC
;VMA = /A15 ; 32K+ ON BOARD, CMS 9639 LOGIC
;VUA = /DEC ; CMS 9639 LOGIC
;CONSISTENT WITH CMS 9619 (VMA, VUA BOTH HI ON IO OR MEM ADDRESSES)
/VUA = DEC * A15 ; 32K+ ON BOARD, CMS 9619 LOGIC
/VMA = DEC * A15 ; 32K+ ON BOARD, CMS 9619 LOGIC
;VUA = /DEC ; 64K ON BOARD, CMS 9619 LOGIC
;VMA = /DEC ; 64K ON BOARD, CMS 9619 LOGIC
;EXTERNAL DATA BUS ENABLE (VEC is on the external side of U11) (HI ENABLE)
;/U11 = /VMA * /VUA * DEC * VEC ; (U11 = VMA + /DEC + /VEC)
/U11 = A15 * DEC * VEC ; (U11 = /A15 + /DEC + /VEC) 32K+ ON BOARD
DESCRIPTION
CMS 9619 U13 Address decoder - Reverse engineered.
Replaces PAL20L10
Set for 32K RAM + External
12-JUN-2021