These devices feature a 15-bit wide code memory. Byte order is little endian. The instruction set is called SYM_86B or SYM_86A in Padauk include files. The SDCC backend is called pdk15.
| Hex |
1 4 |
1 3 |
1 2 |
1 1 |
1 0 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 | Mnemonic |
ZF ? |
CF ? |
AC ? |
OV ? | Description |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 0x0000 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | NOP | No operation | ||||
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | opcode | Miscellaneous instructions | ||||||||||
| 0x0060 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | ADDC A | ZF | CF | AC | OV | A ← A + CF |
| 0x0061 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | SUBC A | ZF | CF | AC | OV | A ← A - CF |
| 0x0062 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | IZSN A | ZF | CF | AC | OV | Increment A and skip next instruction if A is zero |
| 0x0063 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | DZSN A | ZF | CF | AC | OV | Decrement A and skip next instruction if A is zero |
| 0x0064 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 0 | 0 | ? | |||||
| 0x0065 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | ? | |||||
| 0x0066 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | ? | |||||
| 0x0067 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | PCADD A | Add A to PC | ||||
| 0x0068 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | NOT A | ZF | A ← ~A | |||
| 0x0069 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | NEG A | ZF | A ← NEG(A) | |||
| 0x006A | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 0 | SR A | CF | A ← A >> 1 | |||
| 0x006B | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | SL A | CF | A ← A << 1 | |||
| 0x006C | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 0 | SRC A | CF | A ← CF:A >> 1 | |||
| 0x006D | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | SLC A | CF | A ← A:CF << 1 | |||
| 0x006E | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | SWAP A | Swap the high nibble and low nibble of A | ||||
| 0x006F | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | ? | |||||
| 0x0070 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | WDRESET | Reset Watchdog timer | ||||
| 0x0071 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | ? | |||||
| 0x0072 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | PUSHAF | Push A and flags to stack: [SP] ← A, [SP] ← F, SP ← SP + 2 | ||||
| 0x0073 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | POPAF | ZF | CF | AC | OV | Pop A and flags from stack: SP ← SP + 2, F ← [SP], [SP] ← A |
| 0x0074 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | ? | |||||
| 0x0075 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | RESET | Reset the whole chip | ||||
| 0x0076 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | STOPSYS | System halt (OSC disabled) | ||||
| 0x0077 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | STOPEXE | CPU halt (OSC active to output clock, SYSCLK disabled to save power) | ||||
| 0x0078 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | ENGINT | Global interrupt enbale | ||||
| 0x0079 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | DISGINT | Global interrupt disable | ||||
| 0x007A | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | RET | Return from subroutine | ||||
| 0x007B | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | RETI | Return from interrupt | ||||
| 0x007C | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | MUL | Multiply (if available) | ||||
| 0x007D | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | ? | |||||
| 0x007E | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | ? | |||||
| 0x007F | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | ? | |||||
| 0 | 0 | 0 | 0 | 0 | 0 | c | 7-bit IO addr | Operations with A and IO | |||||||||||||
|
0x0080 ... 0x00FF | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | IO | XOR IO, A | IO ← IO ^ A | ||||||||||
|
0x0100 ... 0x017F | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | IO | MOV IO, A | IO ← A | ||||||||||
|
0x0180 ... 0x01FF | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | IO | MOV A, IO | ZF | A ← IO | |||||||||
| 0 | 0 | 0 | 0 | 0 | 1 | 0 | 8-bit immediate | Return with A | |||||||||||||
| 0x02.. | 0 | 0 | 0 | 0 | 0 | 1 | 0 | k | RET k | A ← k and return from subroutine | |||||||||||
| 0 | 0 | 0 | 0 | 1 | c | 8-bit MEM addr | c | 16 bit memory operations | |||||||||||||
| 0x05.. | 0 | 0 | 0 | 0 | 1 | 0 | 1 | M | 0 | LDTABL M |
A ← LowByte@CodeMem(M) (last bit of M set to 0, M must be word aligned), 2 cycles. The top nibble at M is ignored, resulting in a 12-bit address. If the 12-bit address does not point to a valid address, the behaviour is undefined. | ||||||||||
| 0x05.. | 0 | 0 | 0 | 0 | 1 | 0 | 1 | M | 1 | LDTABH M |
A ← HighByte@CodeMem(M) (last bit of M set to 1, M must be word aligned), 2 cycles. The top nibble at M is ignored, resulting in a 12-bit address. If the 12-bit address does not point to a valid address, the behaviour is undefined. | ||||||||||
| 0x06.. | 0 | 0 | 0 | 0 | 1 | 1 | 0 | M | 0 | STT16 M | Timer16 ← M (last bit of M set to 0, M must be word aligned) | ||||||||||
| 0x06.. | 0 | 0 | 0 | 0 | 1 | 1 | 0 | M | 1 | LDT16 M | M ← Timer16 (last bit of M set to 1, M must be word aligned) | ||||||||||
| 0x07.. | 0 | 0 | 0 | 0 | 1 | 1 | 1 | M | 0 | IDXM M, A | [M] ← A (last bit of M set to 0, M must be word aligned, 2 cycles) | ||||||||||
| 0x07.. | 0 | 0 | 0 | 0 | 1 | 1 | 1 | M | 1 | IDXM A, M | A ← [M] (last bit of M set to 1, M must be word aligned, 2 cycles) | ||||||||||
| 0 | 0 | opcode | 8-bit MEM addr | Operations with A and memory | |||||||||||||||||
| 0x08.. | 0 | 0 | 0 | 1 | 0 | 0 | 0 | M | NMOV A, M | ZF | A ← NEG(M) | ||||||||||
| 0x09.. | 0 | 0 | 0 | 1 | 0 | 0 | 1 | M | NMOV M, A | M ← NEG(A) | |||||||||||
| 0x0A.. | 0 | 0 | 0 | 1 | 0 | 1 | 0 | M | SWAP M | Swap the high nibble and low nibble of M | |||||||||||
| 0x0B.. | 0 | 0 | 0 | 1 | 0 | 1 | 1 | M | ? | ? | |||||||||||
| 0x0C.. | 0 | 0 | 0 | 1 | 1 | 0 | 0 | M | COMP A, M | ZF | CF | AC | OV | Compare A with M (flags changed according to (A-M)) | |||||||
| 0x0D.. | 0 | 0 | 0 | 1 | 1 | 0 | 1 | M | COMP M, A | ZF | CF | AC | OV | Compare M with A (flags changed according to (M-A)) | |||||||
| 0x0E.. | 0 | 0 | 0 | 1 | 1 | 1 | 0 | M | NADD A, M | ZF | CF | AC | OV | A ← M + NEG(A) | |||||||
| 0x0F.. | 0 | 0 | 0 | 1 | 1 | 1 | 1 | M | NADD M, A | ZF | CF | AC | OV | M ← NEG(M) + A | |||||||
| 0x10.. | 0 | 0 | 1 | 0 | 0 | 0 | 0 | M | ADD M, A | ZF | CF | AC | OV | M ← M + A | |||||||
| 0x11.. | 0 | 0 | 1 | 0 | 0 | 0 | 1 | M | SUB M, A | ZF | CF | AC | OV | M ← M - A | |||||||
| 0x12.. | 0 | 0 | 1 | 0 | 0 | 1 | 0 | M | ADDC M, A | ZF | CF | AC | OV | M ← M + A + CF | |||||||
| 0x13.. | 0 | 0 | 1 | 0 | 0 | 1 | 1 | M | SUBC M, A | ZF | CF | AC | OV | M ← M - A - CF | |||||||
| 0x14.. | 0 | 0 | 1 | 0 | 1 | 0 | 0 | M | AND M, A | ZF | M ← M & A | ||||||||||
| 0x15.. | 0 | 0 | 1 | 0 | 1 | 0 | 1 | M | OR M, A | ZF | M ← M A | ||||||||||
| 0x16.. | 0 | 0 | 1 | 0 | 1 | 1 | 0 | M | XOR M, A | ZF | M ← M ^ A | ||||||||||
| 0x17.. | 0 | 0 | 1 | 0 | 1 | 1 | 1 | M | MOV M, A | M ← A | |||||||||||
| 0x18.. | 0 | 0 | 1 | 1 | 0 | 0 | 0 | M | ADD A, M | ZF | CF | AC | OV | A ← A + M | |||||||
| 0x19.. | 0 | 0 | 1 | 1 | 0 | 0 | 1 | M | SUB A, M | ZF | CF | AC | OV | A ← A - M | |||||||
| 0x1A.. | 0 | 0 | 1 | 1 | 0 | 1 | 0 | M | ADDC A, M | ZF | CF | AC | OV | A ← A + M + CF | |||||||
| 0x1B.. | 0 | 0 | 1 | 1 | 0 | 1 | 1 | M | SUBC A, M | ZF | CF | AC | OV | A ← A - M - CF | |||||||
| 0x1C.. | 0 | 0 | 1 | 1 | 1 | 0 | 0 | M | AND A, M | ZF | A ← A & M | ||||||||||
| 0x1D.. | 0 | 0 | 1 | 1 | 1 | 0 | 1 | M | OR A, M | ZF | A ← A M | ||||||||||
| 0x1E.. | 0 | 0 | 1 | 1 | 1 | 1 | 0 | M | XOR A, M | ZF | A ← A ^ M | ||||||||||
| 0x1F.. | 0 | 0 | 1 | 1 | 1 | 1 | 1 | M | MOV A, M | ZF | A ← M | ||||||||||
| 0 | 1 | 0 | opcode | 8-bit MEM addr | Operations with memory | ||||||||||||||||
| 0x20.. | 0 | 1 | 0 | 0 | 0 | 0 | 0 | M | ADDC M | ZF | CF | AC | OV | M ← M + CF | |||||||
| 0x21.. | 0 | 1 | 0 | 0 | 0 | 0 | 1 | M | SUBC M | ZF | CF | AC | OV | M ← M - CF | |||||||
| 0x22.. | 0 | 1 | 0 | 0 | 0 | 1 | 0 | M | IZSN M | ZF | CF | AC | OV | M ← M + 1 , skip next instruction if M is 0 | |||||||
| 0x23.. | 0 | 1 | 0 | 0 | 0 | 1 | 1 | M | DZSN M | ZF | CF | AC | OV | M ← M - 1 , skip next instruction if M is 0 | |||||||
| 0x24.. | 0 | 1 | 0 | 0 | 1 | 0 | 0 | M | INC M | ZF | CF | AC | OV | M ← M + 1 | |||||||
| 0x25.. | 0 | 1 | 0 | 0 | 1 | 0 | 1 | M | DEC M | ZF | CF | AC | OV | M ← M - 1 | |||||||
| 0x26.. | 0 | 1 | 0 | 0 | 1 | 1 | 0 | M | CLEAR M | M ← 0 | |||||||||||
| 0x27.. | 0 | 1 | 0 | 0 | 1 | 1 | 1 | M | XCH M | Exchange A with M | |||||||||||
| 0x28.. | 0 | 1 | 0 | 1 | 0 | 0 | 0 | M | NOT M | ZF | M ← ~M | ||||||||||
| 0x29.. | 0 | 1 | 0 | 1 | 0 | 0 | 1 | M | NEG M | ZF | M ← NEG(M) | ||||||||||
| 0x2A.. | 0 | 1 | 0 | 1 | 0 | 1 | 0 | M | SR M | CF | M ← M >> 1 | ||||||||||
| 0x2B.. | 0 | 1 | 0 | 1 | 0 | 1 | 1 | M | SL M | CF | M ← M << 1 | ||||||||||
| 0x2C.. | 0 | 1 | 0 | 1 | 1 | 0 | 0 | M | SRC M | CF | M ← CF:M >> 1 | ||||||||||
| 0x2D.. | 0 | 1 | 0 | 1 | 1 | 0 | 1 | M | SLC M | CF | M ← M:CF << 1 | ||||||||||
| 0x2E.. | 0 | 1 | 0 | 1 | 1 | 1 | 0 | M | CEQSN A, M | ZF | CF | AC | OV | Skip next instruction if M is equal to A | |||||||
| 0x2F.. | 0 | 1 | 0 | 1 | 1 | 1 | 1 | M | CNEQSN A, M | ZF | CF | AC | OV | Skip next instruction if M is not equal to A | |||||||
| 0 | 1 | 1 | c | bit pos | 7-bit IO addr | Bit operations with IO | |||||||||||||||
|
0x3000 ... 33FF | 0 | 1 | 1 | 0 | 0 | n | IO | T0SN IO.n | Test bit n of IO and skip next instruction if clear | ||||||||||||
|
0x3400 ... 37FF | 0 | 1 | 1 | 0 | 1 | n | IO | T1SN IO.n | Test bit n of IO and skip next instruction if set | ||||||||||||
|
0x3800 ... 3BFF | 0 | 1 | 1 | 1 | 0 | n | IO | SET0 IO.n | Clear bit n of IO | ||||||||||||
|
0x3C00 ... 3FFF | 0 | 1 | 1 | 1 | 1 | n | IO | SET1 IO.n | Set bit n of IO | ||||||||||||
| 1 | 0 | 0 | c | bit pos | 7-bit MEM addr | Bit operations with memory | |||||||||||||||
|
0x4000 ... 43FF | 1 | 0 | 0 | 0 | 0 | n | M | T0SN M.n | Test bit n of memory M and skip next instruction if clear | ||||||||||||
|
0x4400 ... 47FF | 1 | 0 | 0 | 0 | 1 | n | M | T1SN M.n | Test bit n of memory M and skip next instruction if set | ||||||||||||
|
0x4800 ... 4BFF | 1 | 0 | 0 | 1 | 0 | n | M | SET0 M.n | Clear bit n of memory M | ||||||||||||
|
0x4C00 ... 4FFF | 1 | 0 | 0 | 1 | 1 | n | M | SET1 M.n | Set bit n of memory M | ||||||||||||
| 1 | 0 | 1 | 0 | opcode | 8-bit immediate | Operations with A and 8-bit literal | |||||||||||||||
| 0x50.. | 1 | 0 | 1 | 0 | 0 | 0 | 0 | k | ADD A, k | ZF | CF | AC | OV | A ← A + k | |||||||
| 0x51.. | 1 | 0 | 1 | 0 | 0 | 0 | 1 | k | SUB A, k | ZF | CF | AC | OV | A ← A - k | |||||||
| 0x52.. | 1 | 0 | 1 | 0 | 0 | 1 | 0 | k | CEQSN A, k | ZF | CF | AC | OV | Skip next instruction if A equals k | |||||||
| 0x53.. | 1 | 0 | 1 | 0 | 0 | 1 | 1 | k | CNEQSN A, k | ZF | CF | AC | OV | Skip next instruction if A not equals k | |||||||
| 0x54.. | 1 | 0 | 1 | 0 | 1 | 0 | 0 | k | AND A, k | ZF | A ← A & k | ||||||||||
| 0x55.. | 1 | 0 | 1 | 0 | 1 | 0 | 1 | k | OR A, k | ZF | A ← A k | ||||||||||
| 0x56.. | 1 | 0 | 1 | 0 | 1 | 1 | 0 | k | XOR A, k | ZF | A ← A ^ k | ||||||||||
| 0x57.. | 1 | 0 | 1 | 0 | 1 | 1 | 1 | k | MOV A, k | A ← k | |||||||||||
| 1 | 0 | 1 | 1 | 1 | bit pos | 7-bit IO addr | Special operation with CF and IO | ||||||||||||||
|
0x5C00 ... 0x5FFF | 1 | 0 | 1 | 1 | 1 | n | IO | SWAPC IO.n | CF | Swap bit IO.n with CF | |||||||||||
| 1 | 1 | c | k | Control transfers | |||||||||||||||||
|
0x6000 ... 0x6FFF | 1 | 1 | 0 | k | GOTO k | Jump to k (address in words, 2 cycles) | |||||||||||||||
|
0x7000 ... 0x7FFF | 1 | 1 | 1 | k | CALL k | Call subroutine k (address in words, 2 cycles) | |||||||||||||||
| Device |
| MUL | NMOV A, M | NMOV M, A | SWAP M | XOR A, IO | XOR IO, A |
|---|---|---|---|---|---|---|---|
| MCU371 | ? | ? | ? | ? | ? | ? | - |
| PFS123 | 1 | - | Y | Y | Y | - | - |
| PFS173 | 1 | - | u | u | u | - | - |
| 1 | Y | Y | Y | Y | Y | Y | |
| PML100 | 1 | - | - | - | - | - | - |
| PML100B | 1 | - | - | - | - | - | - |
| PMS132K | 1 | ? | ? | ? | ? | ? | - |
| PMS133 | 1 | Y | Y | Y | Y | Y | - |
| PMS134 | 1 | Y | Y | Y | Y | Y | - |
| PMS152E | 1 | - | - | - | - | - | - |
| PMS160 | 1 | - | - | - | - | - | - |
| XDM4105 | ? | ? | ? | ? | ? | ? | - |