Welcome to HEIR Discussions!

[j2kun]

👋 Welcome!

We’re using Discussions as a place to connect with other members of our community. We hope that you:

• Ask questions you’re wondering about.
• Share ideas.
• Engage with other community members.
• Welcome others and are open-minded. Remember that this is a community we
  build together 💪.

See the website https://google.github.io/heir/ for more information about HEIR, and https://google.github.io/heir/blog/ for a blog + RSS feed to be notified of updates.

[Zian-Z]

Hi Jeremy! We are FHE researchers from the university and we are really keen on collabrating with HEIR community and attending online meetings. Could you tell me how to get involved and what events are coming up?

[j2kun]

Hello! Our next meeting is tomorrow at 8AM PST. You can see the calendar here: https://google.github.io/heir/community/ and the video chat URL is meet.google.com/xzv-oxgy-xwt

[j2kun]

As for "how to get involved," perhaps you and your colleagues could provide some help around scheme switching? We were thinking we'd have a scheme-switching dialect, but you are the experts on this topic :)

I have been focusing on lower-level (polynomial math) stuff for the last few weeks, my colleague @asraa and I are both working on getting an (R)LWE & CGGI/TFHE dialect off the ground and exporting to an external API at that level, and @mr0re1 is working on a BGV dialect. We also have someone ramping up soon to start building out our first hardware accelerator dialect.

Other areas that are not getting much attention right now include plumbing through any sort of front-end, the BFV & CKKS scheme dialects, determining the right layer between secret<i32> and the scheme dialects (e.g., RNS/CRT decompositions, materializing a secret in terms of concrete key sets), determining how to build noise modeling constraints in MLIR.

[snowzjx]

Hi Jeremy! We are researchers from Hong Kong University of Science and Technology and we are now working on FHE hardware accelerators. We are very interested in the HEIR project and want to get involved. I am wondering whether there are hardware related discussions in the online meeting since I have not seen something after the second meeting minutes.

By the way, we have a survey on FHE accelerators (https://arxiv.org/abs/2212.01713) and please see if it could help the project.

[j2kun]

To add to what Asra said, we have roughly three accelerator-related things going on right now. The first is ongoing work with @WoutLegiest and the KU Leuven folks on adding a backend for their FPT FPGA (for boolean schemes), which I'm hoping we can get into a decent place in 2024Q1. The second is a tentative plan to add support for the BASILISC FPGA out of Galois+Niobium+KU Leuven (for arithmetic schemes), which we hope to have working by the end of 2024Q2. The third is getting proper TPU acceleration via the jaxite library (which would eventually likely be subsumed by HEIR exporting directly to JAX or HLO).

Once we have two FPGAs supported, there will be natural questions about what useful abstractions apply across accelerators. And we will need to start building out a benchmarking system and get our some real hardware to run it all on.

We're always open to expanding this plan to other accelerators if you have something specific in mind! On the Google side it's just me and @asraa for now, so we're limited mostly by bandwidth.

[snowzjx]

Thanks for the information. We are current working on designing a FHE accelerator that could simutaneously accelerator both arithmetic (e.g., CKKS) and boolean (e.g., TFHE) schemes and technologies to convert between them (e.g., PEGASUS https://eprint.iacr.org/2020/1606.pdf). To achieve the goal, we need to analyze the common abstractions of these schemes, which is similar to what you mentioned. Moreover, we have some RTL code for the NTT/iNTT and transpose (not open sourced yet). I would like to see if these code is useful to the project.

For the hardware benchmarking system, we have several Xilinx U250 accelerators with VU13P FPGA and could use them for benchmarking. By the way, many people (at least in the academic field) are now working on ASIC-based accelerator (details are in our survey), how to benchmark these accelerators brings a large question (maybe a simulator is needed).

[asraa]

Hey @snowzjx! Very excited to have you. There are meeting minutes for our following meetings here: https://heir.dev/blog/

Our next meeting will be on January 9th (https://heir.dev/community/) and please come and we can add you to our chat room as well.

I'll take a look at the survey :)

[johnmatter]

Hello! I'm an HE/ML developer at Old Dominion University. Does the Discord link on heir.dev require an invite? It doesn't seem to be bringing me to a server. It says "You don't have access to any text channels, or there are none in this server."

Thanks!

John Matter

[Maokami]

Hello @johnmatter!

I'm not sure but could you try using this link? You can find "heir" channel under "FHE LIBRARIES" section!

[j2kun]

Hmmm maybe the direct link only works if you're already in the FHE.org discord server? Not sure, I haven't used discord a lot before this.

[asraa]

I think that might be true - I'll update the docs to reflect joining the FHE.org discord, and then link to our channel.

[johnmatter]

Hello @johnmatter!

I'm not sure but could you try using this link? You can find "heir" channel under "FHE LIBRARIES" section!

This link worked! Thank you so much