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introduction.tex
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Recently, the microprocessor industry has adopted heterogeneous
multi-core processor designs for embedded systems. Heterogeneous
multicores integrate slow, lower-power cores with powerful and
power-hungry ones, to provide a wide range of power and performance
tradeoffs. Such heterogeneous computing platforms are seeing
widespread adoption in many cyber-physical systems (CPS) --- computing
systems that closely interact with the physical world --- including
intelligent automotive systems, medical devices, and smart robotics.
For example, the ARM big.LITTLE, which is a heterogeneous computing
architecture integrating relatively slow and fast cores, is expected
to see widespread adoption in automotive systems~\cite{armvehicle,
armvehicle1, armvehicle2, armvehicle3}. This heterogeneous computing
technology can serve multiple automotive needs including infotainment
and advanced driver assistance systems. Succinctly, this processor
design has the potential to ``deliver exceptional power and
performance that aligns to the vision of scalable solutions for
automotive customers~\cite{armvehicle}.''
\vspace{2mm} \noindent \textbf{Two Fundamentally Conflicting Goals of
Heterogeneous Computing in CPS: Timing Correctness and Energy
Guarantees.} When timing correctness (i.e., enabling timing
constraints to be analytically validated at design time) takes the
form of hard real-time constraints, timing and energy efficiency are
fundamentally in conflict \cite{conflict-book}. The conflict arises
because hard real-time guarantees require reserving resources
sufficient for worst case latency. In contrast, energy efficiency
requires allocating resources that just meet the needs of the current
job. Even when worst case resource allocation is coupled with
aggressive energy reduction (e.g., in the form of voltage scaling
\cite{Dudani2002} or sleep states \cite{Huang2009}), this strategy is
less energy-efficient than allocating for the current case --- a fact
which has been demonstrated both analytically
\cite{Albers2011,Bansal2011,Irani} and empirically
\cite{LeSueur11,HotPower,Imes2014a,PowerSlope}. Of course, hard timing
guarantees are a requirement for correct operation of
CPS,\footnote{The functional correctness of most CPS hinges crucially
upon the temporal correctness, as the control operations depend on
the processing of certain environmental sensing and computation
tasks} and their strict size, weight, and power (SWaP) requirements
-- as well as common reliance on battery power -- demand low energy
consumption.
\vspace{2mm} \noindent \textbf{Proposed approach.} Establishing timing
correctness requires real-time resource allocation methods. Most
existing works on real-time resource allocation in heterogeneous
systems focus on guaranteeing timing correctness (e.g., see
\cite{raravi2014task, raravi2013assigning, niemeier2011partitioned}
for an overview). A couple of recently conducted
works~\cite{liuenergy, colin2014energy} seek to explore timing-energy
tradeoffs when designing resource allocation methods for heterogeneous
systems. Unfortunately, such works fail to maximize energy efficiency
for two reasons. First, they have primarily focused on porting
existing techniques developed for homogeneous systems, i.e., they make
scheduling decisions based purely on timing-related concerns and then
reduce energy consumption on a ``best-effort'' basis. When ported to
heterogeneous systems, existing techniques are more energy efficient,
but this gain is entirely due to the processor architecture and not an
inherent feature of the algorithm. The key insight in our proposed
work will be to start from scratch and incorporate knowledge of
heterogeneity and energy into our proposed algorithms from the
beginning of the project. This approach promises to lead to new
algorithms that have better energy efficiency and offer new
capabilities. Second, the existing works make the following critical
assumption: all processor cores can operate at max speed all the time
while sustaining safe power dissipation. This assumption is
unfortunately invalid due to the critical ``dark silicon'' effect;
i.e., essentially all processors are over-provisioned and have much
larger maximum compute capacity than they can safely
sustain\cite{exynos5,DaSi2011,Venkatesh2010}. Motivated by these
observations, our goal is to simultaneously achieve timing correctness
and energy efficiency on heterogeneous platforms by:
\textbf{(\textit{i}) identifying the most energy-efficient resource
allocation methods that guarantee timing correctness on a
heterogeneous platform}, and \textbf{(\textit{ii}) developing
aggressive energy-oriented resource allocation methods that exploit
dark silicon, where heterogeneous processors have tremendous
additional compute capacity that can only be used for short amounts
of time}. Such methods would aggressively achieve significant energy
savings while avoiding timing errors by utilizing the over-provisioned
processing capacity in short bursts.
\vspace{2mm} \noindent \textbf{Research objectives.} We will pursue
the following four-step plan to accomplish our research goal.
\begin{itemize}\itemsep 0pt \parskip 0pt
\item \textbf{Step1: Identify the most energy-efficient configurations
of resource allocation and DVFS that guarantee timing:} We will
design energy-oriented scheduling methods for heterogeneous
platforms. The goal is to minimize energy consumption while
guarantee timing correctness. For each devised algorithm, formal
timing validation tests will be developed.
\item \textbf{Step 2: Develop aggressive energy-saving techniques that
exploit dark silicon.} We will develop new resource allocation
techniques that aggressively reduce energy consumption for mixed
critical real-time workloads by spending as much time as possible in
slower, more energy-efficient states. Timing errors will be avoided
by utilizing the over-provisioned processing capacity in short
bursts.
\item \textbf{Step 3: Carry out overhead-aware schedulability
studies.} The research in the first two steps will provide
solutions for simultaneously achieving timing correctness and energy
guarantees on heterogeneous computing platforms. To evaluate their
effectiveness in practice, we will incorporate them in real hardware
(based on the ARM big.LITTLE architecture) and conduct large-scale
overhead-aware schedulability experiments with both synthetic
workloads with widely varied parameters and benchmarks. We plan to
apply an extensive methodology that is designed for comparing
real-time resource allocation strategies in an overhead-cognizant
way \cite{clustered, bastoni2010, BBBdissertation}, which is proven
to be effective for many real-time systems.
\item \textbf{Step 4: Conduct case-studies.} To determine if our
proposed methods can be applied in practice, we intend to conduct
case-study evaluations using several specific real-time workloads
seen in automotive systems. For example, one such application we
will consider is real-time object recognition, which is heavily
performed in automotive systems for implementing tools such as
collision avoidance and traffic sign recognition. We will evaluate
the performance in terms of several specific metrics for using one
or more preferable configurations identified in Step~3 to support
such workloads.
\end{itemize}
\vspace{2mm} \noindent \textbf{Qualification.} The PIs are
well-qualified to conduct this research. The proposing team has worked
on various aspects of real-time systems, heterogeneous multicore
computing, and energy optimization in the past years, including
theoretical real-time analysis~\cite{Liu1, Liu2, Liu6, Liu7, Liu10,
liu2014supporting, Liu3, Liu4, Liu5, Liu9, Liu11, Liu13,
chen2015k2u}, real-time operating systems~\cite{elliott1minimizing,
Liu12, GPES, zhou2015supporting, Zhou2014a}, heterogeneous multicore
architecture~\cite{Zhou2014a, GPES}, and energy efficient computing
under various computer architectures~\cite{Liu12}. These efforts have
resulted in a number of publications accepted by several systems- and
architecture-related premium conference and journal venues such as
SOSP, ASPLOS, RTSS, ISCA, Micro, and IEEE Transactions on Parallel and
Distributed Systems. PI Liu has been working on developing device
driver and operating systems support for heterogeneous real-time
systems~\cite{GPES, zhou2015supporting, Zhou2014a}, resource
allocation on heterogeneous platforms~\cite{Tong14a, LiuRTSS14a,
chen2015k2u, Liu12, elliott1minimizing}, and real-time
schedulability analysis~\cite{Liu1, Liu2, Liu6, Liu7, Liu10,
liu2014supporting, LiuRTSS14b, Liu3, Liu4, Liu5, Liu9, Liu11,
Liu13}. PI Hoffmann at the University of Chicago has rich experience
in homogeneous\cite{raw1,raw2,raw3,tilera1,tilera2} and
heterogeneous \cite{ASAP,HPEC,ASAP2,ISSoC} processor design as well
as operating systems support for managing performance and power
tradeoffs
\cite{LEO,POET,DynamicKnobs,JouleGuard,PTRADE,PCP,TCST,HotPower,kim-cpsna}.