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otg_dummy.c
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otg_dummy.c
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#include "otg.h"
#include "otg_common.c"
// This is a dummy stage1 which just spins forever. We use it to ensure that
// the original firmware doesn't run when developing, but instead of writing
// every new iteration to the NVM during development, we can load into memory
// as this program spins endlessly, then halt the CPU and move it to the
// entrypoint. This avoids unnecessary wear on the NVM.
void noreturn S1Start(void) {
// Enable memory arbiter so host can access memory.
OrReg(REG_MEMORY_ARBITER_MODE, REG_MEMORY_ARBITER_MODE__ENABLE);
// Disable data cache.
MaskReg(REG_RX_RISC_MODE, REG_RX_RISC_MODE__ENABLE_DATA_CACHE);
// Enable APE program/SHM/register writes.
OrReg(REG_PCI_STATE,
REG_PCI_STATE__APE_PROGRAM_SPACE_WRITE_ENABLE
|REG_PCI_STATE__APE_SHARED_MEMORY_WRITE_ENABLE
|REG_PCI_STATE__APE_CONTROL_REGISTER_WRITE_ENABLE);
// Loop forever.
for (;;)
SetGencom32(0, 0xBADF00D);
}
const char gS1_versionString[] = "DummyOTG";
asm(
".pushsection .textstart,\"ax\",@progbits\n"
".global S1Entrypoint\n"
".set noreorder\n"
"S1Entrypoint:\n"
"j S1Entrypoint2\n"
"nop\n"
".4byte gS1_versionString\n"
".popsection\n"
".pushsection .textasm,\"ax\",@progbits\n"
".global S1Entrypoint2\n"
"S1Entrypoint2:\n"
"la $sp, S1StackTop\n"
"move $fp, $sp\n"
"lui $k1, 0xC000\n"
"jal S1Start\n"
"nop\n"
".popsection\n"
);
asm(
".pushsection .stage2,\"a\",@progbits\n"
".global S1CRC\n"
"S1CRC:\n"
".4byte 0xDEADBEEF\n"
"\n"
".popsection\n"
".pushsection .ape,\"a\",@progbits\n"
".global APEImageStart\n"
".global APEImageEnd\n"
"APEImageStart:\n"
// This is just a dummy APE for the linker script, for the dummy we reuse the
// APE binary already on the device, since it's fairly large and we don't
// need to rewrite it.
".4byte 0\n"
"APEImageEnd:\n"
".popsection\n"
);
extern int S1Entrypoint;
extern int S1SizeInWords;
extern int S1TextOffset;
extern int APEImageStartPhys;
extern int APEImageSizeInWordsWithTypeByte;
const __attribute__((section(".header"))) otg_header gS1_otgHeader = {
.magic = HEADER_MAGIC,
.s1Entrypoint = (uint32_t)&S1Entrypoint,
.s1Size = (uint32_t)&S1SizeInWords,
.s1Offset = (uint32_t)&S1TextOffset, //sizeof(otg_header),
.bootHdrCRC = 0xDEADBEEF,
.dir = {
[0] = { // Extended directory
.loadAddr = 0,
.typeSize = (0x10<<24)|0x0031,
.offset = 0x34604,
},
[1] = { // APE code
.loadAddr = 0x00000007,
.typeSize = (0x0D<<24)|0x2D5A, //(uint32_t)&APEImageSizeInWordsWithTypeByte,
/* OTG_HEADER_TAG_TYPE__APE_CODE | APEImageSizeInWordsWithTypeByte,*/
.offset = 0x3ED34, //(uint32_t)&APEImageStartPhys,
},
[2] = { // iSCSI boot ROM
.loadAddr = 0x00010000,
.typeSize = (0x09<<24)|0x3E1C,
.offset = 0x4A29C,
},
[3] = { // iSCSI configuration
.loadAddr = 0x00000000,
.typeSize = (0x05<<24)|0x0200,
.offset = 0x59B0C,
},
[4] = { // iSCSI configuration (1)
.loadAddr = 0x00000000,
.typeSize = (0x0B<<24)|0x0200,
.offset = 0x5A30C,
},
[5] = { // Extended VPD
.loadAddr = 0x00000000,
.typeSize = (0x14<<24)|0x0065,
.offset = 0x5BB0C,
},
},
.mfrFormatRev = 0x44,
.dirCRC = 0x00,
.mfrLen = 0x008C,
.mfr2Len = 0x008C,
.mac0 = { 0x000A, 0xF7A44C84 }, // TODO CHANGE THIS
.partNo = "DummyOTG", //"BCM95719",
.partRev = "A0",
.fwRev = 0x012D,
.mfrDate = 0x00000000,
.pciDevice = PCI_DEVICE_ID,
.pciVendor = PCI_VENDOR_ID,
.pciSubsystem = PCI_DEVICE_ID,
.pciSubsystemVendor = PCI_VENDOR_ID,
.cpuClock = 0x0042,
.ncSMBUSAddr = 0x64,
.bmcSMBUSAddr = 0x00,
.powerDissipated = {0x0A,0x00,0x00,0x64}, // @BC
.powerConsumed = {0x0A,0x00,0x00,0x64}, // @C0
.func0CfgFeature = 0xCDB50282, //Talos=0xC5C00080,
.func0CfgHW = 0x00006014, //Talos=0x00004014,
.func0CfgHW2 = 0x00000042, //Talos=0x00000040,
.mac1 = { 0x000A, 0xF7A44C85 },
.func1CfgFeature = 0xCDB50202, //Talos=0xC5C00000,
.func1CfgHW = 0x00006014, //Talos=0x00004014,
.func1CfgHW2 = 0x00000042, //Talos=0x00000040,
.func2CfgFeature = 0xCDB50202, //Talos=0xC5C00000,
.func2CfgHW = 0x00006014, //Talos=0x00004014,
.func2CfgHW2 = 0x00000042, //Talos=0x00000040,
.func3CfgFeature = 0xCDB50202, //Talos=0xC5C00000,
.func3CfgHW = 0x00006014, //Talos=0x00004014,
.func3CfgHW2 = 0x00000042, //Talos=0x00000040,
.cfgShared = 0x0012AA38, //Talos=0x00C2AA38,
.powerBudget0= 0x2C163C2C,
.powerBudget1= 0x0000230A,
.powerBudget2= 0x00000000,
.powerBudget3= 0x00000000,
.macNVMSize = 0x0002,
.cfg5 = 0,
.pciSubsystemF0GPHY = PCI_SUBSYSTEM_ID,
.pciSubsystemF1GPHY = PCI_SUBSYSTEM_ID,
.pciSubsystemF2GPHY = PCI_SUBSYSTEM_ID,
.pciSubsystemF3GPHY = PCI_SUBSYSTEM_ID,
.pciSubsystemF0SERDES = PCI_DEVICE_ID,
.pciSubsystemF1SERDES = PCI_DEVICE_ID,
.pciSubsystemF2SERDES = PCI_DEVICE_ID,
.pciSubsystemF3SERDES = PCI_DEVICE_ID,
.mac2 = { 0x000A, 0xF7A44C86 },
.mac3 = { 0x000A, 0xF7A44C87 },
.vpd = {
0x82,0x0F,0x00,0x55,0x73,0x65,0x20,0x27,0x76,0x70,0x64,0x73,0x65,0x63,0x66,0x67,
0x27,0x00,0x90,0x6B,0x00,0x50,0x4E,0x0E,0x55,0x73,0x65,0x20,0x27,0x76,0x70,0x64,
0x73,0x65,0x63,0x66,0x67,0x27,0x45,0x43,0x09,0x31,0x30,0x36,0x36,0x37,0x39,0x2D,
0x31,0x35,0x53,0x4E,0x0E,0x55,0x73,0x65,0x20,0x27,0x76,0x70,0x64,0x73,0x65,0x63,
0x66,0x67,0x27,0x4D,0x4E,0x04,0x31,0x34,0x65,0x34,0x56,0x30,0x0E,0x55,0x73,0x65,
0x20,0x27,0x76,0x70,0x64,0x73,0x65,0x63,0x66,0x67,0x27,0x52,0x56,0x22,0x09,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
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0x63,0x66,0x67,0x27,0x56,0x31,0x0E,0x55,0x73,0x65,0x20,0x27,0x76,0x70,0x64,0x73,
0x65,0x63,0x66,0x67,0x27,0x52,0x57,0x57,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x78},
};