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Does anyone have an understanding into the trade-offs of providing an instruction pointer to each core, or only to each computer unit? #6

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hughperkins opened this issue Apr 16, 2022 · 0 comments
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@hughperkins
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Does anyone have an understanding into the trade-offs of providing an instruction point to each core, or only to each computer unit?

Things that occur to me, in favor of only having a single program counter per compute unit:

  • one fewer register needed for each core...
  • probably easier to cache instructions
  • easier to heuristically consolidate memroy requests
    • but a cache would hanlde that anyway: if two threads request data from the same cache line, the first thread to make the request will load that cache line, and the second one can use it too; as long as the threads don't diverge in time too much

On the other hand, in favor of separate program counters in each core:

  • increases potential parallelization; and eg one thread might warm up the cache block when it hits the load first, and then the second thread to hit the load will have decreases latency
  • easier to handle ifstatements, and branching: each thread just executes what it needs to execute. no need for all threads to execute an if block that only one thread actually needs, and then throwing away their results
@hughperkins hughperkins added help wanted Extra attention is needed question Further information is requested labels Apr 16, 2022
@hughperkins hughperkins changed the title Does anyone have an understanding into the trade-offs of providing an instruction point to each core, or only to each computer unit? Does anyone have an understanding into the trade-offs of providing an instruction pointer to each core, or only to each computer unit? Apr 16, 2022
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