Performance Ideas

This page will serve as a holding pen for half-baked performance ideas. Once they become more real, they will be migrated into issues we can track against the code.

• Evaluate implementation of StringHelper::GenerateCopyCharactersLong relative to Intel/ARM versions

• Harvest tricks from PowerPC Compiler Writer's Guide

• Consider peep-hole optimization of multiple double access sequences

li r0, offset-1
stdx value, r0, base_reg

• Exploit mmap of object space to limit 64bit addresses to 32bits

• Reserve scratch area in context? for double to integer backing store (instead of the stack)

• Modify double precision logic to take advantage of 64-bit registers. Much of the current logic manipulates high and low parts in two registers (i.e. it assumes 32-bit).

• Optimize mov sequences where applicable (all cases except for those requiring predictable code length or the ability to apply a relocation).

• Avoid two-instruction 64-bit LoadP/StoreP sequences caused by tagged heap object pointers in cases were multiple memory accesses are performed. Modify such sequences to leverage an untagged pointer placed in a temporary register.