diff --git a/IGC/VectorCompiler/include/vc/Utils/GenX/KernelInfo.h b/IGC/VectorCompiler/include/vc/Utils/GenX/KernelInfo.h index 199a57252027..ac8845e2ddb9 100644 --- a/IGC/VectorCompiler/include/vc/Utils/GenX/KernelInfo.h +++ b/IGC/VectorCompiler/include/vc/Utils/GenX/KernelInfo.h @@ -143,15 +143,9 @@ template Ty *getValueAsMetadata(llvm::Metadata *M) { static unsigned alignBarrierCnt(unsigned BarrierCnt) { if (BarrierCnt == 0) return 0; - if (BarrierCnt > 32) { - llvm::report_fatal_error("named barrier count must not exceed 32"); - return 0; - } if (BarrierCnt > 16 && BarrierCnt <= 24) return 24; - if (llvm::isPowerOf2_32(BarrierCnt)) - return BarrierCnt; - return llvm::NextPowerOf2(BarrierCnt); + return llvm::PowerOf2Ceil(BarrierCnt); } struct ImplicitLinearizationInfo { diff --git a/IGC/VectorCompiler/lib/GenXCodeGen/ConstantEncoder.cpp b/IGC/VectorCompiler/lib/GenXCodeGen/ConstantEncoder.cpp index b86032e6e084..2b36afd3d339 100644 --- a/IGC/VectorCompiler/lib/GenXCodeGen/ConstantEncoder.cpp +++ b/IGC/VectorCompiler/lib/GenXCodeGen/ConstantEncoder.cpp @@ -129,7 +129,8 @@ encodeGlobalValue(const GlobalValue &GV, const DataLayout &DL) { RelType = vISA::GenRelocType::R_SYM_ADDR; break; default: - report_fatal_error("Relocation of the provided pointer is not supported"); + vc::diagnose(GV.getContext(), "ConstantEncoder", + "Relocation of the provided pointer is not supported", &GV); } return {APInt::getNullValue(Size.inBits()), {vISA::ZERelocEntry{RelType, 0, GV.getName().str()}}}; diff --git a/IGC/VectorCompiler/lib/GenXCodeGen/GenXBuiltinFunctions.cpp b/IGC/VectorCompiler/lib/GenXCodeGen/GenXBuiltinFunctions.cpp index 9ab64a5bc3d4..b3cbef3817de 100644 --- a/IGC/VectorCompiler/lib/GenXCodeGen/GenXBuiltinFunctions.cpp +++ b/IGC/VectorCompiler/lib/GenXCodeGen/GenXBuiltinFunctions.cpp @@ -19,6 +19,7 @@ SPDX-License-Identifier: MIT #include "GenXSubtarget.h" #include "GenXTargetMachine.h" +#include "vc/Support/GenXDiagnostic.h" #include "vc/Utils/GenX/IntrinsicsWrapper.h" #include "vc/Utils/GenX/KernelInfo.h" #include "vc/Utils/General/BiF.h" @@ -113,10 +114,13 @@ bool GenXBuiltinFunctions::runOnModule(Module &M) { .getTM() .getGenXSubtarget(); - auto Lib = - loadBuiltinLib(M.getContext(), M.getDataLayout(), M.getTargetTriple()); - if (Lib && Linker::linkModules(M, std::move(Lib))) - report_fatal_error("Error linking built-in functions"); + auto &Ctx = M.getContext(); + auto Lib = loadBuiltinLib(Ctx, M.getDataLayout(), M.getTargetTriple()); + if (Lib && Linker::linkModules(M, std::move(Lib))) { + vc::diagnose(Ctx, "GenXBuiltinFunctions", + "Error linking built-in functions"); + return true; + } for (auto &F : M.getFunctionList()) runOnFunction(F); diff --git a/IGC/VectorCompiler/lib/GenXCodeGen/GenXCisaBuilder.cpp b/IGC/VectorCompiler/lib/GenXCodeGen/GenXCisaBuilder.cpp index 6f6aef895558..9a35ea34e318 100644 --- a/IGC/VectorCompiler/lib/GenXCodeGen/GenXCisaBuilder.cpp +++ b/IGC/VectorCompiler/lib/GenXCodeGen/GenXCisaBuilder.cpp @@ -204,7 +204,7 @@ static std::string cutString(const Twine &Str) { } void handleCisaCallError(const Twine &Call, LLVMContext &Ctx) { - vc::fatal(Ctx, "VISA builder API call failed", Call); + vc::diagnose(Ctx, "VISA builder API call failed", Call); } void handleInlineAsmParseError(const GenXBackendConfig &BC, StringRef VisaErr, @@ -224,7 +224,7 @@ void handleInlineAsmParseError(const GenXBackendConfig &BC, StringRef VisaErr, SS << "Enable dumps to see failed visa module\n"; } - vc::fatal(Ctx, "GenXCisaBuilder", SS.str().c_str()); + vc::diagnose(Ctx, "GenXCisaBuilder", ErrMsg); } /*********************************************************************** @@ -260,15 +260,16 @@ bool testPhiNodeHasNoMismatchedRegs(const llvm::PHINode *const Phi, } // namespace -#define CISA_CALL_CTX(c, ctx) \ +#define CISA_CALL_CTX(C, CTX, GM) \ do { \ - auto result = c; \ - if (result != 0) { \ - handleCisaCallError(#c, (ctx)); \ + auto Result = C; \ + if (Result != 0) { \ + GM->setHasError(); \ + handleCisaCallError(#C, (CTX)); \ } \ - } while (0); + } while (0) -#define CISA_CALL(c) CISA_CALL_CTX(c, getContext()) +#define CISA_CALL(C) CISA_CALL_CTX(C, getContext(), getGenXModule()) namespace llvm { @@ -300,6 +301,8 @@ class GenXCisaBuilder final : public ModulePass { } private: + GenXModule *getGenXModule() const { return GM; } + LLVMContext *Ctx = nullptr; GenXModule *GM = nullptr; @@ -404,6 +407,8 @@ class GenXKernelBuilder final { VISABuilder *CisaBuilder = nullptr; private: + GenXModule *getGenXModule() const { return GM; } + void collectKernelInfo(); void buildVariables(); void buildInstructions(); @@ -786,11 +791,17 @@ bool GenXCisaBuilder::runOnModule(Module &M) { if (GM->HasInlineAsm() || !LTOStrings.empty()) { auto *VISAAsmTextReader = GM->GetVISAAsmReader(); auto *CisaBuilder = GM->GetCisaBuilder(); + if (!CisaBuilder || !VISAAsmTextReader) + return Changed; auto ParseVISA = [&](const std::string &Text) { - if (VISAAsmTextReader->ParseVISAText(Text, "") != 0) - handleInlineAsmParseError(*BC, VISAAsmTextReader->GetCriticalMsg(), - Text, *Ctx); + auto Result = VISAAsmTextReader->ParseVISAText(Text, ""); + if (Result == 0) + return; + + GM->setHasError(); + auto Msg = VISAAsmTextReader->GetCriticalMsg(); + handleInlineAsmParseError(*BC, Msg, Text, *Ctx); }; ParseVISA(CisaBuilder->GetAsmTextStream().str()); @@ -912,20 +923,14 @@ void addKernelAttrsFromMetadata(VISAKernel &Kernel, const vc::KernelMetadata &KM, const GenXSubtarget *Subtarget, bool HasBarrier) { + auto &Ctx = KM.getFunction()->getContext(); unsigned SLMSizeInKb = divideCeil(KM.getSLMSize(), 1024); if (SLMSizeInKb > Subtarget->getMaxSlmSize()) - report_fatal_error("SLM size exceeds target limits"); + Ctx.emitError("SLM size exceeds target limits"); Kernel.AddKernelAttribute("SLMSize", sizeof(SLMSizeInKb), &SLMSizeInKb); // Load thread payload from memory. if (Subtarget->hasThreadPayloadInMemory()) { - // The number of GRFs for per thread inputs (thread local IDs) - unsigned NumGRFs = 0; - bool HasImplicit = false; - for (auto Kind : KM.getArgKinds()) { - if (Kind & 0x8) - HasImplicit = true; - } // OCL runtime dispatches CM kernel in a // special "SIMD1" mode (aka "Programmable Media Kernels"). // This mode implies that we always have a "full" thread payload, @@ -933,8 +938,7 @@ void addKernelAttrsFromMetadata(VISAKernel &Kernel, // Payload format: // | 0-15 | 16 - 31 | 32 - 47 | 46 - 256 | // | localIDX | localIDY | localIDZ | unused | - NumGRFs = 1; - + unsigned NumGRFs = 1; uint16_t Bytes = NumGRFs * Subtarget->getGRFByteSize(); Kernel.AddKernelAttribute("PerThreadInputSize", sizeof(Bytes), &Bytes); } @@ -1091,8 +1095,14 @@ bool GenXKernelBuilder::run() { if (!Subtarget) { vc::diagnose(getContext(), "GenXKernelBuilder", "Invalid kernel without subtarget"); - IGC_ASSERT_UNREACHABLE(); + return false; } + if (!CisaBuilder) { + vc::diagnose(getContext(), "GenXKernelBuilder", + "Invalid kernel without CISA builder"); + return false; + } + GrfByteSize = Subtarget->getGRFByteSize(); StackSurf = Subtarget->stackSurface(); @@ -1210,7 +1220,7 @@ void GenXKernelBuilder::buildInputs(Function *F, bool NeedRetIP) { break; default: - report_fatal_error("Unknown input category"); + IGC_ASSERT_EXIT_MESSAGE(0, "Unknown input category"); break; } } @@ -2686,18 +2696,18 @@ bool GenXKernelBuilder::buildMainInst(Instruction *Inst, BaleInfo BI, "cannot bale subroutine call into anything"); buildCall(CI, DstDesc); } else { - Function *Callee = CI->getCalledFunction(); - unsigned IntrinID = vc::getAnyIntrinsicID(Callee); + auto IID = vc::getAnyIntrinsicID(CI); - if (vc::isAnyNonTrivialIntrinsic(IntrinID) && - !Subtarget->isIntrinsicSupported(IntrinID)) { + if (vc::isAnyNonTrivialIntrinsic(IID) && + !Subtarget->isIntrinsicSupported(IID)) { vc::diagnose(getContext(), "GenXCisaBuilder", "Intrinsic is not supported by the <" + Subtarget->getCPU() + "> platform", Inst); + return false; } - switch (IntrinID) { + switch (IID) { case Intrinsic::dbg_value: case Intrinsic::dbg_declare: case GenXIntrinsic::genx_predefined_surface: @@ -2718,7 +2728,7 @@ bool GenXKernelBuilder::buildMainInst(Instruction *Inst, BaleInfo BI, buildConvert(CI, BI, Mod, DstDesc); break; case vc::InternalIntrinsic::print_format_index: - buildPrintIndex(CI, IntrinID, Mod, DstDesc); + buildPrintIndex(CI, IID, Mod, DstDesc); break; case GenXIntrinsic::genx_convert_addr: buildConvertAddr(CI, BI, Mod, DstDesc); @@ -2747,15 +2757,11 @@ bool GenXKernelBuilder::buildMainInst(Instruction *Inst, BaleInfo BI, return false; // Omit llvm.genx.constantpred that is EM or RM and so // does not have a register allocated. // fall through... - default: - if (!(CI->user_empty() && - vc::getAnyIntrinsicID(CI->getCalledFunction()) == - GenXIntrinsic::genx_any)) - buildIntrinsic(CI, IntrinID, BI, Mod, DstDesc); - if (vc::getAnyIntrinsicID(CI->getCalledFunction()) == - GenXIntrinsic::genx_simdcf_get_em) - HasSimdCF = true; - break; + default: { + if (!(CI->user_empty() && IID == GenXIntrinsic::genx_any)) + buildIntrinsic(CI, IID, BI, Mod, DstDesc); + HasSimdCF |= IID == GenXIntrinsic::genx_simdcf_get_em; + } break; case GenXIntrinsic::not_any_intrinsic: IGC_ASSERT_MESSAGE(!Mod, "cannot bale subroutine call into anything"); IGC_ASSERT_MESSAGE(!DstDesc.WrRegion, @@ -3173,7 +3179,7 @@ void GenXKernelBuilder::buildVariables() { } break; default: - report_fatal_error("Unknown category for register"); + IGC_ASSERT_EXIT_MESSAGE(0, "Unknown category for register"); break; } } @@ -3273,15 +3279,12 @@ void GenXKernelBuilder::buildIntrinsic(CallInst *CI, unsigned IntrinID, int MaxRawOperands = std::numeric_limits::max(); - // TODO: replace lambdas by methods - auto GetUnsignedValue = [&](II::ArgInfo AI) { - ConstantInt *Const = - dyn_cast(CI->getArgOperand(AI.getArgIdx())); + auto *Const = dyn_cast(CI->getArgOperand(AI.getArgIdx())); if (!Const) { vc::diagnose(getContext(), "GenXCisaBuilder", "Incorrect args to intrinsic call", CI); - IGC_ASSERT_UNREACHABLE(); + return 0u; } unsigned val = Const->getSExtValue(); LLVM_DEBUG(dbgs() << "GetUnsignedValue from op #" << AI.getArgIdx() @@ -3436,14 +3439,12 @@ void GenXKernelBuilder::buildIntrinsic(CallInst *CI, unsigned IntrinID, Value *Arg = CI; if (!AI.isRet()) Arg = CI->getOperand(AI.getArgIdx()); - auto *VT = dyn_cast(Arg->getType()); - if (!VT) - report_fatal_error("Invalid number of owords"); + auto *VT = cast(Arg->getType()); int DataSize = VT->getNumElements() * DL.getTypeSizeInBits(VT->getElementType()) / 8; DataSize = std::max(0, genx::exactLog2(DataSize) - 4); - if (DataSize > 4) - report_fatal_error("Invalid number of words"); + IGC_ASSERT_EXIT_MESSAGE(DataSize >= 0 && DataSize <= 4, + "Invalid number of owords"); return static_cast(DataSize); }; @@ -4386,7 +4387,8 @@ void GenXKernelBuilder::buildBinaryOperator(BinaryOperator *BO, BaleInfo BI, IsLogic = true; break; default: - report_fatal_error("buildBinaryOperator: unimplemented binary operator"); + vc::diagnose(getContext(), "GenXCisaBuilder", "unsupported binary operator", + BO); break; } @@ -4462,8 +4464,8 @@ void GenXKernelBuilder::buildBoolBinaryOperator(BinaryOperator *BO) { Opcode = ISA_NOT; break; default: - report_fatal_error( - "buildBoolBinaryOperator: unimplemented binary operator"); + vc::diagnose(getContext(), "GenXCisaBuilder", + "unsupported boolean binary operator", BO); break; } @@ -5167,7 +5169,7 @@ void GenXKernelBuilder::addLifetimeStartInst(Instruction *Inst) { break; #endif // 0 default: - report_fatal_error("createLifetimeStartInst: Invalid register category"); + IGC_ASSERT_EXIT_MESSAGE(0, "Invalid register category"); break; } CISA_CALL(Kernel->AppendVISALifetime(LIFETIME_START, opnd)); @@ -5704,9 +5706,9 @@ static void dumpGlobalAnnotations(Module &M) { auto *Str = dyn_cast(GlobalStr->getInitializer()); if (!Str) continue; - auto FuncAnnotation = Str->getAsString(); - errs() << "Warning: Annotation \"" << FuncAnnotation << "\" for function " - << FuncName << " is ignored\n"; + auto FuncAnnotation = Str->getAsCString(); + vc::warn(M.getContext(), "GenXCisaBuilder", + "Annotation \"" + FuncAnnotation + "\" is ignored", Func); } } @@ -5743,14 +5745,24 @@ class GenXFinalizer final : public ModulePass { auto &FGA = getAnalysis(); auto &GM = getAnalysis(); std::stringstream ss; - VISABuilder *CisaBuilder = GM.GetCisaBuilder(); - if (GM.HasInlineAsm() || !BC->getVISALTOStrings().empty()) - CisaBuilder = GM.GetVISAAsmReader(); - CISA_CALL(CisaBuilder->Compile( - BC->isaDumpsEnabled() && BC->hasShaderDumper() - ? BC->getShaderDumper().composeDumpPath("final.isaasm").c_str() - : "", - BC->emitVisaOnly())); + + // Terminate compilation, if we caught an error in the CISA builder. + if (GM.hasError()) + return false; + + auto getGenXModule = [&GM]() { return &GM; }; + + bool HasTextAsm = GM.HasInlineAsm() || !BC->getVISALTOStrings().empty(); + auto *CisaBuilder = + HasTextAsm ? GM.GetVISAAsmReader() : GM.GetCisaBuilder(); + if (!CisaBuilder) + return false; + + bool IsDumpEnabled = BC->isaDumpsEnabled() && BC->hasShaderDumper(); + std::string DumpPath = + IsDumpEnabled ? BC->getShaderDumper().composeDumpPath("final.isaasm") + : ""; + CISA_CALL(CisaBuilder->Compile(DumpPath.c_str(), BC->emitVisaOnly())); if (!BC->isDisableFinalizerMsg()) dbgs() << CisaBuilder->GetCriticalMsg(); @@ -5759,15 +5771,15 @@ class GenXFinalizer final : public ModulePass { // Collect some useful statistics for (auto *FG : FGA) { - VISAKernel *Kernel = CisaBuilder->GetVISAKernel(FG->getName().str()); + auto *Kernel = CisaBuilder->GetVISAKernel(FG->getName().str()); IGC_ASSERT(Kernel); - vISA::FINALIZER_INFO *jitInfo = nullptr; - CISA_CALL(Kernel->GetJitInfo(jitInfo)); - IGC_ASSERT(jitInfo); - NumAsmInsts += jitInfo->stats.numAsmCountUnweighted; - SpillMemUsed += jitInfo->stats.spillMemUsed; - NumFlagSpillStore += jitInfo->stats.numFlagSpillStore; - NumFlagSpillLoad += jitInfo->stats.numFlagSpillLoad; + vISA::FINALIZER_INFO *JitInfo = nullptr; + CISA_CALL(Kernel->GetJitInfo(JitInfo)); + IGC_ASSERT(JitInfo); + NumAsmInsts += JitInfo->stats.numAsmCountUnweighted; + SpillMemUsed += JitInfo->stats.spillMemUsed; + NumFlagSpillStore += JitInfo->stats.numFlagSpillStore; + NumFlagSpillLoad += JitInfo->stats.numFlagSpillLoad; } return false; } @@ -5870,8 +5882,7 @@ static void dumpFinalizerArgs(const SmallVectorImpl &Argv, StringRef CPU) { // NOTE: CPU is not the Platform used by finalizer // The mapping is described by getVisaPlatform from GenXSubtarget.h - outs() << "GenXCpu: " << CPU << "\n"; - outs() << "Finalizer Parameters:\n\t"; + outs() << "GenXCpu: " << CPU << "\nFinalizer Parameters:"; std::for_each(Argv.begin(), Argv.end(), [](const char *Arg) { outs() << " " << Arg; }); outs() << "\n"; @@ -5889,8 +5900,10 @@ static VISABuilder *createVISABuilder(const GenXSubtarget &ST, BumpPtrAllocator &Alloc) { auto Platform = ST.getVisaPlatform(); // Fail for unknown platforms - if (Platform == TARGET_PLATFORM::GENX_NONE) - report_fatal_error("Platform unknown"); + if (Platform == TARGET_PLATFORM::GENX_NONE) { + vc::diagnose(Ctx, "GenXCisaBuilder", "Unknown platform"); + return nullptr; + } // Prepare array of arguments for Builder API. StringSaver Saver{Alloc}; @@ -5906,22 +5919,23 @@ static VISABuilder *createVISABuilder(const GenXSubtarget &ST, int Result = CreateVISABuilder(VB, Mode, VISA_BUILDER_BOTH, Platform, Argv.size(), Argv.data(), BC.getWATable()); if (Result != 0 || VB == nullptr) { - std::string Str; - llvm::raw_string_ostream Os(Str); - Os << "VISA builder creation failed\n"; - Os << "Mode: " << Mode << "\n"; - Os << "Args:\n"; + std::string ErrMsg; + llvm::raw_string_ostream Os(ErrMsg); + Os << "VISA builder creation failed" << "\nMode: " << Mode << "\nArgs: "; for (const char *Arg : Argv) Os << Arg << " "; - Os << "Visa only: " << (BC.emitVisaOnly() ? "yes" : "no") << "\n"; - Os << "Platform: " << ST.getVisaPlatform() << "\n"; - vc::diagnose(Ctx, "GenXCisaBuilder", Os.str().c_str()); + + Os << "\nVisa only: " << (BC.emitVisaOnly() ? "yes" : "no") + << "\nPlatform: " << Platform << "\n"; + + vc::diagnose(Ctx, "GenXCisaBuilder", ErrMsg); + return nullptr; } std::unordered_set DirectCallFunctions; - for (auto &FuncName : BC.getDirectCallFunctionsSet()) { - DirectCallFunctions.insert(FuncName.getKey().str()); - } + auto InsIt = std::inserter(DirectCallFunctions, DirectCallFunctions.end()); + llvm::transform(BC.getDirectCallFunctionsSet(), InsIt, + [](auto &FuncName) { return FuncName.getKey().str(); }); VB->SetDirectCallFunctionSet(DirectCallFunctions); return VB; @@ -5943,10 +5957,10 @@ VISABuilder *GenXModule::GetCisaBuilder() { } void GenXModule::DestroyCISABuilder() { - if (CisaBuilder) { - CISA_CALL(DestroyVISABuilder(CisaBuilder)); - CisaBuilder = nullptr; - } + if (!CisaBuilder) + return; + CISA_CALL(DestroyVISABuilder(CisaBuilder)); + CisaBuilder = nullptr; } void GenXModule::InitVISAAsmReader() { @@ -5963,8 +5977,8 @@ VISABuilder *GenXModule::GetVISAAsmReader() { } void GenXModule::DestroyVISAAsmReader() { - if (VISAAsmTextReader) { - CISA_CALL(DestroyVISABuilder(VISAAsmTextReader)); - VISAAsmTextReader = nullptr; - } + if (!VISAAsmTextReader) + return; + CISA_CALL(DestroyVISABuilder(VISAAsmTextReader)); + VISAAsmTextReader = nullptr; } diff --git a/IGC/VectorCompiler/lib/GenXCodeGen/GenXEmulate.cpp b/IGC/VectorCompiler/lib/GenXCodeGen/GenXEmulate.cpp index 19b941de9135..777e2b81298f 100644 --- a/IGC/VectorCompiler/lib/GenXCodeGen/GenXEmulate.cpp +++ b/IGC/VectorCompiler/lib/GenXCodeGen/GenXEmulate.cpp @@ -1180,12 +1180,12 @@ Value *GenXEmulate::Emu64Expander::visitGenxAddSat(CallInst &CI) { CI.getType()->isIntegerTy()); } break; case GenXIntrinsic::genx_suadd_sat: - report_fatal_error( - "int_emu: genx_suadd_sat is not supported by VC backend"); + vc::diagnose(CI.getContext(), "GenXEmulate", + "genx_suadd_sat is not supported by VC backend", &CI); break; case GenXIntrinsic::genx_usadd_sat: - report_fatal_error( - "int_emu: genx_usadd_sat is not supported by VC backend"); + vc::diagnose(CI.getContext(), "GenXEmulate", + "genx_usadd_sat is not supported by VC backend", &CI); break; default: IGC_ASSERT_MESSAGE(0, "unknown intrinsic passed to saturation add emu"); @@ -1679,10 +1679,11 @@ bool GenXEmulate::runOnModule(Module &M) { processToEraseList(ToErase); if (!DiscracedList.empty()) { - for (const auto *Insn : DiscracedList) { - llvm::errs() << "I64EMU-FAILURE: " << *Insn << "\n"; - } - report_fatal_error("int_emu: strict emulation requirements failure", false); + for (const auto *Insn : DiscracedList) + vc::diagnose(M.getContext(), "GenXEmulate", + "instruction emulation is not implemented", Insn); + vc::diagnose(M.getContext(), "GenXEmulate", + "strict emulation requirements failure"); } return Changed; } @@ -1738,12 +1739,11 @@ Instruction *llvm::genx::emulateI64Operation(const GenXSubtarget *ST, NewInst = cast_or_null(EmulatedResult); // If there is no explicit request to enable i64 emulation - report // an error - if (NewInst && !ST->emulateLongLong() && OptStrictEmulationRequests) { - report_fatal_error("int_emu: target does not suport i64 types", false); - } - } - else if (ST->partialI64Emulation()) { - Value *EmulatedResult = + if (NewInst && !ST->emulateLongLong() && OptStrictEmulationRequests) + vc::diagnose(Inst->getContext(), "GenXEmulate", + "64-bit integer operations are not supported", Inst); + } else if (ST->partialI64Emulation()) { + auto *EmulatedResult = GenXEmulate::LightEmu64Expander(*ST, *Inst).tryExpand(); NewInst = cast_or_null(EmulatedResult); } diff --git a/IGC/VectorCompiler/lib/GenXCodeGen/GenXLegalization.cpp b/IGC/VectorCompiler/lib/GenXCodeGen/GenXLegalization.cpp index 34291ba6c3d0..bbab989ef882 100644 --- a/IGC/VectorCompiler/lib/GenXCodeGen/GenXLegalization.cpp +++ b/IGC/VectorCompiler/lib/GenXCodeGen/GenXLegalization.cpp @@ -626,7 +626,8 @@ bool GenXLegalization::processInst(Instruction *Inst) { case GenXIntrinsic::genx_ussad2add_sat: case GenXIntrinsic::genx_uusad2add: case GenXIntrinsic::genx_uusad2add_sat: - report_fatal_error("'sad2' and 'sada2' are not supported by this target"); + vc::diagnose(Inst->getContext(), "GenXLegalization", + "sad2 and sada2 are not supported by this target", Inst); default: break; } @@ -779,7 +780,9 @@ bool GenXLegalization::processInst(Instruction *Inst) { dbgs() << "processBale: "; B.print(dbgs()); #endif - report_fatal_error("this g_store bale is not supported yet!"); + vc::diagnose(Inst->getContext(), "GenXLegalization", + "g_store bale is not supported yet", Inst); + return true; } return processBale(InsertBefore); diff --git a/IGC/VectorCompiler/lib/GenXCodeGen/GenXModule.h b/IGC/VectorCompiler/lib/GenXCodeGen/GenXModule.h index 5b850751fc42..fbeeee9680ca 100644 --- a/IGC/VectorCompiler/lib/GenXCodeGen/GenXModule.h +++ b/IGC/VectorCompiler/lib/GenXCodeGen/GenXModule.h @@ -93,6 +93,8 @@ namespace llvm { // stores vISA mappings for each *function* (including kernel subroutines) std::unordered_map VisaMapping; + bool HasError = false; + private: void cleanup() { VisaMapping.clear(); @@ -100,8 +102,11 @@ namespace llvm { DestroyCISABuilder(); DestroyVISAAsmReader(); ArgStorage.Reset(); + HasError = false; } + GenXModule *getGenXModule() { return this; } + public: static char ID; @@ -130,6 +135,9 @@ namespace llvm { void DestroyVISAAsmReader(); LLVMContext &getContext(); + void setHasError() { HasError = true; } + bool hasError() const { return HasError; } + bool emitDebugInformation() const { return EmitDebugInformation; } void updateVisaMapping(const Function *F, const Instruction *Inst, unsigned VisaIndex, StringRef Reason); diff --git a/IGC/VectorCompiler/lib/GenXCodeGen/GenXVisaRegAlloc.cpp b/IGC/VectorCompiler/lib/GenXCodeGen/GenXVisaRegAlloc.cpp index 36673ddb0009..b2e1cffbe973 100644 --- a/IGC/VectorCompiler/lib/GenXCodeGen/GenXVisaRegAlloc.cpp +++ b/IGC/VectorCompiler/lib/GenXCodeGen/GenXVisaRegAlloc.cpp @@ -922,12 +922,14 @@ TypeDetails::TypeDetails(const DataLayout &DL, Type *Ty, Signedness Signed, else if (BytesPerElement == QWordBytes) VisaType = ISA_TYPE_UQ; else - report_fatal_error("unsupported pointer type size"); + vc::diagnose(Ty->getContext(), "TypeDetails", + "unsupported pointer type size", Ty); } else { IGC_ASSERT_MESSAGE(0, "Unsupported vector element type"); } if (NumElements > 16384 || NumElements * BytesPerElement > 16384 * 8) - report_fatal_error("Variable too big"); + vc::diagnose(Ty->getContext(), "TypeDetails", + "vector size is too big for vISA", Ty); } struct LiveRangeAndLength { diff --git a/IGC/VectorCompiler/lib/GenXCodeGen/Utils/cisa_gen_intrinsics.py b/IGC/VectorCompiler/lib/GenXCodeGen/Utils/cisa_gen_intrinsics.py index 606ca1655007..f7bd82e69edb 100755 --- a/IGC/VectorCompiler/lib/GenXCodeGen/Utils/cisa_gen_intrinsics.py +++ b/IGC/VectorCompiler/lib/GenXCodeGen/Utils/cisa_gen_intrinsics.py @@ -227,9 +227,7 @@ def analyseForBuildMap(x): file.write(' } break;\n\n') file.write(''' default: - CI->print(errs()); - errs() << '\\n'; - report_fatal_error("Unsupported intrinsic!"); + vc::diagnose(CI->getContext(), "GenXKernelBuilder", "Unsupported intrinsic!", CI); break; }''') diff --git a/IGC/VectorCompiler/lib/GenXOpts/CMPacketize/GenXPacketize.cpp b/IGC/VectorCompiler/lib/GenXOpts/CMPacketize/GenXPacketize.cpp index a657bb49e9bc..be3c6c425d00 100644 --- a/IGC/VectorCompiler/lib/GenXOpts/CMPacketize/GenXPacketize.cpp +++ b/IGC/VectorCompiler/lib/GenXOpts/CMPacketize/GenXPacketize.cpp @@ -25,6 +25,7 @@ SPDX-License-Identifier: MIT #include "llvmWrapper/Support/Alignment.h" #include "llvmWrapper/Transforms/Utils/Cloning.h" +#include "vc/Support/GenXDiagnostic.h" #include "vc/Utils/GenX/Region.h" #include "llvm/GenXIntrinsics/GenXIntrinsics.h" @@ -1040,8 +1041,9 @@ Value *GenXPacketize::packetizeLLVMInstruction(Instruction *Inst) { else ReplacedInst = getPacketizeValue(Src1); } else { - report_fatal_error( - "ShuffleVector should've been replaced by Scalarizer."); + vc::diagnose(Inst->getContext(), "GenXPacketize", + "ShuffleVector should've been replaced by Scalarizer.", + Inst); } break; } @@ -1104,7 +1106,8 @@ Value *GenXPacketize::packetizeLLVMInstruction(Instruction *Inst) { if (V) Op.set(V); else if (!isa(Inst)) - report_fatal_error("Cannot find packetized value!"); + vc::diagnose(Inst->getContext(), "GenXPacketize", + "Failed to packetize instruction", Inst); } ReplacedInst = Inst; } @@ -1192,7 +1195,8 @@ Value *GenXPacketize::packetizeGenXIntrinsic(Instruction *Inst) { case GenXIntrinsic::genx_raw_send_noresult: case GenXIntrinsic::genx_raw_sends: case GenXIntrinsic::genx_raw_sends_noresult: - report_fatal_error("Unsupported genx intrinsic in SIMT mode."); + vc::diagnose(CI->getContext(), "GenXPacketize", + "Unsupported genx intrinsic in SIMT mode.", CI); return nullptr; case GenXIntrinsic::genx_dword_atomic_add: case GenXIntrinsic::genx_dword_atomic_sub: diff --git a/IGC/VectorCompiler/lib/GenXOpts/CMTrans/GenXBTIAssignment.cpp b/IGC/VectorCompiler/lib/GenXOpts/CMTrans/GenXBTIAssignment.cpp index b3ee9b7bb251..59789b9da708 100644 --- a/IGC/VectorCompiler/lib/GenXOpts/CMTrans/GenXBTIAssignment.cpp +++ b/IGC/VectorCompiler/lib/GenXOpts/CMTrans/GenXBTIAssignment.cpp @@ -22,6 +22,7 @@ SPDX-License-Identifier: MIT #include "vc/GenXOpts/GenXOpts.h" #include "vc/Support/BackendConfig.h" +#include "vc/Support/GenXDiagnostic.h" #include "vc/Utils/GenX/KernelInfo.h" #include "llvm/GenXIntrinsics/GenXIntrinsics.h" @@ -223,10 +224,11 @@ std::vector BTIAssignment::computeBTIndices( std::tie(SurfaceID, SamplerID) = assignSRV(SurfaceID, SamplerID, Zippy); SurfaceID = assignUAV(SurfaceID, Zippy); + auto &Ctx = KM.getFunction()->getContext(); if (SurfaceID > MaxAvailableSurfaceIndex) - llvm::report_fatal_error("not enough surface indices"); + vc::diagnose(Ctx, "BTIAssignment", "not enough surface indices"); if (SamplerID > MaxAvailableSamplerIndex) - llvm::report_fatal_error("not enough sampler indices"); + vc::diagnose(Ctx, "BTIAssignment", "not enough sampler indices"); return Indices; } diff --git a/IGC/VectorCompiler/lib/GenXOpts/CMTrans/GenXPrintfLegalization.cpp b/IGC/VectorCompiler/lib/GenXOpts/CMTrans/GenXPrintfLegalization.cpp index 437a3ac480c1..2b9f659a383f 100644 --- a/IGC/VectorCompiler/lib/GenXOpts/CMTrans/GenXPrintfLegalization.cpp +++ b/IGC/VectorCompiler/lib/GenXOpts/CMTrans/GenXPrintfLegalization.cpp @@ -35,9 +35,10 @@ SPDX-License-Identifier: MIT //===----------------------------------------------------------------------===// #include "vc/GenXOpts/GenXOpts.h" +#include "vc/Support/GenXDiagnostic.h" #include "vc/Utils/GenX/Printf.h" -#include "vc/Utils/General/InstRebuilder.h" #include "vc/Utils/General/IRBuilder.h" +#include "vc/Utils/General/InstRebuilder.h" #include "Probe/Assertion.h" #include "llvmWrapper/Support/Alignment.h" @@ -266,8 +267,11 @@ void recursivelyTraverseFormatIndexPreds(Value &Pred, if (Visited.count(&Pred)) return; Visited.insert(&Pred); - if (!isa(Pred)) - report_fatal_error(PrintfStringAccessError); + if (!isa(Pred)) { + vc::diagnose(Pred.getContext(), "GenXPrintfLegalization", + "illegal format index predecessor"); + return; + } auto &Sel = cast(Pred); std::array OperandInfos = { traverseSelectOperand(Sel, Sel.getOperandUse(1), ToRebuild, Visited), diff --git a/IGC/VectorCompiler/test/GenXInlineAsm/badasm.ll b/IGC/VectorCompiler/test/GenXInlineAsm/badasm.ll index ab5bcf4bbb03..fb870fb23c60 100644 --- a/IGC/VectorCompiler/test/GenXInlineAsm/badasm.ll +++ b/IGC/VectorCompiler/test/GenXInlineAsm/badasm.ll @@ -6,7 +6,7 @@ ; ;============================ end_copyright_notice ============================= -; RUN: %not_for_vc_diag% llc %s -march=genx64 -mcpu=Gen9 -o /dev/null 2>&1 | FileCheck %s +; RUN: not llc %s -march=genx64 -mcpu=Gen9 -o /dev/null 2>&1 | FileCheck %s define dllexport spir_kernel void @test(i64 %privBase) #0 { ; CHECK: error: LLVM ERROR: GenXCisaBuilder: Failed to parse inline visa assembly