From b66788ea2f84a5f8dd2655f8b19177015e136aed Mon Sep 17 00:00:00 2001 From: 0xurb Date: Thu, 7 Nov 2024 22:59:37 +0000 Subject: [PATCH 1/4] feat: introduce risc-v handler crate --- Cargo.lock | 66 ++++++++++++++++++++++++++++++++ Cargo.toml | 7 +++- crates/node/src/evm.rs | 1 + crates/risc-v-handler/Cargo.toml | 23 +++++++++++ crates/risc-v-handler/src/lib.rs | 1 + 5 files changed, 97 insertions(+), 1 deletion(-) create mode 100644 crates/risc-v-handler/Cargo.toml create mode 100644 crates/risc-v-handler/src/lib.rs diff --git a/Cargo.lock b/Cargo.lock index e8ae4bc..47d35e0 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -2494,6 +2494,15 @@ dependencies = [ "windows-sys 0.52.0", ] +[[package]] +name = "eth-riscv-interpreter" +version = "0.1.0" +source = "git+https://github.com/leonardoalt/r55.git#587a4850e293dea4c5ebf5710cf73618eba1509f" +dependencies = [ + "goblin", + "rvemu", +] + [[package]] name = "ethereum_serde_utils" version = "0.7.0" @@ -2886,6 +2895,17 @@ dependencies = [ "web-sys", ] +[[package]] +name = "goblin" +version = "0.8.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "1b363a30c165f666402fe6a3024d3bec7ebc898f96a4a23bd1c99f8dbf3f4f47" +dependencies = [ + "log", + "plain", + "scroll", +] + [[package]] name = "group" version = "0.13.0" @@ -4548,6 +4568,15 @@ dependencies = [ "tracing", ] +[[package]] +name = "odyssey-risc-v-handler" +version = "0.0.0" +dependencies = [ + "eth-riscv-interpreter", + "reth-evm", + "reth-revm", +] + [[package]] name = "odyssey-wallet" version = "0.0.0" @@ -4963,6 +4992,12 @@ version = "0.3.31" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "953ec861398dccce10c670dfeaf3ec4911ca479e9c02154b3a215178c5f566f2" +[[package]] +name = "plain" +version = "0.2.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "b4596b6d070b27117e987119b4dac604f3c58cfb0b191112e24771b2faeac1a6" + [[package]] name = "pollster" version = "0.3.0" @@ -8311,6 +8346,17 @@ dependencies = [ "wait-timeout", ] +[[package]] +name = "rvemu" +version = "0.0.11" +source = "git+https://github.com/lvella/rvemu.git#e1cf76a8fb609fc1ebb028419799a3087d8deac0" +dependencies = [ + "js-sys", + "wasm-bindgen", + "wasm-bindgen-futures", + "web-sys", +] + [[package]] name = "ryu" version = "1.0.18" @@ -8358,6 +8404,26 @@ version = "1.2.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "94143f37725109f92c262ed2cf5e59bce7498c01bcc1502d7b9afe439a4e9f49" +[[package]] +name = "scroll" +version = "0.12.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "6ab8598aa408498679922eff7fa985c25d58a90771bd6be794434c5277eab1a6" +dependencies = [ + "scroll_derive", +] + +[[package]] +name = "scroll_derive" +version = "0.12.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "7f81c2fde025af7e69b1d1420531c8a8811ca898919db177141a85313b1cb932" +dependencies = [ + "proc-macro2", + "quote", + "syn 2.0.79", +] + [[package]] name = "sec1" version = "0.7.3" diff --git a/Cargo.toml b/Cargo.toml index f802366..0dd28b5 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -2,6 +2,7 @@ members = [ "bin/odyssey/", "crates/node", + "crates/risc-v-handler", "crates/e2e-tests", "crates/wallet", "crates/walltime", @@ -135,6 +136,7 @@ strip = false [workspace.dependencies] # odyssey odyssey-node = { path = "crates/node" } +odyssey-risc-v-handler = { path = "crates/node" } odyssey-wallet = { path = "crates/wallet" } odyssey-walltime = { path = "crates/walltime" } @@ -188,7 +190,10 @@ reth-transaction-pool = { git = "https://github.com/paradigmxyz/reth.git", rev = reth-network = { git = "https://github.com/paradigmxyz/reth.git", rev = "e98a050" } reth-network-types = { git = "https://github.com/paradigmxyz/reth.git", rev = "e98a050" } reth-chain-state = { git = "https://github.com/paradigmxyz/reth.git", rev = "e98a050" } -revm-precompile ={version= "14.0.0",features=["secp256r1"]} +revm-precompile = { version = "14.0.0", features = ["secp256r1"] } + +# risc-v +eth-riscv-interpreter = { git = "https://github.com/leonardoalt/r55.git" } # metrics metrics = "0.23.0" diff --git a/crates/node/src/evm.rs b/crates/node/src/evm.rs index 45d6d06..253af39 100644 --- a/crates/node/src/evm.rs +++ b/crates/node/src/evm.rs @@ -244,6 +244,7 @@ impl ConfigureEvm for OdysseyEvmConfig { // add additional precompiles .append_handler_register(Self::set_precompiles) .append_handler_register(inspector_handle_register) + .append_handler_register(risc_v_handle_register) .build() } diff --git a/crates/risc-v-handler/Cargo.toml b/crates/risc-v-handler/Cargo.toml new file mode 100644 index 0000000..423d644 --- /dev/null +++ b/crates/risc-v-handler/Cargo.toml @@ -0,0 +1,23 @@ +[package] +name = "odyssey-risc-v-handler" +version.workspace = true +edition.workspace = true +rust-version.workspace = true +authors.workspace = true +license.workspace = true +repository.workspace = true +keywords.workspace = true +categories.workspace = true + +[dependencies] +# reth +reth-evm.workspace = true +reth-revm.workspace = true + +# risc-v +eth-riscv-interpreter.workspace = true + +[dev-dependencies] + +[lints] +workspace = true diff --git a/crates/risc-v-handler/src/lib.rs b/crates/risc-v-handler/src/lib.rs new file mode 100644 index 0000000..efc1ede --- /dev/null +++ b/crates/risc-v-handler/src/lib.rs @@ -0,0 +1 @@ +#![cfg_attr(not(test), warn(unused_crate_dependencies))] From 6bdd22a6a7ce99b9a763727628bbb7308eaee47d Mon Sep 17 00:00:00 2001 From: 0xurb Date: Thu, 7 Nov 2024 23:04:05 +0000 Subject: [PATCH 2/4] feat: declared handler --- Cargo.lock | 2 ++ Cargo.toml | 3 ++- crates/node/Cargo.toml | 2 ++ crates/node/src/evm.rs | 1 + crates/risc-v-handler/Cargo.toml | 1 + crates/risc-v-handler/src/lib.rs | 4 ++++ 6 files changed, 12 insertions(+), 1 deletion(-) diff --git a/Cargo.lock b/Cargo.lock index 47d35e0..d5ba0b9 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -4549,6 +4549,7 @@ version = "0.0.0" dependencies = [ "alloy-primitives", "eyre", + "odyssey-risc-v-handler", "reth-chainspec", "reth-cli", "reth-evm", @@ -4575,6 +4576,7 @@ dependencies = [ "eth-riscv-interpreter", "reth-evm", "reth-revm", + "rvemu", ] [[package]] diff --git a/Cargo.toml b/Cargo.toml index 0dd28b5..f552705 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -136,7 +136,7 @@ strip = false [workspace.dependencies] # odyssey odyssey-node = { path = "crates/node" } -odyssey-risc-v-handler = { path = "crates/node" } +odyssey-risc-v-handler = { path = "crates/risc-v-handler" } odyssey-wallet = { path = "crates/wallet" } odyssey-walltime = { path = "crates/walltime" } @@ -194,6 +194,7 @@ revm-precompile = { version = "14.0.0", features = ["secp256r1"] } # risc-v eth-riscv-interpreter = { git = "https://github.com/leonardoalt/r55.git" } +rvemu = { git = "https://github.com/lvella/rvemu.git" } # metrics metrics = "0.23.0" diff --git a/crates/node/Cargo.toml b/crates/node/Cargo.toml index e946e49..5bcef27 100644 --- a/crates/node/Cargo.toml +++ b/crates/node/Cargo.toml @@ -10,6 +10,8 @@ keywords.workspace = true categories.workspace = true [dependencies] +odyssey-risc-v-handler.workspace = true + revm-precompile.workspace = true reth-cli.workspace = true reth-node-api.workspace = true diff --git a/crates/node/src/evm.rs b/crates/node/src/evm.rs index 253af39..5da48b9 100644 --- a/crates/node/src/evm.rs +++ b/crates/node/src/evm.rs @@ -11,6 +11,7 @@ //! precompiles defined by [`revm_precompile`]. use alloy_primitives::{Address, Bytes, TxKind, U256}; +use odyssey_risc_v_handler::risc_v_handle_register; use reth_chainspec::{ChainSpec, EthereumHardfork, Head}; use reth_node_api::{ConfigureEvm, ConfigureEvmEnv, NextBlockEnvAttributes}; use reth_optimism_chainspec::OpChainSpec; diff --git a/crates/risc-v-handler/Cargo.toml b/crates/risc-v-handler/Cargo.toml index 423d644..1e0eca0 100644 --- a/crates/risc-v-handler/Cargo.toml +++ b/crates/risc-v-handler/Cargo.toml @@ -16,6 +16,7 @@ reth-revm.workspace = true # risc-v eth-riscv-interpreter.workspace = true +rvemu.workspace = true [dev-dependencies] diff --git a/crates/risc-v-handler/src/lib.rs b/crates/risc-v-handler/src/lib.rs index efc1ede..02effe2 100644 --- a/crates/risc-v-handler/src/lib.rs +++ b/crates/risc-v-handler/src/lib.rs @@ -1 +1,5 @@ #![cfg_attr(not(test), warn(unused_crate_dependencies))] + +use reth_revm::{handler::register::EvmHandler, Database}; + +pub fn risc_v_handle_register(handler: &mut EvmHandler<'_, EXT, DB>) {} From 2ee2a8eb1ca7579df48ec903e8151d2f90697059 Mon Sep 17 00:00:00 2001 From: 0xurb Date: Fri, 8 Nov 2024 00:33:57 +0000 Subject: [PATCH 3/4] feat: implemented RISC-V handler --- Cargo.lock | 9 +- Cargo.toml | 1 + crates/risc-v-handler/Cargo.toml | 5 +- crates/risc-v-handler/src/error.rs | 27 +++++ crates/risc-v-handler/src/lib.rs | 95 ++++++++++++++- crates/risc-v-handler/src/rvemu.rs | 182 +++++++++++++++++++++++++++++ 6 files changed, 315 insertions(+), 4 deletions(-) create mode 100644 crates/risc-v-handler/src/error.rs create mode 100644 crates/risc-v-handler/src/rvemu.rs diff --git a/Cargo.lock b/Cargo.lock index d5ba0b9..c3cd6f5 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -2503,6 +2503,11 @@ dependencies = [ "rvemu", ] +[[package]] +name = "eth-riscv-syscalls" +version = "0.1.0" +source = "git+https://github.com/leonardoalt/r55.git#587a4850e293dea4c5ebf5710cf73618eba1509f" + [[package]] name = "ethereum_serde_utils" version = "0.7.0" @@ -4574,9 +4579,11 @@ name = "odyssey-risc-v-handler" version = "0.0.0" dependencies = [ "eth-riscv-interpreter", - "reth-evm", + "eth-riscv-syscalls", "reth-revm", "rvemu", + "thiserror", + "tracing", ] [[package]] diff --git a/Cargo.toml b/Cargo.toml index f552705..3a3d567 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -194,6 +194,7 @@ revm-precompile = { version = "14.0.0", features = ["secp256r1"] } # risc-v eth-riscv-interpreter = { git = "https://github.com/leonardoalt/r55.git" } +eth-riscv-syscalls = { git = "https://github.com/leonardoalt/r55.git" } rvemu = { git = "https://github.com/lvella/rvemu.git" } # metrics diff --git a/crates/risc-v-handler/Cargo.toml b/crates/risc-v-handler/Cargo.toml index 1e0eca0..55beef0 100644 --- a/crates/risc-v-handler/Cargo.toml +++ b/crates/risc-v-handler/Cargo.toml @@ -11,13 +11,16 @@ categories.workspace = true [dependencies] # reth -reth-evm.workspace = true reth-revm.workspace = true # risc-v eth-riscv-interpreter.workspace = true +eth-riscv-syscalls.workspace = true rvemu.workspace = true +thiserror.workspace = true +tracing.workspace = true + [dev-dependencies] [lints] diff --git a/crates/risc-v-handler/src/error.rs b/crates/risc-v-handler/src/error.rs new file mode 100644 index 0000000..3d28c47 --- /dev/null +++ b/crates/risc-v-handler/src/error.rs @@ -0,0 +1,27 @@ +use reth_revm::primitives::EVMError; +use rvemu::exception::Exception; + +/// Errors returned during the RISC-V context execution +#[derive(Debug, thiserror::Error)] +pub(crate) enum RiscVError { + /// The exception kind on RISC-V [`emulator`](`Emulator`) + #[error("Got RISC-V emulator exception: {0:?}")] + RvEmuException(Exception), + /// Unhandled system call + #[error("Unhandled syscall: {0}")] + UnhandledSyscall(u32), +} + +impl From for EVMError { + #[inline] + fn from(err: RiscVError) -> Self { + EVMError::Custom(err.to_string()) + } +} + +impl From for RiscVError { + #[inline] + fn from(exception: Exception) -> Self { + Self::RvEmuException(exception) + } +} diff --git a/crates/risc-v-handler/src/lib.rs b/crates/risc-v-handler/src/lib.rs index 02effe2..d7c874a 100644 --- a/crates/risc-v-handler/src/lib.rs +++ b/crates/risc-v-handler/src/lib.rs @@ -1,5 +1,96 @@ #![cfg_attr(not(test), warn(unused_crate_dependencies))] +#![allow(missing_docs)] // TODO(0xurb) - docs -use reth_revm::{handler::register::EvmHandler, Database}; +use std::{cell::RefCell, rc::Rc, sync::Arc}; -pub fn risc_v_handle_register(handler: &mut EvmHandler<'_, EXT, DB>) {} +use eth_riscv_interpreter::setup_from_elf; +use reth_revm::{ + handler::register::EvmHandler, + interpreter::{Host, Interpreter, InterpreterAction, SharedMemory}, + Database, Frame, FrameOrResult, +}; + +mod error; +use error::RiscVError; + +mod rvemu; +use rvemu::RVEmu; + +/// RISC-V magic bytes +const RISC_V_MAGIC: &[u8] = &[0xFF]; + +/// RISC-V EVM handler register +pub fn risc_v_handle_register(handler: &mut EvmHandler<'_, EXT, DB>) { + let call_stack = Rc::>>::new(RefCell::new(Vec::new())); + + // create a riscv context on call frame. + let call_stack_inner = call_stack.clone(); + let old_handle = handler.execution.call.clone(); + handler.execution.call = Arc::new(move |ctx, inputs| { + let result = old_handle(ctx, inputs); + if let Ok(FrameOrResult::Frame(frame)) = &result { + call_stack_inner.borrow_mut().push(riscv_context(frame)); + } + result + }); + + // create a riscv context on create frame. + let call_stack_inner = call_stack.clone(); + let old_handle = handler.execution.create.clone(); + handler.execution.create = Arc::new(move |ctx, inputs| { + let result = old_handle(ctx, inputs); + if let Ok(FrameOrResult::Frame(frame)) = &result { + call_stack_inner.borrow_mut().push(riscv_context(frame)); + } + result + }); + + // execute riscv context or old logic. + let old_handle = handler.execution.execute_frame.clone(); + handler.execution.execute_frame = Arc::new(move |frame, memory, instraction_table, ctx| { + let result = if let Some(Some(riscv_context)) = call_stack.borrow_mut().first_mut() { + execute_riscv(riscv_context, frame.interpreter_mut(), memory, ctx)? + } else { + old_handle(frame, memory, instraction_table, ctx)? + }; + + // if it is return pop the stack. + if result.is_return() { + call_stack.borrow_mut().pop(); + } + Ok(result) + }); +} + +/// Setup RISC-V execution context if bytecode starts with [`RISC_V_MAGIC`]. +/// +/// Load and parse the ELF (Electronic Linker Format), then +/// - allocates contract input size and data to emulator's CPU memory. +/// - allocates currently run bytecode to emulator's CPU memory +/// +/// # Note: +/// By default it preallocated 1Mb for RISC-V DRAM data +fn riscv_context(frame: &Frame) -> Option { + let interpreter = frame.interpreter(); + + let Some((RISC_V_MAGIC, bytecode)) = interpreter.bytecode.split_at_checked(RISC_V_MAGIC.len()) + else { + return None; + }; + + let emu = setup_from_elf(bytecode, &interpreter.contract.input); + Some(RVEmu::new(emu)) +} + +/// Executes frame in the RISC-V context +/// +/// FIXME: gas is not correct on interpreter return. +fn execute_riscv( + rvemu: &mut RVEmu, + interpreter: &mut Interpreter, + shared_memory: &mut SharedMemory, + host: &mut dyn Host, +) -> Result { + rvemu.handle_shared_memory(shared_memory)?; + rvemu.handle_syscall(interpreter, host) +} diff --git a/crates/risc-v-handler/src/rvemu.rs b/crates/risc-v-handler/src/rvemu.rs new file mode 100644 index 0000000..d2aceb0 --- /dev/null +++ b/crates/risc-v-handler/src/rvemu.rs @@ -0,0 +1,182 @@ +use std::ops::Range; + +use eth_riscv_syscalls::Syscall; +use reth_revm::{ + interpreter::{ + CallInputs, CallScheme, CallValue, Host, InstructionResult, Interpreter, InterpreterAction, + InterpreterResult, SharedMemory, StateLoad, + }, + primitives::{Address, Bytes, U256}, +}; +use rvemu::{emulator::Emulator, exception::Exception}; + +use super::RiscVError; + +/// RISC-V emulator +#[derive(Debug)] +pub(crate) struct RVEmu { + /// The emulator, that holds a RISC-V CPU + pub(crate) emu: Emulator, + /// Range to get regarded RISC-V DRAM memory slice and set it with + /// shared memory data on frame execution handler + pub(crate) returned_data_destiny: Option>, +} + +impl RVEmu { + /// Creates a new [`RVEmu`] + pub(crate) const fn new(emu: Emulator) -> Self { + Self { emu, returned_data_destiny: None } + } + + /// Handles memory operations between shared memory and RISC-V DRAM + pub(crate) fn handle_shared_memory( + &mut self, + shared_memory: &mut SharedMemory, + ) -> Result<(), RiscVError> { + if let Some(destiny) = std::mem::take(&mut self.returned_data_destiny) { + let data = self.emu.cpu.bus.get_dram_slice(destiny.clone())?; + data.copy_from_slice(shared_memory.slice(0, data.len())); + tracing::trace!("Copied {} bytes to DRAM range", data.len()); + } + + Ok(()) + } + + /// Handles a system call based on the value on RISC-V CPU's integer register + pub(crate) fn handle_syscall( + &mut self, + interpreter: &mut Interpreter, + host: &mut dyn Host, + ) -> Result { + let emu = &mut self.emu; + let returned_data_destiny = &mut self.returned_data_destiny; + + // Run emulator and capture ecalls + loop { + let run_result = emu.start(); + match run_result { + Err(Exception::EnvironmentCallFromMMode) => { + let t0 = emu.cpu.xregs.read(5) as u32; + let syscall = + Syscall::try_from(t0).map_err(|_| RiscVError::UnhandledSyscall(t0))?; + match syscall { + Syscall::Return => { + let ret_offset: u64 = emu.cpu.xregs.read(10); + let ret_size: u64 = emu.cpu.xregs.read(11); + let data_bytes = if ret_size != 0 { + emu.cpu + .bus + .get_dram_slice(ret_offset..(ret_offset + ret_size)) + .unwrap() + } else { + &mut [] + }; + return Ok(InterpreterAction::Return { + result: InterpreterResult { + result: InstructionResult::Return, + output: data_bytes.to_vec().into(), + gas: interpreter.gas, + }, + }); + } + Syscall::SLoad => { + let key: u64 = emu.cpu.xregs.read(10); + match host.sload(interpreter.contract.target_address, U256::from(key)) { + Some(StateLoad { data, is_cold: _ }) => { + emu.cpu.xregs.write(10, data.as_limbs()[0]); + } + _ => { + return return_revert(interpreter); + } + } + } + Syscall::SStore => { + let key: u64 = emu.cpu.xregs.read(10); + let value: u64 = emu.cpu.xregs.read(11); + host.sstore( + interpreter.contract.target_address, + U256::from(key), + U256::from(value), + ); + } + Syscall::Call => { + let a0: u64 = emu.cpu.xregs.read(10); + let address = Address::from_slice( + emu.cpu.bus.get_dram_slice(a0..(a0 + 20)).unwrap(), + ); + let value: u64 = emu.cpu.xregs.read(11); + let args_offset: u64 = emu.cpu.xregs.read(12); + let args_size: u64 = emu.cpu.xregs.read(13); + let ret_offset = emu.cpu.xregs.read(14); + let ret_size = emu.cpu.xregs.read(15); + + *returned_data_destiny = Some(ret_offset..(ret_offset + ret_size)); + + let tx = &host.env().tx; + return Ok(InterpreterAction::Call { + inputs: Box::new(CallInputs { + input: emu + .cpu + .bus + .get_dram_slice(args_offset..(args_offset + args_size)) + .unwrap() + .to_vec() + .into(), + gas_limit: tx.gas_limit, + target_address: address, + bytecode_address: address, + caller: interpreter.contract.target_address, + value: CallValue::Transfer(U256::from_le_bytes( + value.to_le_bytes(), + )), + scheme: CallScheme::Call, + is_static: false, + is_eof: false, + return_memory_offset: 0..ret_size as usize, + }), + }); + } + Syscall::Revert => { + return Ok(InterpreterAction::Return { + result: InterpreterResult { + result: InstructionResult::Revert, + output: Bytes::from(0u32.to_le_bytes()), + gas: interpreter.gas, + }, + }); + } + Syscall::Caller => { + let caller = interpreter.contract.caller; + // Break address into 3 u64s and write to registers + let caller_bytes = caller.as_slice(); + let first_u64 = + u64::from_be_bytes(caller_bytes[0..8].try_into().unwrap()); + emu.cpu.xregs.write(10, first_u64); + let second_u64 = + u64::from_be_bytes(caller_bytes[8..16].try_into().unwrap()); + emu.cpu.xregs.write(11, second_u64); + let mut padded_bytes = [0u8; 8]; + padded_bytes[..4].copy_from_slice(&caller_bytes[16..20]); + let third_u64 = u64::from_be_bytes(padded_bytes); + emu.cpu.xregs.write(12, third_u64); + } + } + } + _ => { + return return_revert(interpreter); + } + } + } + } +} + +/// Helper function to create a revert action +fn return_revert(interpreter: &mut Interpreter) -> Result { + Ok(InterpreterAction::Return { + result: InterpreterResult { + result: InstructionResult::Revert, + output: Bytes::new(), + gas: interpreter.gas, + }, + }) +} From 6dbc7be4a7020bfe0355f2a235ead4f083c6acce Mon Sep 17 00:00:00 2001 From: 0xurb Date: Fri, 8 Nov 2024 01:16:25 +0000 Subject: [PATCH 4/4] chore: fmt and lint --- crates/risc-v-handler/src/error.rs | 2 +- crates/risc-v-handler/src/lib.rs | 2 +- crates/risc-v-handler/src/rvemu.rs | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/crates/risc-v-handler/src/error.rs b/crates/risc-v-handler/src/error.rs index 3d28c47..9faf710 100644 --- a/crates/risc-v-handler/src/error.rs +++ b/crates/risc-v-handler/src/error.rs @@ -15,7 +15,7 @@ pub(crate) enum RiscVError { impl From for EVMError { #[inline] fn from(err: RiscVError) -> Self { - EVMError::Custom(err.to_string()) + Self::Custom(err.to_string()) } } diff --git a/crates/risc-v-handler/src/lib.rs b/crates/risc-v-handler/src/lib.rs index d7c874a..5703a16 100644 --- a/crates/risc-v-handler/src/lib.rs +++ b/crates/risc-v-handler/src/lib.rs @@ -1,5 +1,5 @@ +//! Odyssey's RISC-V EVM handler #![cfg_attr(not(test), warn(unused_crate_dependencies))] -#![allow(missing_docs)] // TODO(0xurb) - docs use std::{cell::RefCell, rc::Rc, sync::Arc}; diff --git a/crates/risc-v-handler/src/rvemu.rs b/crates/risc-v-handler/src/rvemu.rs index d2aceb0..5bd8962 100644 --- a/crates/risc-v-handler/src/rvemu.rs +++ b/crates/risc-v-handler/src/rvemu.rs @@ -34,7 +34,7 @@ impl RVEmu { shared_memory: &mut SharedMemory, ) -> Result<(), RiscVError> { if let Some(destiny) = std::mem::take(&mut self.returned_data_destiny) { - let data = self.emu.cpu.bus.get_dram_slice(destiny.clone())?; + let data = self.emu.cpu.bus.get_dram_slice(destiny)?; data.copy_from_slice(shared_memory.slice(0, data.len())); tracing::trace!("Copied {} bytes to DRAM range", data.len()); }